KR100266720B1 - Method and device for adjusting the frequency of oscillator bult in an integrated circuit - Google Patents

Abstract

The present invention relates to a method and apparatus for adjusting the frequency of an oscillator mounted on an integrated circuit, comprising an enable signal, a reset signal, a timing reference clock, and a plurality of circuits:

Reference voltage generator for power regulation: the power supply passes through a reference voltage generator that outputs stable reference voltages Vref, Vref1 to Vref31, 3 / 4Vref and 1 / 2Vref;

Fine tuner: reset signal, Vref, Vref1 to Vref31 are input to fine tuner outputting PVref (0 < P <1);

Charge / discharge oscillator: Enable signal, PVref, Vref, 3 / 4ref, 1 / 2Vref are input and output square wave. The resistor and capacitor of the oscillator are capable of controlling the frequency of the square wave;

Frequency counter: accepting the reset signal, a timing reference clock, a square wave, counting the frequency of the square wave, outputting a frequency value, and outputting a PROGRAM signal to a fine tuner;

Comparator: This ROM has a table that can obtain the relative value FUSE (0-4) output to the fine tuner by comparing the frequency value from the frequency counter with a preset value.

FUSE (0-4) blows the associated fuse of the fine tuner so that the fine tuner generates a new P value, thus allowing the oscillator to obtain the correct frequency.

Description

Method and apparatus for adjusting frequency of oscillator mounted in integrated circuit

The present invention relates to a method and apparatus for adjusting the frequency, and more particularly, to a method and apparatus for accurately adjusting the frequency of an oscillator mounted in an integrated circuit.

As an example, in the application of an infrared transmitter IC, a crystal (or resonator) is generally required to provide the correct frequency to the IC circuit. The crystal is connected in parallel with the two pins of the infrared transmitter IC, both of which are then placed on the circuit board. However, because the crystal takes up too much space and cannot reduce the pin count of the IC, the infrared transmitter can no longer be miniaturized.

Therefore, the present invention provides a new circuit by placing the oscillating circuit in the IC so as to reduce the space occupied by the crystal on the circuit board. As IC technology advances, the oscillator circuit added to the IC does not increase the volume of the IC too much.

However, when the oscillating circuits are mounted on the IC, it is difficult to control their frequency precision, and therefore, it is the main object of the present invention to solve these problems.

In addition, the internal power supply of remote control circuits such as batteries, for example, generally decreases over time, and transients generated during the turn-on of the output drive (eg NPN BJT) also generate too much noise, These affect the oscillation frequency. These problems are also the subject of the present invention.

It is therefore an object of the present invention to provide an oscillator mounted in an integrated circuit, to reduce the number of pins of the IC, reduce the layout area of the resonator on the substrate, and to miniaturize the associated circuit board.

Another object of the present invention is to provide a method and apparatus for accurately and simply adjusting the frequency of an oscillator mounted in an integrated circuit.

Another object of the present invention is to adjust the frequency of an oscillator mounted in an integrated circuit, which can prevent the drift of the oscillation frequency due to the reduction of power (e.g., battery) and prevent the variation of the oscillation frequency due to the transient current. It is to provide a method and apparatus.

The present invention will be better understood with reference to the drawings described below.

1 is a system block diagram of the present invention showing an apparatus for adjusting the frequency of an oscillator mounted in an integrated circuit.

2 is a circuit diagram of a reference voltage generator 1 of the present invention.

FIG. 3A is a schematic connection diagram of a selector of a fine tuner 2. FIG.

3B is a schematic diagram showing the selector of the fine tuner 2. FIG.

3 (c) is a fuse programming circuit of fine tuner 2.

4A is a circuit diagram of a charge / discharge oscillator 3. FIG.

4B is a charge / discharge waveform of the resistor R and the capacitor C of the oscillator 3.

Fig. 5A is a circuit diagram of frequency counter 4.

FIG. 5B is a timing chart showing waveforms of OUT, Q0, Q1, Q2, CKcnt, and PROGRAM of frequency counter 4. FIG.

Fig. 5C is a timing chart of FREQ-COUNT and CKref showing the period T of OUT.

6 is a schematic diagram of a comparator (ROM table for comparison).

Referring to FIG. 1, which is a system block diagram of the present invention showing an apparatus for adjusting the frequency of an oscillator mounted in an integrated circuit, the apparatus includes an enable signal ENABLE, a reset signal RESET, a timing reference clock CKref, and the following. It includes a number of circuits such as:

Reference voltage generator for power regulation 1: power supply Vcc passes through reference voltage generator 1 which outputs stable reference voltages Vref, Vref1-Vref31, 3 / 4Vref, 1 / 2Vref;

Fine tuner 2: The reset signals RESET, Vref, and Vref1 to Vref31 are inputted to the fine tuner 2 which outputs PVref (0 < P <1);

Charge / Discharge Oscillator 3: ENABLE, PVref, Vref, 3 / 4Vref, 1 / 2Vref are input and square wave OUT is output. The resistor R and capacitor C of the charge / discharge oscillator 3 can control the coarse frequency of OUT, the frequency of OUT being fine tuned to obtain the correct frequency, which will be described later;

Frequency counter 4: accept RESET, CKref, OUT, count the frequency of OUT, output the counted frequency value and output PROGRAM signal to fine tuner 2;

Comparator 5: This is a ROM having a table for comparing the frequency value from the frequency counter 4 with a preset value to obtain a relative value FUSE (0-4) output to the fine tuner 2. .

Fine tuner 2 adjusts the frequency precisely according to the FUSE (0-4) and PROGRAM signals.

Each detailed description of the circuit is as follows.

Referring to FIG. 2, which is a circuit diagram of the reference voltage generator 1 of the present invention, the reference voltage generator is designed in the form of a band gap voltage reference, and the device ratio of Q1 and Q2 is 1: N. If the current I2 = 10 mu A, N = 24, and the voltage Veb between the emitter and the base of Q1 is 0.7 volts, the output Vref of the amplifier OPR is 1.6 volts. Vref is then divided into 1 / 2Vref, 3 / 4Vref and Vref1-Vref31 by three resistors R1 and resistors R11, R12, R13 ... R131, R132, where R11 = R12 = R13 =. = R131 = R132 = R1 x 1/3

A circuit diagram of the fine tuner 2 is described with reference to FIG. 3. Fine tuner 2 includes the selector shown in Fig. 3 (a) and the fuse programming circuit shown in Fig. 3 (c), wherein the selector is one of the 32 switches as shown in Fig. 3 (b). Is the output of.

A description will be given with reference to Fig. 3 (b) in which a 32-bit switching state exists as a 5-bit switch. The states (0 or 1) of S0, SO , S1, S1 , S2, S2 , S3, S3 , S4, S4 are determined by the fuse programming circuit of FIG. 3 (c). As shown in Fig. 3 (c), the FUSE (0) and PROGRAM signals determine the conductivity of MN0. When MN0 is conducting, R0 is burned out and opened (R0 is a slim multiple fuse, which will be described later), so the state at point A is 0, SO = 1, S0 = 0, MNO When is off, S0 = 0, S0 = 1 is obtained. Therefore, the states (0 or 1) of S0, SO , S1, S1 , S2, S2 , S3, S3 , S4, S4 are FUSE (0), FUSE (1)... Since it can be determined by FUSE 4 and PROGRAM, the selector chooses one path out of 32 possibilities, and thus PVref is determined. For example, if the 20th path is conducting, then P = 0.75 + 0.25 (12/32) = 0.84375.

A description will be given with reference to FIG. 4 (a), which is a circuit diagram of a charge / discharge oscillator 3 having a resistor R and a capacitor C. The ENABLE signal, PVref of fine tuner 2, and Vref, 1 / 2Vref, 3 / 4Vref of reference voltage generator 1 are input to generate a square wave OUT. The resistor R and capacitor C are used to control the frequency of the square wave OUT. 4 (b) shows the charge / discharge waveforms of the resistor R and the capacitor C, having a period T. FIG. In Fig. 4 (a), the current I = PVref / R, I × Δt / C = ΔV, T = 2Δt = 2 × CΔV / I; In Fig. 4 (b), ΔV = (1/2) Vref and thus T = RC / P. Since RC is constant and P can be adjusted to the ideal value, T can be adjusted to the ideal value, and so is the frequency. Therefore, by adjusting the value of P, the required frequency can be obtained.

Referring to FIG. 5A, which is a circuit diagram of frequency counter 4, frequency counter 4 includes four T flip-flops, one D flip-flop, and eight other T-type flip-flops. The RESET signal, timing reference clock CKref and square wave OUT from oscillator 3 are input signals. 5B shows timing charts of OUT, Q0, Q1, Q2, CKcnt, and PROGRAM. 5C shows a cycle T of OUT. By counting CKref, the period T of OUT is calculated by N periods of CKref.

Since the frequency of CKref is a predetermined known frequency, the frequency of OUT is therefore obtained in 8-bit digital form of FREQ-COUNT (0-7) and sent to comparator 5. Comparator 5 generates a value of FUSE (0-4) to be output to fine tuner 2.

In order for the sync-error between CKref and OUT to be less than 1/200 (= 0.5%), the bit width of FREQ-COUNT must be 8 bits (since 2 ⁸ = 256> 200). The wider this is, the more precise the synchronization error is.

A schematic diagram of comparator 5 is described with reference to FIG. Comparator 5 is 8x5 ROM with an internal table. FREQ-COUNT (0-7) from frequency counter 4 is compared with a preset value of the table, and 5-bit relative value FUSE (0-4) is obtained and output to fine tuner 2.

The FREQ-COUNT (0-7) is FREQ-COUNT (0), FREQ-COUNT (1), FREQ-COUNT (2), FREQ-COUNT (3), FREQ-COUNT (4), FREQ-COUNT (5 ), FREQ-COUNT (6), FREQ-COUNT (7); FUSE (0-4) includes FUSE (0), FUSE (1), FUSE (2), FUSE (3), and FUSE (4).

Fine tuner 2 generates a P value according to the FUSE (0-4) and PROGRAM signals, so that the correct frequency is obtained.

Only the frequency of the square wave OUT of oscillator 3, which is not very precise, since the initial frequency of the present invention is determined by the resistor R and capacitor C of oscillator 3, frequency counter 4 counts the initial frequency and calculates the frequency difference. , PROGRAM signal to Fine Tuner 2 and FREQ-COUNT (0-7) to Comparator 5. Comparator 5 obtains FUSE (0-4) by comparing FREQ-COUNT (0-7) with a preset value, and causes FUSE (0-4) to be output to fine tuner 2. Fine tuner 2 acquires a new value P in accordance with PROGRAM and FUSE (0-4), so that a more accurate frequency can be obtained. PROGRAM and FUSE (0-4) blow out the associated multiple fuses on the IC multilayer. In Fig. 3 (c), R0... R4 is a multiple fuse.

Fine tuner 2 is designed so that not all fuses blow initially. Because of fine tuning of the frequency, at least one fuse is blown according to FUSE (0-4). After the fuse is blown, fine tuner 2 is closed forever to prevent the next programming of the fuse.

Therefore, according to the present invention, accurate frequency can be obtained with only one adjustment. In the case of infrared transmitter ICs, this also causes Vcc to fluctuate, leading to unstable frequencies because large currents in the IR diodes cause transient voltage enhancement during remote transmission of the signal. In contrast, since the reference voltage generator 1 of the present invention performs the function of voltage regulation, Vref does not fluctuate with Vcc, and thus the frequency remains very stable.

In addition, after several months of battery use in the infrared transmitter, for example, the voltage decreases slightly from 3.3 volts to 3.1 volts, while the Vref of the reference voltage generator 1 according to the invention is very stable. In addition, since the period T = RC / P, T is not affected by Vcc and even by Vref, and so is frequency.

The function of the RESET signal is to set the initial state of all circuits related to timing when the device is enabled.

The ENABLE signal can stop oscillator 3 from oscillating if the device is idle; Enable oscillator 3 to oscillate if the device is to be operated.

Those skilled in the art may devise many other modifications after reading the foregoing description without departing from the spirit and scope of the following claims. Therefore, the following claims are meant to cover all such modifications.

See above

Claims (10)

A method of adjusting the frequency of an oscillator mounted on an integrated circuit, the method (a) generating a stable reference voltage Vref divided by 1 / 2Vref and 3 / 4Vref after being generated by the reference voltage generator; (b) inputting the reference voltage Vref to a fine tuner to generate and output a voltage PVref, wherein P is a positive number; (c) a charge / discharge oscillator is input together with the PVref, Vref, 1 / 2Vref, 3 / 4Vref to generate a square wave, the frequency of the square wave being controlled by a resistor and a capacitor of the oscillator; (d) inputting a timing reference clock and the square wave to a frequency counter to count a frequency value of the square wave and generating a PROGRAM signal; (e) the frequency value of the square wave is input to a comparator and compared with a preset value to generate a relative value FUSE (0-n); And (f) the PROGRAM signal and the FUSE (0-n) are input to the fine tuner, and the FUSE (0-n) melts the associated fuse of the fine tuner to obtain a new P value, so that the oscillator is Generating an accurate frequency according to the new P value; How to include. A device for adjusting the frequency of an oscillator mounted on an integrated circuit, the device comprising A reference voltage generator circuit for generating stable reference voltages Vref, 1 / 2Vref and 3 / 4Vref; A fine tuner circuit for receiving a reset signal and the stable reference voltage Vref and generating a voltage of PVref, wherein P is a positive number; A charge / discharge oscillator circuit for receiving an enable signal, the PVref, Vref, 1 / 2Vref, 3 / 4Vref and outputting a square wave, wherein the frequency of the square wave is controlled using a resistor and a capacitor of the oscillator; A frequency counter circuit which receives the reset signal, the timing reference clock and the square wave, counts and outputs a frequency value of the square wave, and outputs a PROGRAM signal to the fine tuner; And A comparator circuit for comparing the frequency value with a preset value to generate a relative value FUSE (0-n) and output the result to the fine tuner; Wherein the FUSE (0-n) melts the associated fuse of the fine tuner such that the fine tuner generates a new P value and the oscillator obtains the correct frequency. The method and apparatus according to claim 1 or 2, wherein P is 0 <P <1. The method and apparatus according to claim 1 or 2, wherein the comparator is a ROM having an internal table. The method and apparatus according to claim 1 or 2, wherein the relative value FUSE (0-n) is an n + 1 bit digital signal. 3. The resistor according to claim 1 or 2, wherein the resistor (having resistor R) and the capacitor (having capacitor C) of the oscillator are used for charging and discharging, the period T being T = RC / P, where R And C is constant, so that by adjusting the P value, an accurate T value and frequency can be obtained, thereby adjusting the frequency of the oscillator mounted on the integrated circuit. 3. The method and apparatus of claim 1 or 2, wherein the fuse is a multiple fuse formed in multiple layers of an IC. 3. The method and apparatus of claim 1 or 2, wherein the fuse can be replaced by another equivalent device or circuit. 3. The method and apparatus of claim 1 or 2, wherein the value of n of the FUSE (0-n) increases with the required precision of the frequency. The frequency of an oscillator mounted on an integrated circuit of claim 2, wherein the ENABLE signal can stop the oscillator from oscillating when the device is in an idle mode and allow the oscillator to oscillate if the device is scheduled to operate. Device to adjust it.