KR100262159B1 - Network Synchronizer Signal Control Circuit of Transcoder for Wireless Subscriber Network System - Google Patents

Abstract

PURPOSE: A network synchronize signal control circuit of transcoder for WLL(wireless local loop) system is provided to prevent conflict between systems when a network synchronize signal is transmitted to a station through a transcoder. CONSTITUTION: A status sensing unit(32) detects status of network synchronize signals for each transcoder. An operation process unit(33) uses signal detected from the status sensing unit(32) and outputs signals which will activate transcoders in orderly manner. A processor control unit(31) controls a network synchronize signal based on signals from the operation process unit(33). The network synchronize signal control circuit consists of the first transcoder, the second transcoder, the third transcoder, and the fourth transcoder. The first state sensing unit is connected with the first transcoder. The second state sensing unit is connected with the second transcoder. The third state sensing unit is connected with the third transcoder. The fourth state sensing unit is connected with the fourth transcoder. The operation process unit(33) is composed of following parts. An NOR1 gate part where output of the first state sensing unit and ground signal are input and the output is connected with the second transcoder. An NOR2 gate part where output of the first status sensing unit, the second status sensing unit, and ground signal are input and the output is connected with the third transcoder. An NOR3 gate part where output of the first status sensing unit, the second status sensing unit, the third status sensing unit, and ground signal are input and the output is connected with the fourth transcoder.

Description

Network Synchronizer Signal Control Circuit of Transcoder for Wireless Subscriber Network System

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wireless subscriber loop (WLL) system. In particular, a system synchronization signal generated based on a synchronization signal extracted from a public switched telephone network (PSTN) does not collide between systems through a transcoder. It relates to a network synchronizer signal control circuit of a transcoder for a wireless subscriber network system that can be transmitted to.

1 is a block diagram showing the configuration of a general wireless subscriber network system currently commercialized.

In FIG. 1, reference numeral 1 denotes a subscriber access device for coupling a specific subscriber, which is capable of combining various communication terminals such as a telephone device 2 and a facsimile 3 and a personal computer 4, and also a part thereof. In the case of a subscriber access device, there is also a structure configured to connect an ISDN terminal.

In addition, reference numeral 5 in the drawing is a base station coupled to the subscriber access device 1 through a radio to provide a wireless communication line for the subscriber access device 1, which is connected to the subscriber access device 1 in a CDMA manner. To be combined. In addition, each base station 5 is able to accommodate a total of 80 channels, for example, to provide a communication channel to at least 64 subscriber access devices 1 simultaneously.

In the drawing, reference numeral 6 denotes a base station controller which performs a control process such as controlling a wireless subscriber network system and providing a communication channel to each subscriber access device, for example, 16 base stations (5 _{1 to} 5 _16). It is configured to accommodate). In addition, the base station controller 6 is coupled to the base station 5 through the E1 link and the LAPD protocol, and the PSTN network and the Internet through the WLL gateway 7 and the data communication matching device 8. It is coupled to the packet network.

By the way, in the above-described wireless subscriber network system, the data transmitted from the base station 5 to the PSTN network is transmitted as ADPCM data, and the data transmitted from the PSTN network to the base station 5 is transmitted as PCM data. There is a need for a transcoder to convert one ADPCM data and PCM data. Therefore, in the conventional system, the above-described transcoder is installed in the base station controller 6 to execute the above-described code conversion.

Fig. 2 shows the main components of the base station controller 6 including the transcoder described above.

2 is a base station connecting apparatus for connecting the base station 5 and the base station controller 6, and 62 is a transcoder for performing the mutual conversion operation of the above-described ADPCM data and PCM data, wherein the base station connecting apparatus The E61 link is coupled between the 61 and the transcoder 62, and 63 denotes various tone signals, dual tone multi-frequency (DTMF) signals, and various kinds for providing the subscriber access device 1 in FIG. Signal generating device for generating and outputting a guide message, 64 is a time switch unit for switching the signal transmission and reception between the transcoder 62 and the network interface unit 65 and the signal generating device 63 to be described later, 65 A network interface unit for coupling the base station controller 6 to the WLL gateway 7. Reference numeral 66 denotes a network synchronizer which generates a predetermined synchronization signal based on the network synchronizer signal of the PSTN network extracted from the network interface unit 65 and inputs it to the time switch unit 64.

In the above configuration, ADPCM data input from the base station connecting device 61 is converted into PCM data through the transcoder 62, and the PCM data thus converted is converted into the time switch unit 64 and the network interface unit 65. ) Is transmitted to the PSTN network.

The PCM data received through the network interface unit 65 and the time switch unit 64 from the PSTN network is input to the transcoder 62, and then the data ADPCM converted by the transcoder 62 is It is transmitted to the base station 5 through the base station access device 61.

However, in general, in transmitting and receiving data or messages between communication systems, it is necessary to synchronize system synchronization, that is, network synchronizer, between the communication systems. In the wireless subscriber network system, the PSTN network coupled to the network interface unit 65 is used. Based on the network synchronizer signal extracted from the network synchronizer 66, the synchronizer device 66 generates a predetermined clock signal and a synchronization signal and supplies the same to the time switch unit 64. Therefore, the time switch unit 64 is sent to the base station connecting device 61 through the transcoder 62.

However, in the base station access device 61, four transcoders are coupled to the E1 link, respectively, and when the synchronization signals are simultaneously received from the respective transcoders 62, they collide with each other, thereby causing an error in system operation.

Therefore, the present invention was created in view of the above circumstances, and when a network synchronization signal of a wireless subscriber network system generated based on a synchronization signal extracted from a PSTN network is transmitted to a base station through a transcoder, a collision occurs between systems. It is an object of the present invention to provide a network synchronizing signal control circuit of a transcoder for a wireless subscriber network system, in which a safe operation of the system can be achieved by being processed so as not to be processed.

1 is a system configuration diagram showing the overall configuration of a typical wireless subscriber network system.

FIG. 2 is a block diagram showing the main components of the base station controller 6 in FIG.

3 is a block diagram showing the configuration of a network synchronizer signal control circuit of a transcoder for a wireless subscriber network system according to an embodiment of the present invention.

4 is a configuration diagram showing the configuration of the transcoder 31 of FIG.

*** Explanation of symbols for the main parts of the drawing ***

5: base station 6: base station controller

61: base station access device 62, 31 (31 _{1 to} 31 ₄ ): transcoder

64: time switch unit (TSU) 65: network interface unit (NIU)

66: network synchronizer 32 (32 _{1 to} 32 ₃ ): state detection unit

33: operation processing unit NOR: NOR gate logic circuit

311, 316: Transceiver 312, 317: Transceiver Controller

A network synchronizer signal control circuit of a transcoder for a wireless subscriber network system according to the present invention for realizing the above object transmits a predetermined network synchronizer signal generated on the basis of a synchronization signal extracted from a PSTN network to a base station. In the base station controller of the wireless subscriber network system equipped with a state detection unit for detecting the network synchronization signal transmission state of each of the transcoder, a plurality of transcoder sequentially by logical combination of the detected signal of each state detection unit And a processing control unit for outputting a signal, which is the basis for operating, to each transcoder, and a processing control unit for controlling the processing operation of the network synchronizer signal based on the signal applied from the operation processing unit.

That is, according to the present invention having the above-described configuration, whether or not the system network synchronizer signal transmission of each transcoder is detected by the state sensing unit and applied to the computation processing unit, is logically operated by the computation processing unit, and the resultant signal is returned. By being applied to each transcoder, each transcoder executes the control operation of the network synchronizer signal processing based on this.

Accordingly, a plurality of transcoders sequentially execute the network synchronizer signal processing operation according to the result signal of the state detection signal of each transcoder.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

Figure 3 shows the configuration of a network synchronizer control circuit of a transcoder for a wireless subscriber network system according to an embodiment of the present invention.

In Fig. 3, reference numeral 31 (31 _{1 to} 31 ₄ ) denotes a transcoder for transmitting a network synchronizing signal applied from the time switch unit 64 to the base station 5 through the base station connecting device 61. The transmission of the network synchronizer signal is controlled based on the predetermined signal applied from the operation processor 33 to be described.

Further, reference numeral 32 (32 _{1 to} 32 ₃ ) denotes an operation state of the transcoder 31 _{1 to} 31 ₃ , i.e., a state of performing synchronization processing for a predetermined synchronization clock CLK and frame synchronization signal FS. Is detected as a predetermined signal, for example, in the case of normal operation, the "High" level signal is thrusted.

And, reference number 33 of each of the state sensing unit (32 _{3 1-32),} which is the condition detecting unit (32 _1), to logical combinations of the detected signal as a calculation processing unit for outputting a predetermined signal to each of the transcoders from The output and ground are input to the NOR gate (NOR1) so that the output is applied to the next transcoder (31 ₂ ), the output of the state sensing unit (32 ₁ ) and the output of the state sensing unit (32 ₂ ), to the ground as the input to the NOR gate (NOR2), and that its output is applied to the following transcoder (31, _3), the outputs of the state detection unit (32 ₂₎ of the state detection unit (32 _1), the state detecting unit (32 _3), to the ground to the input of the NOR gate (NOR3) is that the output is to be applied to the following transcoder (31, _4).

4 shows the configuration of the transcoder 31.

In FIG. 4, reference numeral 311 denotes a transceiver which performs data transmission / reception with respect to the base station access device 61 of FIG. 2, and 312 controls the transceiver 311 and transmits data through the transceiver 311. Is a transceiver controller that performs synchronization processing with respect to the predetermined synchronization clock CLK and the frame synchronization signal FS, and performs execution control based on a predetermined signal applied from the calculation processing unit 33.

In addition, reference numeral 313 denotes a control unit for controlling the entire transcoder 31. Here, the transceiver controller 312 is composed of, for example, an EPLD (Erasable Program Logic Device), and the control unit 313 is a DSP (Digital). Signal Processor). In the drawing, reference numeral 314 denotes a program memory in which a control program for the operation of the controller 313 is stored.

In the drawing, reference numerals 315 (315 _{1 to} 315 ₁₀ ) convert the data input through the control unit 313, that is, ADPCM data input from the base station into PCM data and output the same, and will be described later. Data input from 317, that is, PCM data transmitted from the PSTN network, is a data converter which converts the data into ADPCM data and applies it to the controller 313.

Here, the data converter 315 performs data conversion on a total of 60 channels, for example, each of six channels, that is, six timeslots. In other words, the transcoder 31 can accommodate one E1. In this case, the data converter 315 is configured as a DSP, and the controller 313 loads a predetermined operation program to the data converter 315 under control from a main processor (not shown). The operation of each data converter 315 is controlled.

In the figure, reference numeral 316 denotes a transceiver which performs data transmission / reception processing with the time switch unit 64 of FIG. 2, and 317 controls the driving of the transceiver 316, and also a synchronous clock CLK and a frame synchronization signal. The data output through the transceiver 316 is synchronized with respect to the FS.

Next, the operation of the apparatus according to the present invention having the above-described configuration will be described.

First, PCM data received from the PSTN network through the network interface unit 65 and the time switch unit 64 is converted into ADPCM data through the transcoder 31, and the base station 5 through the base station access device 61. ), And a synchronization signal extracted through the network interface unit 65 is applied to the network synchronizer device 66 so that a predetermined system synchronizer signal is output through the network synchronizer device 66.

The network synchronizer signal output from the network synchronizer device 66 is applied to the time switch unit 64 to be transmitted to the four transcoders 31 _{1 to} 31 ₄ . Accordingly, a predetermined synchronous clock CLK and a frame synchronous signal FS are received through the transceiver 316 of the transcoder 31 and applied to the transceiver controller 317, and then transmitted to the transceiver controller 312. Synchronization processing is performed on the synchronization clock CLK and the frame synchronization signal FS to be transmitted to the base station 5 through the transceiver 311.

Subsequently, as described above, whether or not the operation performed by the synchronization processing through the transceiver controller 312 is transmitted through the state sensing unit 32 is detected, if the transceiver controller of the transcoder 1 (31 ₁ ). When 312 does not operate normally, that is, when no synchronization processing is executed, the state sensing unit 32 ₁ outputs a low level signal and is applied to the arithmetic processing unit 33.

In the arithmetic processing unit 33 receiving the low level signal from the state sensing unit 32 ₁ , the NOR1 gate, the NOR2 gate, and the NOR3 gate are input. Therefore, the NOR1 gate coupled to the transcoder 2 (31 ₂₎ is to output a high level signal to the input of the low-level signal and a ground signal is applied to the second transcoder (31 _2).

Accordingly, when the detection signal input terminal IN is in the low level state, the transcoder 2 3 ₁ 2 which is not operated is operated by applying a high level signal.

On the other hand, the NOR2 gate coupled to the transcoder 3 (31 ₃₎ by the high level signal and the ground signal of a low level signal, the state sensing unit (32 ₂₎ of the state detection unit (32 ₁₎ to enter the The output is a low level signal is output to be applied to the transcoder 3 (31 ₃ ). Therefore, the transcoder 3 (31 ₃₎ is no longer operate by being state detection unit (32 ₃₎ is to be a low level signal is output.

Then, the high level signal of the transcoder 4 (31 ₄₎ and a combined state detection unit NOR3 to the gate of 33 and a low level signal from the state detection unit (32 _1), the state detection unit (32 ₂₎ , to a low-level signal and the ground signal of the state detection unit (32 ₃₎ to the input and the output is to be a low level signal is applied to the following transcoder 4 (31 _4).

Accordingly, the transcoder 4 31 ₄ is not operated by applying a low level signal to the detection signal input terminal IN.

In addition, since the transcoder 2 (31 ₂₎ when in the absence of the synchronization process is running the transcoder 2 (31. _{2) The} state detection unit (32 ₂₎ for detecting the state of the low level signal is outputted, the process as described above The arithmetic process is performed through the arithmetic processing unit 33, so that the next transcoder 3 3 1 ₃ is operated.

Thus, the process as described above, each transcoder (31 ₁ ~31 ₄₎ is to be operated in sequential order.

That is, according to the above embodiment, the operation state is output as a predetermined signal to the transcoders 31 _{1 to 3 3} through the state detecting units 32 _{1 to 3 2 3} for detecting the operation of the synchronization processing execution. The output signal is arithmetic processed by the arithmetic processing unit 33, and the resultant signal is applied to each of the transcoders 31 _{1 to} 31 ₄ to execute a synchronization processing operation according to the applied detection signal.

In addition, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the technical scope of the present invention.

As described above, according to the present invention, when the network synchronization signal of the system is transmitted to the base station through the transcoder so that the collision does not occur between the systems, the transcoder for the wireless subscriber network system which enables the safe operation of the system can be achieved. The network synchronizing signal control circuit can be implemented.

Claims (2)

In the base station controller of the wireless subscriber network system provided with a plurality of transcoder (31 _{1 ~} 31 ₄ ) for transmitting a predetermined network synchronization signal generated based on the synchronization signal extracted from the PSTN network to the base station, A state sensing unit 32 for detecting a network synchronizing signal processing state of each transcoder; An arithmetic processing unit 33 for logically combining the detected signals of each state sensing unit 32 and outputting a signal to each transcoder as a basis for allowing a plurality of transcoders to be operated sequentially; And a processing controller (312) for controlling the processing operation of the network synchronizer signal based on the signal applied from the calculation processing unit (33). The apparatus of claim 1, further comprising a first transcoder (31 ₁ ), a second transcoder (31 ₂ ), a third transcoder (31 ₃ ), and a fourth transcoder (31 ₄ ). (31 _1), the first state detection unit (32 _1), the second transcoder (31 _2), the second state detection unit (32 _2), first, the third state sensor 3 transcoder (31 ₃₎ portion ( 32 ₃ ) are each combined, The calculation processing section 33 is the first state detection unit (32 ₁₎ using as input an output signal and a ground signal from the output of the second and the NOR1 gate coupled to a transcoder (31 _2), the first state detection unit (32 ₁₎ and a second state detection unit to a signal and a ground signal output from the (32 ₂₎ as input to the output is coupled to the to the third transcoder (31 ₃₎ NOR2 gate, and the first The signal and ground signal outputted from the state sensing unit 32 ₁ , the second state sensing unit 32 ₂ , and the third state sensing unit 32 ₃ are inputted, and the output thereof is the fourth transcoder 31 ₄ . A network synchronizer signal control circuit of a transcoder for a wireless subscriber network system, characterized in that it comprises a NOR3 gate coupled to.

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