KR100251923B1 - Sector pulse generation circuit of a hard disc drive - Google Patents

Abstract

PURPOSE: A sector pulse generating circuit is provided to automatically generate a sector pulse to read an ID(Identification) of a data area. CONSTITUTION: A selection signal is outputted to output servo sector numbers from a servo sector number decoder(20). The servo sector numbers containing a target sector and first/second sector pulse information are loaded in a one-frame register(41). In conforming the servo sector numbers, comparators(56-56) outputs high sector pulse generating signals into a decoder(36) by clocking at a raising edge of a system clock. The decoder(36) outputs a selection signal by decoding the sector pulse generating signals. First/second sector pulses are inputted to latch buffers of a sector pulse generator(34) according to the decoded sector pulse generating signals. The sector pulses are inputted to comparators by latching through a servo interrupt. A D-flipflop operates a counter by latching source voltage at a raising edge of an inverted servo gate and generating an input clock. In conforming the counted value to the sector pulses, the comparators output a high signal to output a sector pulse.

Description

Sector pulse generation circuit of the hard disk drive.

1 is a sector pulse timing diagram according to a conventional data sector and servo sector configuration.

2 is a plan view of a portion of a disk partitioned into a servo sector according to an embodiment of the present invention.

3 is a configuration diagram of a servo sector according to an embodiment of the present invention.

4 is a block diagram of a hard disk drive for generating sector pulses according to an embodiment of the present invention.

Figure 5 is an exemplary counting diagram for explaining the servo sector number counting process according to an embodiment of the present invention.

6 is a detailed circuit of a sector pulse generator (34) in accordance with one embodiment of the present invention.

7 is a timing diagram according to an embodiment of the present invention.

The present invention relates to sector pulse generation of a hard disk drive, and more particularly, to a sector pulse generation circuit for automatically generating sector pulses in a hardware configuration.

Hard disk drives have been widely used as auxiliary storage in computer systems as a means of accessing large amounts of data at high speed. In general, tracks arranged concentrically on a disk used as a recording medium of a hard disk drive are divided into a data sector and a servo sector, and the data sector is divided into an ID area and a data area. In this case, in order to read the ID area, that is, every data sector, a sector pulse (SP) must be generated before the ID area and transmitted to the disk data controller. However, the conventional hard disk drive has a problem of increasing the overload of software for implementing a high speed, high capacity hard disk drive by performing sector pulse generation in software. Hereinafter, a conventional sector pulse generation process will be described with reference to FIG. 1.

1 shows the sector format of a specific track in which data sectors and servo sectors are recorded alternately. In FIG. 1, when a servo interrupt (SI) SI is generated for each servo sector, the control unit performs a counting operation based on an index using an internal counter, and simultaneously reads the sector pulse SP value from the memory and sector sector pulses. Load into the generator. In this case, the sector pulse generator generates and outputs a sector pulse SP as shown in FIG. 1 when the value of the loaded sector pulse and the count value of the sector pulse generation counter match. If a track is composed of N servo sectors for high speed and high capacity hard disk drive, the control section must load the sector pulse value into the sector pulse generator for each servo sector and then communicate with the host computer. The margin of time to deal with will gradually decrease. As a result, the data access performance of the hard disk drive is degraded due to excessive overload of the control unit for generating sector pulses.

Accordingly, an object of the present invention is to provide a sector pulse generation circuit capable of automatically generating, in a hardware configuration, a sector pulse used as a reference signal for reading an ID of a data area.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the following description and the annexed drawings, many specific details, such as the number of frames and the number of servo sectors, are shown to provide a more general understanding of the invention. It will be apparent to those skilled in the art that the present invention may be practiced without these specific details. And detailed descriptions of well-known functions and configurations that may unnecessarily obscure the subject matter of the present invention will be omitted.

FIG. 2 shows the structure of only one frame on a disc composed of N servo sectors and divided into four frames. In FIG. 2, main index information is recorded in the servo sector of the vertical axis, and sub index information is recorded in the servo sector of the horizontal axis. In other words, one main index and three sub-index information are recorded on a disc divided into four frames as shown in FIG.

FIG. 3 illustrates a format of a predetermined servo sector in FIG. 2 and may be configured in the following two formats for implementing the present invention. First, the servo sector according to an embodiment of the present invention includes a servo address mark (hereinafter referred to as SAM) region in which a unique pattern is recorded in the data sector and the servo sector as shown in (3a) of FIG. 3, and the SAM. A preamble area in which sync pulses are recorded before the area, a servo sector number area in which numbers for each of the N servo sectors are recorded, a gray code area providing an ID of each track, and an on-track control It consists of a burst area in which a burst signal is recorded. According to another embodiment of the present invention, the configuration of the servo sector includes a SAM area in which a unique pattern is recorded in the data sector and the servo sector as shown in FIG. 3B, and a preamble area in which synchronization pulses are recorded before the SAM area. And an index or subindex area in which a main index (hereinafter referred to as an index) or subindex information is recorded instead of a servo sector number, and a burst area in which a burst signal for on-track control is recorded.

4 is a block diagram of a hard disk drive to which a sector pulse generation circuit according to an exemplary embodiment of the present invention is connected. In FIG. 4, a head disk assembly (HDA) 10 includes a disk used as a recording medium and a head for writing data received from a host computer on the disk in a magnetic form or reading the written data. At this time, the head and the disk are driven by the servo driver. In addition, in the following description, it is assumed that the HDA 10 includes an actuator for horizontally moving the head in the circumferential direction on the disk. The preamplifier 12 connected between the HDA 10 and the read / write channel circuit 14 pre-amplifies the signal picked up by the head in the data read mode and drives the head in the data write mode to drive the read / write channel circuit. The encoded recording data applied from (14) is written onto the disc. The read / write channel circuit 14 waveform-forms a signal input through the preamplifier 12 and outputs it as a digital servo signal (commonly referred to as encoded read data). The SAM detector 16 generates and outputs a SAM detection signal upon detection of a SAM recording pattern from the digital servo signal input from the read / write channel circuit 14. The index decoder and subindex decoder 18 are enabled when the SAM detection signal is input to generate and output an index (hereinafter referred to as I) and a subindex (hereinafter referred to as SUb). The servo sector number decoder 20 is enabled when the SAM detection signal is input from the SAM detector 16 and decodes the servo sector number to output to the A terminal of the MUXA 28. The gray code decoder 22 is enabled at the input of the SAM detection signal and generates and outputs a gray code. The servo interrupt generator 24 is enabled at the input of the SAM detection signal and is servo interrupted at every servo sector. Generate and output the SI. The servo interrupt counter 26 counts the servo interrupt SI input from the servo interrupt generator 24 and outputs the count value to the B terminal of the MUX A 28. At this time, the servo interrupt counter 26 is reset by the index I or the sub index SUI.

Hereinafter, a counting process of the servo sector number according to an embodiment of the present invention will be described with reference to FIG. 5.

5 is a counting example for explaining the servo sector number counting process according to an embodiment of the present invention, the index is generated for each revolution of the spindle motor and the servo interrupt SI is generated for each servo sector and the servo interrupt counter ( 26). In addition, the signal generated from the index decoder and the subindex decoder 18 during the subindex SUI detection is shown. If the one-frame of the disk is composed of five servo sectors as shown in FIG. 2, when the servo interrupt counter 26 counts the servo sector number based on the index signal (a) of FIG. After counting 00, 01, 02, ..., OF, it is reset by the index signal and counts again in the order of 00, 01, 02, .... On the other hand, if the servo interrupt counter 26 counts based on the subindex SUI and the index, the servo interrupt counter 26 is reset by the subindex SUI after counting 01, 02, 03, 04 and 05 as shown in (b). 00,01,... Counting is done in order of 04.

Referring again to FIG. 4, the MUX A 28 is a servo sector number (hereinafter referred to as SN) input from the servo sector number decoder 20 and a counting value input from the servo interrupt counter 26. Is output according to the selection signal SEL (Select) input from the CPU 38. On the other hand, the memory 40 is connected to the CPU 38 that performs the overall control operation of the hard disk drive and stores sector pulse information for each sector. The CPU 38 reads information for generating a new sector pulse from the memory 40 and loads it into the one-frame register 41 before the data zone is switched. In FIG. 4, the N-sector number block is shown assuming that the one-frame is composed of N servo sectors. However, when the one-frame is composed of five servo sectors as shown in FIG. Can be configured. That is, the CPU 38 reads sector pulse generation information for the N servo sector numbers constituting the one-frame from the memory 40 and loads them into the respective servo sector number registers 42 to 48. At this time, the information stored in the servo sector number registers 42 to 48 includes the servo sector number, the first sector pulses ST1S1 ', ST1S2', ST1S3 ', and ST1SN', and the second sector pulses ST2S1 ', ST2S2', and ST2S3 '. , ST2SN ') information. The first sector pulse information and the second sector pulse information are information values of sector pulses required for reading IDs of two data areas existing behind one servo sector.

On the other hand, the comparators 50 to 56 input the servo sector number output from each of the servo sector number registers 42 to 48 through the X terminal, and an 8-bit servo sector input from the MUX A 28 through the Y terminal. In comparison with the number SN, the sector pulse generation signal of the "high" level is output. Each of the D-flip flops 56 to 62 clocks and outputs a sector pulse generation signal output from the Z terminals of the comparators 50 to 56 at the rising edge of the system clock CK. At this time, the sector pulse generation signals Q1 to QN output from the respective D-flip flops 56 to 62 are input to the decoder 36. The decoder 36 decodes the sector pulse generation signal input from the respective D-flip flops 56 to 62 to generate and output the sector pulse selection signal SEL1. Each of the MUX B 30 and the MUX C 32 is outputted from the first sector pulses ST1S1 'and ST1S2' respectively output from the servo sector number registers 42 to 48 according to the sector pulse selection signal SEL1 input from the decoder 36. , ST1S3 ', ST1SN') and second sector pulses ST2S1 ', ST2S2', ST2S3 ', ST2SN' are selectively outputted. At this time, the first sector pulse ST1 is output from the Y terminal of the MUX B 30, and the second sector pulse ST2 is output from the Y terminal of the MUX C 32. The sector pulse generator 34 inputs the first and second sector pulses ST1 and ST2 from the MUX B and C 30 and 32 to generate a sector pulse SP and outputs the sector pulse SP to a disk data controller (DDC). Hereinafter, a process of generating a sector pulse SP will be described with reference to FIG. 6, which shows a detailed configuration diagram of the sector pulse generator 34 according to an embodiment of the present invention.

First, the first sector pulse ST1 output from the MUX B 30 is input to the latch buffer 1 64 through the D terminal, and the second sector pulse ST2 output from the MUX C 32 is the latch buffer 2 through the D terminal. It is input to 70. On the other hand, each of the latch buffers 1, 2 (64, 70) latches and outputs the first and second sector pulses when the servo interrupt SI is input through the enable terminal EN. At this time, the signal output from the latch buffer 1 64 is defined as the first sector pulse output signal ST01, and the signal output from the latch buffer 2 70 is defined as the second sector pulse output signal ST02. On the other hand, the D-flip flop 78 clocks and outputs the input power supply V _DD upon the rising edge of the inverted servo gate signal SG through the inbuffer INV2, and the AND gate A2 outputs the system clock CK and the D-flip flop 78 Input signal ICK (Input Clock) is generated and output by end gating the output signal. Inverter INV3 is connected to the output terminal of the AND gate A2 to invert the input clock ICK. The counter 76 counts the input clock ICK input from the AND gate A2 and outputs it to the comparators 66 and 72.

Meanwhile, the servo interrupt SI output from the servo interrupt generator 26 is inverted through the inverter INV1 and input to the AND gate A1. At the AND gate A1, the power-on reset bar signal (PORB) and the inverted servo interrupt are inverted. An AND gate is used to generate a signal for resetting the counter 76. At this time, when the output signal of the gate A1 is at the "low" level, the counter 76 and the D-flip flop 78 are reset. Each of the comparators 66 and 72 compares the output counting value of the counter 76, which is input through the Y terminal, with the first sector pulse output signal ST01 and the second sector pulse output signal ST02. Output sector level pulse SP. On the other hand, each of the D-flip flops 68 and 74 latches the comparator 66 and 72 sector pulses SP at the rising edge of the input clock ICKB inverted through the inverter INV3, and the OR gate OR1 is the D-flip flop ( 68, 74) Outputs the sector pulse SP generated by orgating each output signal to the DDC.

FIG. 7 is a timing diagram of signals read from a predetermined track having the format (3a) of FIG. 3 of the servo sector configuration according to the embodiment of the present invention. Referring to FIG. 7, SG shows a servo gate enabled only in a servo sector, and SI shows a servo interrupt generated in the burst areas A, B, C, and D of each servo sector. In addition, the servo sector number shows the servo sector number read from the memory 40 by the CPU 38 and loaded into the one-frame register 41, and Q1, Q2, and Q3 each represent the D flip flop 56 of FIG. The timing of the sector pulse generation signal latched from 58, 60 is shown.

Hereinafter, a process of generating a sector pulse SP according to an embodiment of the present invention will be described with reference to FIGS. 4 to 7.

First, assuming that a disc on which a servo sector number in the servo sector is recorded is used as a recording medium, the CPU 38 indicates that the servo sector number decoded and output from the servo sector number decoder 20 in FIG. 4 is MUXA (28). Outputs the selection signal SEL to be output through In addition, the CPU 38 reads the servo sector number and the first and second sector pulse information of the specific zone including the target sector from the memory 40 in response to receiving the data read / write command, thereby the one-frame register 41. Load in Thereafter, the comparators 56 to 56 output a sector pulse generation signal of " high " level when the servo sector numbers input through the X terminal and the Y terminal are the same, and the sector pulse generation signal is raised when the system clock CK rises. It is clocked in and input to the decoder 36 through the D flip-flops 56-62. At this time, the timing of the sector pulse generation signals Q1, Q2, and Q3 input to the decoder 36 is as shown in FIG. The decoder 36 then decodes the sector pulse generation signals Q1, Q2, and Q3 sequentially input and outputs the selection signal SEL1 to the MUX B, C (30, 32). At this time, the selection signal SEL1 output to the MUX B, C (30, 32) is determined by decoding the sector pulse generation signals (Q1, Q2, Q3). That is, if the decoding value is "1", the first sector pulse ST1S1 'and the second sector pulse ST2S1' thrusted from the servo sector number 1 42 are output through MUX B, C (30, 32), respectively. If the decoding value is "2", the first sector pulse ST1S2 'and the second sector pulse ST2S2' output from the servo sector number 2 44 are output through MUX B, C (30, 32), respectively. . Therefore, according to the decoding values of the sector pulse generation signals Q1, Q2, and Q3, the first and second sector pulses are sequentially latched by the sector pulse generator 34 through the MUX B, C (30, 32). It is inputted as 1,2 (64,70).

ST1 and ST2 respectively input to the latch buffers 1 and 2 (64 and 70) are latch outputs ST01 and ST02 by the servo interrupt SI generated in the burst area, respectively, to the comparators 66 and 72 of FIG. In this case, the counter 76 waits for counting the input clock ICK after being reset by the servo interrupt SI. On the other hand, the D flip-flop 78 for generating the input clock latches the power supply voltage V _DD upon the rising edge of the inverted servo gate SG through the inverter INV2 to generate the input clock ICK to count the counter 76. Let's do it. The comparators 66 and 72 then have a timing as shown in FIG. 7 by outputting a "high" level signal when the counting value of the counter 76 is the same as ST01 and ST02 input through the X terminal. The sector pulse SP can be output.

Meanwhile, in the exemplary embodiment of the present invention, a process of generating sector pulses on the assumption of a servo sector format in which a servo sector number is recorded has been described. However, the sector pulses are generated using the servo sector format shown in FIG. You can also create Note that the CPU 38 controls the selection signal SEL such that the counting value output from the servo interrupt count 26 is output to the servo sector number comparators 50, 52, 54, and 56 through the MUXA 28. .

As described above, the present invention can realize a high-speed, high-capacity hard disk drive by reducing the overload for servo control of the controller by automatically generating a sector pulse required for reading information recorded in the data sector in a hardware configuration. There is this.

Claims (7)

By dividing the plurality of servo sectors into one frame, a disk having a plurality of frames, a memory in which sector pulse information for generating sector pulses is recorded, and a corresponding one-frame from the memory before each frame is switched during data read / write A sector pulse generation circuit of a hard disk drive having control means for reading and outputting sector pulse information of If the sector pulse information of the one-frame read out by the control means is the same as the servo sector number read from the disk, the corresponding sector pulse generation signal is generated sequentially, and the generated sector pulse generation signal is generated during the enable period of the servo gate. And a sector pulse generation circuit for generating and outputting a sector pulse for a corresponding servo sector when the system clock is counted. The method of claim 1, wherein the sector pulse generation circuit; A one-frame register for temporarily storing sector pulse information loaded by the control means; A comparator for sequentially generating and outputting a sector pulse generation signal when the servo sector number read from the disk and the sector pulse information of the one-frame register are the same; A decoder which decodes a sector pulse generation signal input from the comparator and generates and outputs a selection signal for selecting sector pulse information output from the one-frame register; A multiplexer for outputting the sector pulse information according to a selection signal input from the decoder; And a sector pulse generator for generating and outputting sector pulses for the corresponding servo sector when the sector pulse information input from the multiplexer is equal to the system clock counted and output during the enable period of the servo gate. The apparatus of claim 2, wherein the sector pulse generator comprises: a sector pulse generator; A latch buffer for latching sector pulse information input from the multiplexer upon servo interrupt input; A flip-flop for latching a power supply voltage during the servo gate enable period; An AND gate for outputting a system clock during an enable period of a power supply voltage latched from the flip-flop; A counter for counting and outputting a system clock input from the AND gate; A second comparator for generating and outputting a sector pulse when the sector pulse information and the counting value respectively input from the multiplexer and the counter are the same; And a second flip-flop for latching out the sector pulses of said second comparator upon the rising edge of said inverted system clock. Index or sub-index information is recorded for each servo sector, and a plurality of servo sectors are divided into one frame, a disk having a plurality of frames, a memory in which sector pulse information for generating sector pulses is recorded, and data read / write time. A hard disk drive sector pulse generation circuit comprising control means for reading out and outputting sector pulse information of a corresponding one-frame from the memory before the frame is switched. A decoder for decoding and outputting an index or subindex from the digital servo signal read from the disc; A servo interrupt counter reset by an index or subindex signal output from the decoder and counting and outputting a servo interrupt; When the sector pulse information of the one-frame read by the control means is equal to the counting value input from the servo interrupt counter, the corresponding sector pulse generation signal is sequentially generated, and the generated sector pulse generation signal is enabled by the servo gate. A sector pulse generation circuit comprising generating and outputting a sector pulse for a corresponding servo sector when the system clock is counted and output during a period. The method of claim 4, wherein the sector pulse generation circuit; A one-frame register for temporarily storing sector pulse information loaded by the control means; A comparator for sequentially generating and outputting a sector pulse generation signal when the servo sector number read from the disk and the sector pulse information of the one-frame register are the same; A second decoder which decodes a sector pulse generation signal input from the comparator and generates and outputs a selection signal for selecting sector pulse information output from the one-frame register; A multiplexer for outputting the sector pulse information according to a selection signal input from the decoder; And a sector pulse generator configured to generate and output sector pulses for the corresponding servo sector when the sector pulse information input from the multiplexer is equal to the system clock counted and output during the enable period of the servo gate. . The method of claim 5, wherein the sector pulse generator; A latch buffer for latching sector pulse information input from the multiplexer upon servo interrupt input; A flip-flop for latching a power supply voltage during the servo gate enable period; An AND gate for outputting a system clock during an enable period of a power supply voltage latched from the flip-flop; A counter for counting and outputting a system clock input from the AND gate; A second comparator for generating and outputting a sector pulse when the sector pulse information and the counting value respectively input from the multiplexer and the counter are the same; And a second flip-flop for latching out the sector pulses of said second comparator upon the rising edge of said inverted system clock. 7. The sector pulse generation circuit according to claim 6, wherein the index or subindex information is written after the servo address mark.