KR100238438B1 - Method of formation of metallization film for anti-corrosion in dry etching of al and alcu film - Google Patents
Method of formation of metallization film for anti-corrosion in dry etching of al and alcu film Download PDFInfo
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- KR100238438B1 KR100238438B1 KR1019960055693A KR19960055693A KR100238438B1 KR 100238438 B1 KR100238438 B1 KR 100238438B1 KR 1019960055693 A KR1019960055693 A KR 1019960055693A KR 19960055693 A KR19960055693 A KR 19960055693A KR 100238438 B1 KR100238438 B1 KR 100238438B1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
- H01L21/32138—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only pre- or post-treatments, e.g. anti-corrosion processes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
- H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
Abstract
본 발명은 금속배선용 박막의 형성방법에 관한 것으로, 특히, 반도체 소자의 금속배선용 박막으로 사용되는 알루미늄(Al)과 알루미늄/구리(AlCu)박막의 건식식각시 부식을 방지할 수 있는 금속배선용 박막을 형성하는 방법에 관한 것이다. 본 발명에 따른 금속배선용 박막의 형성방법은, 반도체 제조공정중 금속배선공정에 있어서, 유기금속화학기상증착(Metal Organic Chemical Vapor Deposition : MOCVD)법에 의해 반도체 기판(1)상에 알루미늄 또는 알루미늄/구리의 단결정 금속박막을 증착하는 과정을 포함하는 것을 특징으로 하며, 본 발명에 따르면, 금속배선용 박막의 건식식각후, 금속배선(5a)의 단면 형상이 종래기술과 달리 미끈하며, 건식식각후에도 금속배선(5a)이 전혀 부식되지 않으므로, 금속박막의 일렉트로마이그레이션(electro-migration)현상을 억제하는 효과를 가져와, 배선의 전기적 신뢰성에 매우 좋은 효과가 있다.The present invention relates to a method for forming a metal wiring thin film, and more particularly, to a metal wiring thin film capable of preventing corrosion when dry etching aluminum (Al) and aluminum / copper (AlCu) thin films used as metal wiring thin films for semiconductor devices And a method of forming the same. The method for forming a metal wiring thin film according to the present invention is a method for forming a metal wiring thin film on a semiconductor substrate 1 by metal organic chemical vapor deposition (MOCVD) The present invention is characterized in that after the dry etching of the metal wiring thin film, the sectional shape of the metal wiring 5a is different from that of the prior art, and even after the dry etching, Since the wiring 5a is not corroded at all, it has an effect of suppressing the electro-migration phenomenon of the metal thin film and has an excellent effect on the electrical reliability of the wiring.
Description
본 발명은 금속배선용 박막의 형성방법에 관한 것으로, 특히, 반도체 소자의 금속배선용 박막으로 사용되는 알루미늄(Al)과 알루미늄/구리(AlCu)박막의 건식식각시 부식을 방지할 수 있는 금속배선용 박막을 형성하는 방법에 관한 것이다.The present invention relates to a method for forming a metal wiring thin film, and more particularly, to a metal wiring thin film capable of preventing corrosion when dry etching aluminum (Al) and aluminum / copper (AlCu) thin films used as metal wiring thin films for semiconductor devices And a method of forming the same.
최근, 반도체 소자의 발전에 따라, 메가 DRAM 시대에서 기가 DRAM 시대로 집적도가 변화되는 추세에 있으며, 이와 같이 반도체 소자의 집적도가 높아지고 소자의 동작전압이 점점 낮아질수록, 반도체 소자를 구성하는 금속배선도 저항이 낮은 물질로 대체되고 있으며, 배선의 종류도 달라지고 있다.2. Description of the Related Art Recently, with the development of semiconductor devices, the degree of integration has been changing from the mega DRAM era to the gigabyte era. As the degree of integration of the semiconductor devices increases and the operating voltages of the devices become lower, Have been replaced by lower materials, and the types of wires are also changing.
종래에는, 배선재료로서 알루미늄을 주로 사용하여 왔으나, 알루미늄 배선을 사용하는 경우, 일렉트로마이그레이션(electro-migraion)등의 기술적 문제로 인하여, 알루미늄 합금 형태로 사용하기도 한다. 이러한 알루미늄의 합금 중에서 구리를 함유한 알루미늄/구리(AlCu)의 혼합형태인 금속배선이 점차 개발되고 있다. 이와 같은 구리 성분의 첨가는 일렉트로마이그레이션 현상을 억제할 수 있는 장점은 있으나, 반도체 제조공정에 있어서 식각에 의한 미세패턴 형성시 식각가스에 의해 금속배선이 쉽게 부식(corrosion)되어, 금속배선공정 및 회로의 신뢰도 측면에서 문제점을 안고 있었다.Conventionally, aluminum has been mainly used as a wiring material. However, when aluminum wiring is used, it is also used as an aluminum alloy due to technical problems such as electro-migration. Among these aluminum alloys, metal wiring, which is a mixed type of aluminum / copper (AlCu) containing copper, is gradually being developed. The addition of such a copper component has the advantage of suppressing the electromigration phenomenon, but the metal wiring is easily corroded by the etching gas during the formation of the fine pattern by the etching in the semiconductor manufacturing process, In terms of reliability.
일반적으로, 반도체 소자의 제조시 금속배선용 박막을 형성하기 위해서는, 알루미늄이나 알루미늄/구리 합금을 스퍼터링(sputtering)방법이나 증착(evaporation)방법에 의해 금속박막을 반도체 기판 상에 증착시킨다. 그후, 금속배선의 패턴형성을 위하여, 통상적으로, 상기한 알루미늄이나 알루미늄/구리 박막을 습식식각(wet etching)이나 건식식각(dry etching)을 사용하여 식각하여 금속배선을 형성하게 된다.In general, in order to form a metal wiring thin film in the production of a semiconductor device, a metal thin film is deposited on a semiconductor substrate by a sputtering method or an evaporation method of aluminum or an aluminum / copper alloy. Then, in order to form a metal wiring pattern, the aluminum or the aluminum / copper thin film is typically etched using wet etching or dry etching to form a metal wiring.
그러나, 반도체 소자의 집적도가 높아짐에 따라, 상기한 습식식각은 배선공정의 한계에 부딪히게 되어, 최근에는 건식식각 기술이 주로 사용되고 있다. 이러한 건식식각에서는, SiCl4, BCl3Cl2등의 특수 가스를 사용하여 형성한 플라즈마를 이용하는데, 특히, 금속배선의 패턴형성에 있어서, 플라즈마에 의해 형성된 염소기(Cl)와 금속배선용 박막의 표면에 존재하는 알루미늄과의 화학반응에 의하여 식각이 이루어진다.However, as the degree of integration of semiconductor devices increases, the above-described wet etching is confronted with the limitations of the wiring process, and dry etching techniques are mainly used in recent years. In this dry etching, a plasma formed by using a special gas such as SiCl 4 or BCl 3 Cl 2 is used. Particularly, in the pattern formation of the metal wiring, the chlorine group (Cl) formed by the plasma and the metal wiring thin film Etching is performed by chemical reaction with aluminum present on the surface.
그러나, 상기한 종래기술에 있어서는, 금속배선용 박막을 형성하기 위하여 알루미늄이나 알루미늄과 구리의 혼합물을 반도체 기판 상에 증착할 경우, 증착된 알루미늄과 구리의 혼합물은 증착이 이루어진 후 입자(grain)들 사이에 입자경계면(grain boundary)이 다량으로 존재하게 되어, 상기한 금속박막을 건식식각시에는, 플라즈마내에서 형성된 염소기(Cl)가 입자경계면에 잔존하게 되어, 건식식각후에 금속배선의 부식이 입자경계면에서 발생된다는 문제점이 있었다.However, in the above conventional technology, when a mixture of aluminum or aluminum and copper is deposited on a semiconductor substrate to form a thin film for metal wiring, a mixture of deposited aluminum and copper is deposited between the grains (Cl) formed in the plasma remains on the grain boundary surface when the above-mentioned metal thin film is dry-etched, so that corrosion of the metal wiring after the dry etching is prevented, So that it is generated at the interface.
도 1a 및 도 1b는 종래기술에 따른 금속배선용 박막 증착 후의 알루미늄 또는 알루미늄/구리 박막에 대한 측단면도 및 표면 사진으로서, 도면 부호 1은 반도체 기판을 나타내고, 2는 상기한 반도체 기판(1)상에 알루미늄이나 알루미늄/구리 합금을 스퍼터링법이나 증착방법에 의해 증착시켜 형성된 알루미늄 또는 알루미늄/구리 박막이다. 상기한 알루미늄 또는 알루미늄/구리 박막(2)은 금속 소오스(source)에서 전기적 또는 물리적 방법으로 입자를 떼어내어 반도체 기판(1) 상에 증착하여 형성된 것으로, 도 1b에서 볼 수 있듯이, 수많은 작은 입자(3)들이 모여 금속박막의 층을 이루게 되며, 입자(3)들 사이에는 입자경계면(4)이 존재하게 된다.1A and 1B are side cross-sectional views and front and side views, respectively, of aluminum or an aluminum / copper thin film after deposition of a metal wiring thin film according to a related art, wherein reference numeral 1 denotes a semiconductor substrate, 2 denotes a semiconductor substrate 1 Aluminum or aluminum / copper alloy formed by vapor deposition of aluminum or an aluminum / copper alloy by a sputtering method or a vapor deposition method. As shown in FIG. 1B, the aluminum or aluminum / copper thin film 2 is formed by electrically or physically separating particles from a metal source and depositing them on the semiconductor substrate 1, 3 are gathered to form a layer of a metal thin film, and a particle boundary surface 4 is present between the particles 3.
상기한 종래기술에 따르면, 금속박막의 증착은 대부분 다결정의 형태로 알루미늄이나 알루미늄/구리 박막(2)이 증착되며, 상기한 바와 같이 다결정의 형태로 증착이 이루어질 경우에는, 금속박막(2)내에 입자경계면(4)이 존재하여, 금속배선의 형성을 위한 건식식각 공정가스인 염소(Cl2) 등에서 발생된 염소기가 건식식각후 입자경계면(4)에 잔존하게 되어, 쉽게 금속표면이 부식된다. 즉, 금속박막(2)의 입자 경계면(4)에 잔존하는 염소기(Cl)가 대기중의 수분(H2O)과 반응하여 염화수소(HCl)를 형성하고, 이렇게 형성된 염화수소가 알루미늄 또는 알루미늄/구리 배선을 부식하게 된다. 이와 같이 식각이 이루어진 후 금속박막(2)의 입자경계면(4)에서만 염소기가 잔존하는 이유는, 입자경계면(4)이 열에너지적으로 불안정한 상태이기 때문으로 판단되고 있다.According to the above-described conventional techniques, aluminum or aluminum / copper thin film 2 is deposited in the form of polycrystalline in most cases of deposition of the metal thin film. When deposition is performed in the form of polycrystal as described above, The particle boundary surface 4 exists and the chlorine groups generated by the dry etching process gas such as chlorine (Cl 2 ) for forming the metal interconnection remain on the particle boundary surface 4 after the dry etching, and the metal surface is easily corroded. That is, the chlorine group (Cl) remaining in the grain boundary surface (4) of the metal thin film (2) reacts with the moisture (H 2 O) in the atmosphere to form hydrogen chloride (HCl) Copper wiring will corrode. The reason why the chlorine group remains only in the grain boundary surface 4 of the metal thin film 2 after etching is considered to be because the grain boundary surface 4 is in an unstable thermal energy state.
도 2a 및 도 2b는 도 1에 나타낸 종래기술에 따른 금속배선용 박막의 건식식각후 얻어진 알루미늄 또는 알루미늄/구리 배선의 측단면도 및 표면 사진이다. 도 2a에서 볼 수 있듯이, 금속배선용 박막(2)의 건식식각 후, 금속배선(2a)의 단면 형상이 미끈하지 않고, 많이 일그러진 것을 확인할 수 있다. 이것은, 도 2b에서 볼 수 있듯이, 건식식각 반응시 반응가스의 잔류에 의해 금속박막(2)의 입자경계면(4) 부분에 대한 알루미늄 또는 알루미늄/구리 배선 부분(도 2b의 입자경계면 주위의 흰 부분)이 부식되어 있는 것으로부터 재확인할 수 있다.2A and 2B are side cross-sectional and surface photographs of an aluminum or aluminum / copper wiring obtained after dry etching of a metal wiring thin film according to the prior art shown in FIG. As can be seen from FIG. 2A, it can be seen that the cross-sectional shape of the metal wiring 2a after the dry etching of the metal wiring thin film 2 is not smooth, but is greatly distorted. This is because, as shown in FIG. 2B, the aluminum or aluminum / copper wiring part (the white part around the particle boundary surface in FIG. 2B) of the metal thin film 2 due to the residual reaction gas during the dry etching reaction, ) Can be reaffirmed from the fact that it is corroded.
결국, 본 발명은 상기한 종래기술의 문제점을 해결하기 위한 것으로, 본 발명의 목적은, 반도체 소자의 금속배선용 박막으로 사용되는 금속박막의 건식식각후 부식발생을 효과적으로 방지할 수 있는 금속배선용 박막 형성방법을 제공함에 있다.SUMMARY OF THE INVENTION It is, therefore, an object of the present invention to provide a thin film for metal wiring capable of effectively preventing corrosion after dry etching of a metal thin film used as a thin film for metal wiring of a semiconductor device Method.
본 발명자들은, 반도체 소자의 금속배선 형성시, 금속배선 부식발생의 주요인인 금속박막 표면의 입자경계면의 생성을 방지하기 위하여, 상기한 단결정의 금속박막을 반도체 기판 상에 증착하여 금속배선용 박막을 형성함으로써, 건식식각후의 금속배선의 부식발생을 효과적으로 방지할 수 있다는 사실을 알아내고, 예의 연구를 거듭한 결과 본 발명을 완성하기에 이르렀다.The inventors of the present invention formed a thin metal film for a metal wiring by depositing a metal thin film of the above single crystal on a semiconductor substrate in order to prevent generation of a grain boundary surface of a metal thin film surface, It is possible to effectively prevent the occurrence of corrosion of the metal wiring after dry etching. As a result of intensive studies, the present invention has been completed.
도 1a 및 도 1b는 종래 기술에 따른 금속배선용 박막 증착 후의 Al 또는 AlCu 박막에 대한 측단며도 및 표면 사진,1A and 1B are a side view and a surface photograph of Al or an AlCu thin film after deposition of a metal wiring thin film according to the prior art,
도 2a 및 도 2b는 도 1에 나타낸 종래기술에 따른 금속배선용 박막의 건식식각후 얻어진 Al 또는 AlCu 배선의 측단면도 및 표면 사진,FIGS. 2A and 2B are side sectional views and surface photographs of Al or AlCu wirings obtained after dry etching of the metal wiring thin film according to the prior art shown in FIG. 1,
도 3a 및 도 3b는 본 발명에 따라 형성된 Al 또는 AlCu 박막에 대한 측단면도 및 표면 사진,3A and 3B are side sectional views and surface photographs of an Al or AlCu thin film formed according to the present invention,
도 4a 및 도 4b는 도 3에 나타낸 본 발명에 따른 금속배선용 박막의 건식식각후 얻어진 Al 또는 AlCu 배선의 측단면도 및 표면 사진.4A and 4B are side cross-sectional and surface photographs of Al or AlCu wirings obtained after dry etching of the metal wiring thin film according to the present invention shown in FIG.
* 도면의 주요부분에 대한 부호의 설명DESCRIPTION OF THE REFERENCE NUMERALS
1 : 반도체 기판 2 : Al 또는 AlCu 박막1: Semiconductor substrate 2: Al or AlCu thin film
2a : Al 또는 AlCu 배선 3 : 입자2a: Al or AlCu wiring 3: particles
4 : 입자경계면 5 : Al 또는 AlCu 박막4: Particle interface 5: Al or AlCu thin film
5a : Al 또는 AlCu 배선5a: Al or AlCu wiring
상기한 목적을 달성하는 본 발명에 따른 금속배선용 박막의 형성방법은,According to another aspect of the present invention, there is provided a method for forming a metal wiring thin film,
반도체 제조공정중 금속배선공정에 있어서,In a metal wiring process during a semiconductor manufacturing process,
유기금속화학기상증착(Metal Organic Chemical Vapor Deposition : MOVCD)법에 의해 반도체 기판 상에 알루미늄 또는 알루미늄/구리의 단결정 금속박막을 증착하는 과정을 포함하는 것을 특징으로 한다.And depositing a thin film of a single crystal of aluminum or aluminum / copper on the semiconductor substrate by a metal organic chemical vapor deposition (MOVCD) method.
이하, 본 발명에 따른 금속배선용 박막의 형성방법에 대하여 첨부도면을 참조하여 보다 상세히 설명한다.Hereinafter, a method of forming a metal wiring thin film according to the present invention will be described in detail with reference to the accompanying drawings.
도 3a 및 도 3b는 본 발명에 따라 형성된 알루미늄 또는 알루미늄/구리 박막에 대한 측단면도 및 표면 사진으로, 도면부호 5는 본 발명에 의해 MOCVD 장치를 사용하여 반도체 기판(1)상에 증착시킨 알루미늄 또는 알루미늄/구리의 단결정 금속박막을 나타낸다. 도 3b에서 볼 수 있듯이, 본 발명에 의하면, 반도체 기판(1)상에 단결정의 형태로 금속박막(5)이 증착되기 때문에, 증착된 금속박막(5)에는 종래 기술에서와 같은 입자경계면이 전혀 형성되어 있지 않아, 금속박막(5)의 표면이 매우 깨끗함을 확인할 수 있다.3A and 3B are side cross-sectional views and surface photographs of an aluminum or aluminum / copper thin film formed in accordance with the present invention and reference numeral 5 is an aluminum or aluminum / copper / aluminum thin film deposited on a semiconductor substrate 1 using an MOCVD apparatus according to the present invention. Aluminum / copper single crystal metal thin film. 3B, according to the present invention, since the metal thin film 5 is deposited on the semiconductor substrate 1 in the form of a single crystal, the deposited metal thin film 5 has no particle boundary surface as in the prior art And the surface of the metal thin film 5 is very clean.
종래에는, MOCVD 방법으로 특정한 금속박막을 주로 증착하여 왔으나, 알루미늄이나 구리 등은 MOCVD 방법에 의해 박막증착이 전혀 이루어지지 않았다. 본 발명에서와 같이, 알루미늄 또는 알루미늄/구리의 혼합형 금속박막을 MOCVD 방법에 의해 반도체 기판 상에 증착할 경우, 알루미늄이나 알루미늄/구리의 박막은 단결정 형태로의 증착이 가능하다.Conventionally, a specific metal thin film is mainly deposited by the MOCVD method, but thin film deposition is not performed on the aluminum or copper by the MOCVD method at all. As in the present invention, when a mixed metal thin film of aluminum or aluminum / copper is deposited on a semiconductor substrate by MOCVD, a thin film of aluminum or aluminum / copper can be deposited in a single crystal form.
상기한 바와 같이, 알루미늄 또는 알루미늄/구리 박막의 부식현상은 입자경계면에서 일어나므로, 알루미늄이나 알루미늄과 구리의 혼합형 박막을 증착시 금속입자의 경계면을 없애기 위해 단결정의 금속박막을 증착하게 되면, 입자의 경계면이 생성되지 않으므로, 건식식각 공정가스인 염소에 의해서도 알루미늄이나 알루미늄/구리의 금속배선이 전혀 부식되지 않게 된다.As described above, since the corrosion phenomenon of aluminum or aluminum / copper thin film occurs at the grain boundary surface, when a thin metal film of single crystal is deposited to remove the interface between metal particles when aluminum or aluminum and copper mixed thin film is deposited, Since the interface is not formed, the metal wiring of aluminum or aluminum / copper is not corroded at all by chlorine, which is a dry etching process gas.
도 4a 및 도 4b는 도 3에 나타낸 본 발명에 따른 금속배선용 박막의 건식식각 후 얻어진 알루미늄 또는 알루미늄/구리 배선의 측단면도 및 표면 사진으로서, 도 4a에서 볼 수 있듯이, 금속배선용 박막(5)의 건식식각 후, 금속배선(5a)의 단면 형상이 종래기술과 달리 미끈하며, 도 4b에서 볼 수 있듯이, 건식식각후에도 금속배선(5a)이 전혀 부식되지 않았음을 확인할 수 있다.4A and 4B are side sectional views and surface photographs of the aluminum or aluminum / copper wiring obtained after dry etching of the metal wiring thin film according to the present invention shown in FIG. 3, and as shown in FIG. 4A, the metal wiring thin film 5 After the dry etching, the sectional shape of the metal wiring 5a is different from that of the prior art. As shown in FIG. 4B, it can be seen that the metal wiring 5a is not corroded at all after dry etching.
상기한 본 발명을 사용할 경우, 금속배선 부식의 원인이 되는 입자경계면을 제거할 수 있으므로, 금속박막의 일렉트로마이그레이션 현상을 억제하는 효과를 가져와, 배선의 전기적 신뢰성에 매우 좋은 효과가 있다. 또한, 알루미늄과 알루미늄/구리 박막의 배선시 금속부식의 원인이 되는 입자경계면을 제거하게 되어, 반도체 제조공정에서 야기되는 금속배선의 부식현상을 원천적으로 해결할 수 있다.When the present invention described above is used, the grain boundary surface which causes corrosion of the metal wiring can be removed, so that the electromigration phenomenon of the metal thin film is suppressed, and the electrical reliability of the wiring is very good. In addition, since the grain boundary surface which causes metal corrosion during wiring of aluminum and aluminum / copper thin film is removed, the corrosion phenomenon of the metal wiring caused in the semiconductor manufacturing process can be solved originally.
따라서, 본 발명에 따른 금속배선은 부식발생이 없으므로, 고집적 회로에 적용했을 때, 공정의 안정성, 우수한 전기적 신뢰성과 저렴한 재료비와 공정 각 층과의 상호관계가 이미 개발된 기술을 접목할 수 있기 때문에 매우 용이하게 된다.Therefore, since the metal wiring according to the present invention does not cause corrosion, when applied to a highly integrated circuit, the process stability, excellent electrical reliability, low material cost, and mutual relationship with each process layer can be combined with the already developed technology It becomes very easy.
Claims (1)
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019960055693A KR100238438B1 (en) | 1996-11-20 | 1996-11-20 | Method of formation of metallization film for anti-corrosion in dry etching of al and alcu film |
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| Application Number | Priority Date | Filing Date | Title |
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| KR1019960055693A KR100238438B1 (en) | 1996-11-20 | 1996-11-20 | Method of formation of metallization film for anti-corrosion in dry etching of al and alcu film |
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| KR100792358B1 (en) * | 2006-09-29 | 2008-01-09 | 주식회사 하이닉스반도체 | Metal line in semiconductor device and method for forming the same |
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| KR101541517B1 (en) | 2014-03-26 | 2015-08-03 | 부산대학교 산학협력단 | Transparent electrode using single crystal copper with nano-netted multi-layer and fabricating method thereof |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63131544A (en) * | 1986-11-21 | 1988-06-03 | Seiko Epson Corp | Semiconductor device |
| JPH0864538A (en) * | 1994-08-22 | 1996-03-08 | Fujitsu Ltd | Thin film growing method |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63131544A (en) * | 1986-11-21 | 1988-06-03 | Seiko Epson Corp | Semiconductor device |
| JPH0864538A (en) * | 1994-08-22 | 1996-03-08 | Fujitsu Ltd | Thin film growing method |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100792358B1 (en) * | 2006-09-29 | 2008-01-09 | 주식회사 하이닉스반도체 | Metal line in semiconductor device and method for forming the same |
| US7648904B2 (en) | 2006-09-29 | 2010-01-19 | Hynix Semiconductor Inc. | Metal line in semiconductor device and method for forming the same |
| US8120113B2 (en) | 2006-09-29 | 2012-02-21 | Hynix Semiconductor Inc. | Metal line in semiconductor device |
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