KR100226483B1 - Method of forming a device isolation film of semiconductor device - Google Patents
Method of forming a device isolation film of semiconductor device Download PDFInfo
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- KR100226483B1 KR100226483B1 KR1019960061943A KR19960061943A KR100226483B1 KR 100226483 B1 KR100226483 B1 KR 100226483B1 KR 1019960061943 A KR1019960061943 A KR 1019960061943A KR 19960061943 A KR19960061943 A KR 19960061943A KR 100226483 B1 KR100226483 B1 KR 100226483B1
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- semiconductor substrate
- oxide film
- mask layer
- porous layer
- field oxide
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76227—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials the dielectric materials being obtained by full chemical transformation of non-dielectric materials, such as polycristalline silicon, metals
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
Abstract
본 발명은 반도체장치의 소자분리방법에 관한 것으로서 반도체기판 상에 마스크층을 증착하고 패터닝하여 상기 반도체기판의 소정 부분을 노출시키는 개구를 형성하는 공정과, 상기 반도체기판의 노출된 부분을 등방성으로 양극 반응시켜 다공질층을 형성하는 공정과, 상기 다공질층을 열산화하여 필드산화막을 형성하는 공정과, 상기 반도체기판이 노출되도록 상기 마스크층을 제거하는 공정을 구비한다. 따라서, 버즈 비크의 형성이 억제되므로 항복전압을 크게할 수 있을 뿐만 아니라 누설전류가 흐르는 것을 방지할 수 있으며, 또한, 필드산화막의 상부 표면이 반도체기판의 표면 보다 높게되는 것을 억제하므로 평탄도를 향상시킬 수 있다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a device isolation method for a semiconductor device, comprising: forming an opening for exposing a predetermined portion of the semiconductor substrate by depositing and patterning a mask layer on the semiconductor substrate; and isotropically anodeing the exposed portion of the semiconductor substrate. Reacting to form a porous layer, thermally oxidizing the porous layer to form a field oxide film, and removing the mask layer to expose the semiconductor substrate. Therefore, the formation of the buzz beak is suppressed, thereby not only increasing the breakdown voltage but also preventing the leakage current from flowing, and also preventing the upper surface of the field oxide film from becoming higher than the surface of the semiconductor substrate, thereby improving flatness. You can.
Description
제1a도 내지 제1c도는 종래 기술에 따른 반도체장치의 소자분리방법을 도시하는 공정도.1A to 1C are process drawings showing a device isolation method of a semiconductor device according to the prior art.
제2a도 내지 제2c도는 본 발명에 따른 반도체장치의 소자분리방법을 도시하는 공정도.2A to 2C are process diagrams showing a device isolation method of a semiconductor device according to the present invention.
도면의 주요부분에 대한 부호의 설명Explanation of symbols for main parts of the drawings
21 : 반도체기판 23 : 마스크층21 semiconductor substrate 23 mask layer
25 : 개구 27 : 다공질층25 opening 27 porous layer
29 : 필드산화막 31 : 게이트산화막29: field oxide film 31: gate oxide film
본 발명은 반도체장치의 소자분리방법에 관한 것으로서, 특히, 버즈 비크(bird' beak)가 형성되는 것을 방지하고 평탄도를 향상시킬 수 있는 반도체장치의 소자분리방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a device isolation method of a semiconductor device, and more particularly, to a device isolation method of a semiconductor device capable of preventing formation of a bird 'beak and improving flatness.
반도체장치의 집접화가 거듭되면서 반도체장치의 상당한 면적을 점유하는 소자격리영역을 줄이기 위한 기술 개발이 활발히 진행되고 있다.As the integration of semiconductor devices continues, technology development for reducing the device isolation region, which occupies a considerable area of the semiconductor device, is actively progressing.
일반적으로 반도체장치는 LOCOS(Local Oxidation of Silicon) 방법으로 소자를 격리하였다. LOCOS 방법은 활성영역을 한정하는 산화마스크인 질화막과 반도체기판의 열적 특성이 다르기 때문에 발생하는 스트레스를 해소하기 위하여 질화막과 반도체기판 사이에 박막의 패드산화막(pad oxide)을 형성하고 산화시켜 소자격리영역으로 이용되는 필드산화막를 형성한다.In general, semiconductor devices have isolated devices by LOCOS (Local Oxidation of Silicon) method. The LOCOS method is a device isolation region by forming and oxidizing a pad oxide film between the nitride film and the semiconductor substrate in order to solve the stress caused by the thermal characteristics of the nitride film and the semiconductor substrate, which are the oxide masks defining the active region. A field oxide film to be used is formed.
제 1a 도 내지 제 1c 도는 종래 기술에 따른 반도체장치의 소자분리방법을 도시하는 공정도이다.1A to 1C are process diagrams showing a device isolation method of a semiconductor device according to the prior art.
제 1a 도를 참조하면, 반도체기판(11)의 표면에 패드산화막(13)과 질화막(15)을 순차적으로 형성한다. 그리고, 질화막(15) 및 패드산화막(13)의 소정 부분을 반도체기판(11)이 노출되도록 포토리쏘그래피(photolitho-graphy) 방법으로 제거하여 소자의 필드영역을 한정한다.Referring to FIG. 1A, the pad oxide film 13 and the nitride film 15 are sequentially formed on the surface of the semiconductor substrate 11. A predetermined portion of the nitride film 15 and the pad oxide film 13 is removed by photolithography to expose the semiconductor substrate 11 to define the field region of the device.
제 1b 도를 참조하면, 반도체기판(11)의 노출된 부분을 고온에서 장시간 산화하여 소자의 활성영역을 한정하는 필드산화막(17)을 형성한다. 이 때, 질화막(15)은 필드산화막(17)이 활성영역 내의 반도체기판(11)의 노출된 부분에만 형성되게 한다.Referring to FIG. 1B, the exposed portion of the semiconductor substrate 11 is oxidized for a long time at a high temperature to form a field oxide film 17 defining an active region of the device. At this time, the nitride film 15 causes the field oxide film 17 to be formed only in the exposed portion of the semiconductor substrate 11 in the active region.
제 1c 도를 참조하면, 반도체기판(11) 상의 활성영역에 잔류하는 질화막(15)과 패드산화막(13)을 순차적으로 제거하여 반도체기판(11)을 노출시킨다. 그리고, 반도체기판(11) 상에 열산화 방법에 의해 게이트산화막(19)을 형성한다.Referring to FIG. 1C, the nitride film 15 and the pad oxide film 13 remaining in the active region on the semiconductor substrate 11 are sequentially removed to expose the semiconductor substrate 11. The gate oxide film 19 is formed on the semiconductor substrate 11 by a thermal oxidation method.
그러나, 종래의 반도체장치의 소자격리방법은 필드산화막을 형성하는 산화 공정시 반도체기판과 질화막 사이도 산화되어 버즈 비크(bird' beak)가 형성되므로 항복전압(breakdown voltage)이 낮아지고 누설전류가 흐르게 되는 문제점이 있었다. 또한, 필드산화막의 상부 표면이 반도체기판의 표면 보다 높게 형성되므로 평탄도가 저하되어 후속 공정을 어렵게하는 문제점이 있었다.However, in the conventional device isolation method, the semiconductor substrate and the nitride film are also oxidized to form a bird 'beak during the oxidation process of forming the field oxide film, so that breakdown voltage is lowered and leakage current flows. There was a problem. In addition, since the upper surface of the field oxide film is formed higher than the surface of the semiconductor substrate, there is a problem that the flatness is lowered, thereby making the subsequent process difficult.
따라서, 본 발명의 목적은 항복전압이 낮아지는 것을 방지할 수 있는 반도체장치의 소자분리방법을 제공함에 있다.Accordingly, an object of the present invention is to provide a device isolation method of a semiconductor device which can prevent the breakdown voltage from lowering.
본 발명의 다른 목적은 누설전류가 흐르는 것을 방지할 수 있는 반도체장치의 소자분리방법을 제공함에 있다.Another object of the present invention is to provide a device isolation method of a semiconductor device which can prevent the leakage current from flowing.
본 발명의 또 다른 목적은 평탄도를 향상시켜 후속 공정을 용이하게 할 수 있는 반도체장치의 소자분리방법을 제공함에 있다.It is still another object of the present invention to provide a device isolation method of a semiconductor device which can improve the flatness to facilitate a subsequent process.
상기 목적들을 달성하기 위한 본 발명에 따른 반도체장치의 소자분리방법은 반도체기판 상에 마스크층을 증착하고 패터닝하여 상기 반도체기판의 소정 부분을 노출시키는 개구를 형성하는 공정과, 상기 반도체기판의 노출된 부분을 등방성으로 양극 반응시켜 다공질층을 형성하는 공정과, 상기 다공질층을 열산화하여 필드산화막을 형성하는 공정과, 상기 반도체기판이 노출되도록 상기 마스크층을 제거하는 공정을 구비한다.The device isolation method of the semiconductor device according to the present invention for achieving the above object is a process of forming an opening for exposing a predetermined portion of the semiconductor substrate by depositing and patterning a mask layer on the semiconductor substrate, and the exposed of the semiconductor substrate Forming a porous layer by isotropically reacting the portions with anisotropic portions; forming a field oxide film by thermally oxidizing the porous layer; and removing the mask layer so that the semiconductor substrate is exposed.
이하, 첨부한 도면을 참조하여 본 발명을 상세히 설명한다.Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.
제 2a 도 내지 제 2c 도는 본 발명에 따른 반도체장치의 소자분리방법을 도시하는 제조공정도이다.2A to 2C are manufacturing process diagrams showing the device isolation method of the semiconductor device according to the present invention.
제 2a 도를 참조하면, 반도체기판(21) 상에 마스크층(23)을 형성한다. 상기 마스크층(23)을 불순물이 도핑되지 않은 다결정실리콘 또는 질화실리콘 등의 절연물질을 화학기상증착(Chemical Vapor Deposition : 이하, CVD라 칭함) 방법으로 2000 ~ 7000Å 정도 두께로 증착하여 형성한다. 그리고, 마스크층(23)의 소정 부분을 포토리쏘그래피(photolithograph)방법으로 제거하여 반도체기판(21)을 노출시키는 개구(25)를 형성한다.Referring to FIG. 2A, a mask layer 23 is formed on the semiconductor substrate 21. The mask layer 23 is formed by depositing an insulating material, such as polycrystalline silicon or silicon nitride, which is not doped with impurities, to a thickness of about 2000 to 7000 kPa by chemical vapor deposition (hereinafter, referred to as CVD). Then, a predetermined portion of the mask layer 23 is removed by a photolithograph method to form an opening 25 exposing the semiconductor substrate 21.
제 2b 도를 참조하면, 반도체기판(21)의 노출된 부분을 양극 반응시켜 0.4 ~ 1㎛ 정도의 깊이를 갖는 다공질층(27)을 형성한다. 상기에서, 양극 반응은 반도체기판(21)에 양(+)극을, HF 용액에 음(-)극을 연결하고 전계를 가하면 마스크층(23)이 형성되지 않은 개구(25)를 통해 전류 통로가 형성되어 반도체기판(21)은 개구(25)에 의해 노출된 표면의 실리콘이 석출되므로써 형성된다. 이 때, 양극 반응은 등방성으로 일어나므로 다공질층(25)은 개구(25) 주위에도 형성된다. 상기에서 양극 반응은 10 ~ 35Wt%의 HF 용액 내에서 0.5 ~ 3mA/㎠ 정도의 전류 밀도로 10초 ~ 2분 동안 실시한다. 이 때, 절연물질로 이루어진 마스크층(23)은 전류를 차단하므로 반도체기판(21)의 마스크층(23) 하부에서 양극 반응이 일어나는 것을 방지한다.Referring to FIG. 2B, the exposed portion of the semiconductor substrate 21 is anodized to form a porous layer 27 having a depth of about 0.4 μm to 1 μm. In the above, the anodic reaction is performed by connecting the positive electrode to the semiconductor substrate 21 and the negative electrode to the HF solution and applying an electric field, and applying an electric field to the current path through the opening 25 in which the mask layer 23 is not formed. Is formed, and the semiconductor substrate 21 is formed by depositing silicon on the surface exposed by the opening 25. At this time, since the anodic reaction is isotropic, the porous layer 25 is also formed around the opening 25. The anode reaction is performed for 10 seconds to 2 minutes at a current density of about 0.5 to 3 mA / cm 2 in a 10 to 35 Wt% HF solution. At this time, since the mask layer 23 made of an insulating material cuts off the current, an anode reaction is prevented from occurring below the mask layer 23 of the semiconductor substrate 21.
제 2c 도를 참조하면, 다공질층(27)을 900 ~ 1000℃ 정도의 온도에서 30분 ~ 1시간 정도 열산화하여 필드산화막(29)을 형성한다. 이 때, 다공질층(27)은 형성된 구멍에 의해 공기와 접촉되는 표면적이 매우 증가되어 산화 속도가 빠르므로 필드산화막(29)의 형성 속도가 빠를 뿐만 아니라 반도체기판(21)의 다공질층(25)이 형성되지 않은 부분과 마스크층(25) 사이에 산화가 억제되어 버즈 비크가 형성되는 것이 억제된다. 또한, 산화시 부피가 증가되면서 형성되는 필드산화막(29)은 다공질층(27)의 구멍을 메우되므로 상부 표면이 반도체기판(21)의 표면 보다 높게 되는 것이 억제된다. 그리고, 마스크층(25)을 반도체기판(21)이 노출되도록 제거하고, 이 반도체기판(21)의 표면을 산화시켜 게이트산화막(31)을 형성한다.Referring to FIG. 2C, the porous layer 27 is thermally oxidized at a temperature of about 900 to 1000 ° C. for about 30 minutes to 1 hour to form a field oxide film 29. At this time, the porous layer 27 has a very high surface area contacted with air by the formed holes, so that the oxidation rate is high, and thus the formation rate of the field oxide film 29 is not only high, but also the porous layer 25 of the semiconductor substrate 21. Oxidation is suppressed between the unformed portion and the mask layer 25 to suppress the formation of a buzz beak. In addition, since the field oxide film 29 formed by increasing the volume during oxidation fills the holes of the porous layer 27, the upper surface is suppressed from being higher than the surface of the semiconductor substrate 21. The mask layer 25 is removed so that the semiconductor substrate 21 is exposed, and the surface of the semiconductor substrate 21 is oxidized to form a gate oxide film 31.
상술한 바와 같이 본 발명에 따른 반도체장치의 소자분리방법은 반도체기판 상에 개구가 형성된 마스크층을 형성하고 반도체기판의 노출된 부분 표면의 실리콘이 석출시되도록 HF 용액에서 양극 반응시켜 다공질층을 형성한 후 이 다공질층을 빠른 속도로 산화하여 필드산화막을 형성한다.As described above, the device isolation method of the semiconductor device according to the present invention forms a mask layer having an opening formed on the semiconductor substrate, and anodizes the HF solution to form a porous layer so that silicon on the exposed part surface of the semiconductor substrate is deposited. The porous layer is then oxidized at high speed to form a field oxide film.
따라서, 본 발명은 버즈 비크의 형성이 억제되므로 항복전압을 크게할 수 있을 뿐만 아니라 누설전류가 흐르는 것을 방지할 수 있는 잇점이 있다. 또한, 필드산화막의 상부 표면이 반도체기판의 표면 보다 높게되는 것을 억제하므로 평탄도를 향상시킬 수 있는 잇점이 있다.Therefore, the present invention has the advantage that not only the breakdown voltage can be increased because the formation of the buzz beak is suppressed, but also the leakage current can be prevented from flowing. In addition, since the upper surface of the field oxide film is suppressed from being higher than that of the semiconductor substrate, flatness can be improved.
Claims (7)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019960061943A KR100226483B1 (en) | 1996-12-05 | 1996-12-05 | Method of forming a device isolation film of semiconductor device |
| JP9326241A JPH10173038A (en) | 1996-12-05 | 1997-11-27 | Element separating method for semiconductor device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019960061943A KR100226483B1 (en) | 1996-12-05 | 1996-12-05 | Method of forming a device isolation film of semiconductor device |
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| Publication Number | Publication Date |
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| KR19980043958A KR19980043958A (en) | 1998-09-05 |
| KR100226483B1 true KR100226483B1 (en) | 1999-10-15 |
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|---|---|---|---|
| KR1019960061943A KR100226483B1 (en) | 1996-12-05 | 1996-12-05 | Method of forming a device isolation film of semiconductor device |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JPH10173038A (en) |
| KR (1) | KR100226483B1 (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR930011163A (en) * | 1991-11-25 | 1993-06-23 | 김광호 | Semiconductor Device Separation Method |
-
1996
- 1996-12-05 KR KR1019960061943A patent/KR100226483B1/en not_active IP Right Cessation
-
1997
- 1997-11-27 JP JP9326241A patent/JPH10173038A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR930011163A (en) * | 1991-11-25 | 1993-06-23 | 김광호 | Semiconductor Device Separation Method |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH10173038A (en) | 1998-06-26 |
| KR19980043958A (en) | 1998-09-05 |
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