KR100212171B1 - Thin film transistor liquid crystal display device - Google Patents

Thin film transistor liquid crystal display device Download PDF

Info

Publication number
KR100212171B1
KR100212171B1 KR1019960026293A KR19960026293A KR100212171B1 KR 100212171 B1 KR100212171 B1 KR 100212171B1 KR 1019960026293 A KR1019960026293 A KR 1019960026293A KR 19960026293 A KR19960026293 A KR 19960026293A KR 100212171 B1 KR100212171 B1 KR 100212171B1
Authority
KR
South Korea
Prior art keywords
thin film
liquid crystal
film transistor
crystal display
display device
Prior art date
Application number
KR1019960026293A
Other languages
Korean (ko)
Other versions
KR980003753A (en
Inventor
이정렬
노봉규
전정목
Original Assignee
김영환
현대전자산업주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김영환, 현대전자산업주식회사 filed Critical 김영환
Priority to KR1019960026293A priority Critical patent/KR100212171B1/en
Publication of KR980003753A publication Critical patent/KR980003753A/en
Application granted granted Critical
Publication of KR100212171B1 publication Critical patent/KR100212171B1/en

Links

Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/121—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode common or background

Abstract

본 발명은 박막 트랜지스터형 액정표시소자를 개시한다. 이 액정표시소자는 두 행의 화소전극 사이에 주사선 2개가 같이 나란히 배치되어 있고, 개개의 주사선은 인접한 화소전극을 스위칭하기 위한 각각의 박막 트랜지스터의 게이트와 연결되며, 두 행의 같은 열의 화소의 박막 트랜지스터의 소오스 전극이 공유되며, 보존전기용량의 공통전극은 인접열의 같은 행 화소전극 사이를 지나면서 화소전극과 겹치게 되어 세로축 블랙 매트릭스 역할을 한다.The present invention discloses a thin film transistor type liquid crystal display device. In this liquid crystal display device, two scanning lines are arranged side by side between two pixel electrodes, and each scanning line is connected to a gate of each thin film transistor for switching adjacent pixel electrodes, and a thin film of two rows of pixels in the same column. The source electrodes of the transistors are shared, and the common electrode of the storage capacitance passes between the same row pixel electrodes in adjacent columns and overlaps the pixel electrodes, thus serving as a vertical black matrix.

Description

박막 트랜지스터 액정표시소자Thin film transistor liquid crystal display device

제1도는 종래의 실시예에 따른 박막 트랜지스터 액정표시소자의 셀 구조를 보여주는 평면도.1 is a plan view showing a cell structure of a thin film transistor liquid crystal display device according to a conventional embodiment.

제2도는 제1도의 등가 회로도.2 is an equivalent circuit diagram of FIG.

제3도는 본 발명의 실시예에 따른 박막 트랜지스터 액정표시소자의 셀구조를 보여주는 평면도.3 is a plan view showing a cell structure of a thin film transistor liquid crystal display device according to an exemplary embodiment of the present invention.

제4도는 제3도의 등가회로도.4 is an equivalent circuit diagram of FIG.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

11 : 주사선 12 : 소오스 전극11 scanning line 12 source electrode

13 : 화소전극 14 : 보존전기용량의 공통전극13 pixel electrode 14 common electrode of storage capacitance

본 발명은 능동형 액정표시소자에 관한 것으로서, 특히 박막 트랜지스터형 액정표시소자에 관한 것이다.The present invention relates to an active liquid crystal display device, and more particularly to a thin film transistor type liquid crystal display device.

첨부한 도면 제1도는 종래의 실시예에 따른 박막 트랜지스터 액정표시소자의 셀 구조의 평면도로서, 주사선(게이트 라인)(1)과 보존전기용량의 공통전극(2)은 동일막으로 주사선(1)은 비정질 규소(3) 바로 밑에 있고, 보존 전기용량의 공통전극(2)은 화소전극(4) 밑에 있다. 주사선(1)과 비정질규소(3) 사이와 보존전기용량의 공통전극(2)과 화소전극(4) 사이에는 절연막(미도시)이 형성되어 있다.1 is a plan view of a cell structure of a thin film transistor liquid crystal display device according to a conventional embodiment, in which the scan line (gate line) 1 and the common electrode 2 of the storage capacitance are formed in the same film. Is directly under the amorphous silicon 3, and the common electrode 2 of the storage capacitance is under the pixel electrode 4. An insulating film (not shown) is formed between the scan line 1 and the amorphous silicon 3 and between the common electrode 2 and the pixel electrode 4 of the storage capacitance.

박막 트랜지스터 액정표시소자의 보존 전기용량은 비선택기간(게이트 주사선이 로우)동안에도 액정에 일정한 전압이 걸리게 하고, 게이트 주사선이 선택(하이)에서 비선택(로우)으로 떨어질 때의 박막 트랜지스터 기생전기용량에 의한 액정층의 전압강하를 줄여준다.The storage capacitance of the thin film transistor liquid crystal display element causes a constant voltage to be applied to the liquid crystal even during the non-selection period (the gate scanning line is low), and the thin film transistor parasitic electricity when the gate scanning line falls from the selection (high) to the non-selection (low) The voltage drop of the liquid crystal layer due to the capacitance is reduced.

따라서 보통의 브이쥐에이(VGA)나 에스브이쥐에이(SVGA)용 박막 트랜지스터 패널에서는 보존 전기 용량을 액정층의 최대 전기용량과 비슷한 크기로 만든다.Therefore, in conventional thin film transistor panels for VGA or SVGA, the storage capacitance is made to be similar to the maximum capacitance of the liquid crystal layer.

제2도는 제1도의 구조를 갖는 박막 트랜지스터 액정표시소자의 등가회로도이다. 게이트 주사선은 Gi, 데이타 주사선은 Di로 나타나 있고 보존전기용량의 공통전극은 Csi로 나타나 있다.FIG. 2 is an equivalent circuit diagram of a thin film transistor liquid crystal display device having the structure of FIG. The gate scan line is represented by Gi, the data scan line is represented by Di, and the common electrode of the storage capacitance is represented by Csi.

제2도에 도시된 바와 같이, 종래의 박막 트랜지스터 액정표시소자는 보존전기용량의 공통전극(Csi)이 한 주사선마다 하나씩 독립적으로 있기 때문에 보존전기용량의 공통전극의 저항이 커서, 화소의 충방전이 충분치 않다. 이로 인하여 화질이 떨어졌고, 제1도에 도시된 것처럼, 화소전극과 보존전기용량이 바로 겹칠려는 부분(A, A')에서 전기장의 왜곡(distortion)이 가중되어 액정의 배향이 역으로 되는 역 도메인(reverse domain)등이 나타날 확율이 많다.As shown in FIG. 2, in the conventional thin film transistor liquid crystal display device, since the common electrodes Csi of the storage capacitance are independently one by one for each scan line, the resistance of the common electrodes of the storage capacitance is large and the charge and discharge of the pixel is large. This is not enough. As a result, the image quality is deteriorated, and as shown in FIG. 1, the distortion of the electric field is increased at the portions A and A 'where the pixel electrode and the storage capacitance are directly overlapped, thereby inverting the orientation of the liquid crystal. There is a good chance that reverse domains will appear.

따라서, 본 발명은 인접 주사선의 화소전극의 사이 밑에 보존 전기용량을 만들어 보존 전기용량의 공통전극의 저항을 1/2로 줄였고, 빛이 투과되지 않는 부분에서 역도메인이 일어나게 하므로써, 화질의 저하를 방지할 수 있는 액정표시소자를 제공하는데 그 목적이 있다.Therefore, the present invention reduces the resistance of the common electrode of the storage capacitance by ½ by making the storage capacitance between the pixel electrodes of the adjacent scanning lines, and causes the reverse domain to occur in the region where light is not transmitted, thereby reducing the image quality. It is an object of the present invention to provide a liquid crystal display device that can be prevented.

본 발명에 따르면, 액정표시소자는 두 행의 화소전극 사이에 주사선 2개가 같이 나란히 배치되어 있고, 개개의 주사선은 인접한 화소전극을 스위칭하기 위한 각각의 박막 트랜지스터의 게이트와 연결되며, 상기 두 행의 같은 열의 화소의 박막 트랜지스터의 소오스 전극이 공유되며, 보존전기용량의 공통전극은 인접열의 같은 행 화소전극 사이를 지나면서 화소전극과 겹치게 되어 세로축 블랙 매트릭스 역할을 하는 것을 특징으로 한다.According to the present invention, in the liquid crystal display device, two scanning lines are arranged side by side between two rows of pixel electrodes, and each scanning line is connected to a gate of each thin film transistor for switching adjacent pixel electrodes. The source electrodes of the thin film transistors of the pixels of the same column are shared, and the common electrode of the storage capacitance is overlapped with the pixel electrodes while passing between the same row pixel electrodes of adjacent columns, thereby serving as a vertical black matrix.

이하, 첨부한 도면을 참조하여 본 발명의 바람직한 실시예를 설명한다.Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

첨부한 도면 제3도는 본 발명의 실시예에 따른 박막 트랜지스터 액정표시소자에서 셀 구조를 보여주는 평면도이다.3 is a plan view illustrating a cell structure in a thin film transistor liquid crystal display device according to an exemplary embodiment of the present invention.

제3도에서 도시된 바와 같이, 주사선(11) 2개가 같이 나란히 배치되어 있고, 개개의 주사선(11)은 인접한 화소전극(13)을 스위칭하기 위한 각각의 박막 트랜지스터의 게이트와 연결되며, 박막 트랜지스터의 소오스 전극(12)이 상기 두 행의 같은 열의 화소에 의하여 공유되며, 보전전기용량의 공통전극(14)은 인접열의 같은 행 화소전극(13) 사이를 지나면서 화소전극과 겹치게 되어 세로축 블랙 매트릭스 역할을 한다.As shown in FIG. 3, two scan lines 11 are arranged side by side, and each scan line 11 is connected to a gate of each thin film transistor for switching adjacent pixel electrodes 13, and the thin film transistors. The source electrode 12 of is shared by the pixels in the same column of the two rows, and the common electrode 14 of the capacitance is overlapped with the pixel electrodes while passing between the same row pixel electrodes 13 of the adjacent columns, so as to overlap the vertical black matrix. Play a role.

제4도는 제3도의 등가회로도이다. 보존전기용량의 공통전극이 Csi이고 게이트 주사선이 Gi이며, Di는 데이터 라인이다.4 is an equivalent circuit diagram of FIG. The common electrode of the storage capacitance is Csi, the gate scanning line is Gi, and Di is a data line.

제3도에서 설명한 바와 갈이, 주사선이 개개 행의 화소전극 사이에 위치하는 것이 아니라, 인접하는 두 행의 화소전극 사이에 두 주사선이 인접한 상태로 나란히 배치되고, 두 주사선 사이에는 공통 소오스 전극이 데이터 라인과 전기적으로 연결되고, 드레인은 액정과 연결되는 동시에 보조전기용량의 공통전극과 연결되어 전기용량을 형성한다.As described in FIG. 3, the scanning lines are not positioned between the pixel electrodes of individual rows, but two scanning lines are arranged side by side between two adjacent pixel electrodes, and a common source electrode is provided between the two scanning lines. It is electrically connected to the data line, and the drain is connected to the liquid crystal and at the same time connected to the common electrode of the auxiliary capacitance to form a capacitance.

상기와 같이 인접 주사선의 화소전극의 사이 밑에 보존전기용량을 만들어 보존전기용량의 공통전극의 저항을 1/2로 줄였고, 빛이 투과되지 않는 제3도의 B부분에서 역 도메인이 일어나게 하므로써, 컬러필터가 형성되는 상부 투광성 기판과 박막 트랜지스터가 형성되는 하부 투광성 기판을 합착할 때 생기는 정렬 오차를 줄여서 상대적인 개구율의 향상이 가능해진다.As described above, the storage capacitance is made between the pixel electrodes of the adjacent scanning lines, thereby reducing the resistance of the common electrode of the storage capacitance by 1/2, and causing the reverse domain to occur in the portion B of FIG. It is possible to improve the relative aperture ratio by reducing the alignment error caused when the upper light-transmissive substrate on which is formed and the lower light-transmissive substrate on which the thin film transistor is formed are bonded.

이상에서 설명한 바와 같이, 본 발명의 박막 트랜지스터 액정표시소자는 보존전기용량의 공통전극을 인접한 주사선의 두 개의 화소마다 공유하게 하여 보존전기용량의 공통전극의 개수와 저항을 줄이므로써, 신호왜곡을 줄이는 효과를 제공하며, 보존전기용량의 공통전극이 빛을 차단하는 블랙매트릭스 역할을 하게 하여 컬러 필터의 기판과 박막 트랜지스터를 합착할 때 생기는 정렬 오차를 줄여 상대적인 개구율을 높이는 효과를 제공한다.As described above, the thin film transistor liquid crystal display device of the present invention reduces the number and resistance of the common electrode of the storage capacitance by sharing the common electrode of the storage capacitance with each of the two pixels of the adjacent scanning line, thereby reducing the signal distortion. In addition, the preservative capacitance common electrode acts as a black matrix to block light, reducing the alignment error caused when the substrate of the color filter and the thin film transistor are bonded, thereby increasing the relative aperture ratio.

여기에서는 본 발명의 특정 실시예에 대하여 설명하고 도시하였지만 당업자에 의하여 이에 대한 수정과 변형을 할 수 있다. 따라서, 이하, 특허 청구의 범위는 본 발명의 진정한 사상과 범위에 속하는 한 모든 수정과 변형을 포함하는 것으로 이해할 수 있다.Although specific embodiments of the present invention have been described and illustrated herein, modifications and variations can be made by those skilled in the art. Accordingly, the following claims are to be understood as including all modifications and variations as long as they fall within the true spirit and scope of the present invention.

Claims (2)

두 열의 화소전극 마다 게이트 주사선 2개가 같이 나란히 배치되어 있고, 상기 두 게이트 주사선은 인접한 화소전극을 스위칭하기 위한 각각의 박막 트랜지스터의 게이트와 연결되며, 상기 두 박막 트랜지스터의 소오스 전극은 서로 공유되며, 드레인 전극은 인접하는 화소전극과 연결되고, 상기 각 트랜지스터의 보존전기용량에 공통으로 접속된 공통전극을 포함하는 것을 특징으로 하는 박막 트랜지스터 액정표시소자.Two gate scan lines are arranged side by side for each pixel electrode of two columns, and the two gate scan lines are connected to a gate of each thin film transistor for switching adjacent pixel electrodes, and the source electrodes of the two thin film transistors are shared with each other, and the drain The electrode is a thin film transistor liquid crystal display device comprising a common electrode connected to the adjacent pixel electrode, and commonly connected to the storage capacitance of each transistor. 제1항에 있어서, 상기 공통전극은 상기 게이트 라인이 지나가지 않는 두 인접 화소전극 사이를 지나면서 화소전극의 단부와 겹치며, 상기 겹치는 부분은 블랙 매트릭스의 역할을 겸하는 것을 특징으로 하는 박막 트랜지스터 액정표시소자.The liquid crystal display of claim 1, wherein the common electrode overlaps an end portion of the pixel electrode while passing between two adjacent pixel electrodes through which the gate line does not pass, and the overlapping portion serves as a black matrix. device.
KR1019960026293A 1996-06-29 1996-06-29 Thin film transistor liquid crystal display device KR100212171B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019960026293A KR100212171B1 (en) 1996-06-29 1996-06-29 Thin film transistor liquid crystal display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960026293A KR100212171B1 (en) 1996-06-29 1996-06-29 Thin film transistor liquid crystal display device

Publications (2)

Publication Number Publication Date
KR980003753A KR980003753A (en) 1998-03-30
KR100212171B1 true KR100212171B1 (en) 1999-08-02

Family

ID=19465042

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019960026293A KR100212171B1 (en) 1996-06-29 1996-06-29 Thin film transistor liquid crystal display device

Country Status (1)

Country Link
KR (1) KR100212171B1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100777691B1 (en) * 2000-05-22 2007-11-21 삼성전자주식회사 liquid crystal display

Also Published As

Publication number Publication date
KR980003753A (en) 1998-03-30

Similar Documents

Publication Publication Date Title
KR100443219B1 (en) Active matrix device and display
US5247289A (en) Liquid crystal display device with commonly connected capacitor electrodes
JP2907629B2 (en) LCD panel
CN1550826B (en) Liquid crystal device ,active matrix base board, display device and electronic device
US5463230A (en) Active matrix board
JP3948883B2 (en) Liquid crystal display
US6873378B2 (en) Liquid crystal display panel
JP3205155B2 (en) Liquid crystal display
US6731260B2 (en) Display device
JPH0830823B2 (en) Liquid crystal display
US6611300B1 (en) Semiconductor element and liquid crystal display device using the same
US20100014014A1 (en) Liquid crystal display
US6404410B1 (en) Color display device
US6411272B1 (en) Active matrix liquid crystal display devices
KR100476623B1 (en) LCD Display
KR100212171B1 (en) Thin film transistor liquid crystal display device
US6670936B1 (en) Liquid crystal display
JPH0572562A (en) Active matrix type display device
KR0182050B1 (en) Liquid crystal display device
JP2541446B2 (en) Active matrix panel
KR20050086901A (en) Active matrix display devices
JP2000131713A (en) Liquid crystal display device
JP3207760B2 (en) Semiconductor device and image display device using the same
JPH0850309A (en) Electrooptical device
JPH0572557A (en) Liquid crystal matrix display device

Legal Events

Date Code Title Description
A201 Request for examination
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20130417

Year of fee payment: 15

FPAY Annual fee payment

Payment date: 20140421

Year of fee payment: 16

FPAY Annual fee payment
FPAY Annual fee payment

Payment date: 20160418

Year of fee payment: 18

EXPY Expiration of term