KR100197597B1 - Apparatus and method for processing the reference of macroblock according to motion compensation - Google Patents

Abstract

The present invention relates to an apparatus and a method for processing a reference for a macroblock required for motion compensation. The present invention relates to a horizontal interpolation and vertical interpolation after the barrel shifter selectively outputs a reference read from memory in line units according to a horizontal motion vector. Synthesis is performed by rearranging by macroblock unit. Since a component having a smaller processing capacity can be used than the conventional technology, the number of components is reduced, and the area occupied by the circuit board is reduced, thereby improving utilization of hardware and reducing manufacturing costs.

Description

Reference processing device and method of macro block according to motion compensation

1 is a block diagram of a reference processor of a general macroblock.

2 is a block diagram of a windowing unit according to the prior art.

3 is a block diagram of a windowing unit according to the present invention.

4A is an explanatory diagram showing a macroblock of luminance components.

4B is an explanatory diagram for explaining the windowing operation of the windowing unit.

5 is a view illustrating the operation of the windowing unit according to the present invention.

* Explanation of symbols for main parts of the drawings

11 memory 12 windowing unit

13: horizontal interpolation unit 14: vertical interpolation unit

15.25: composite section

BS1, BS11: Barrel Shifter

L1, L2, L3, L11, L12, L13: Latch

The present invention relates to an apparatus and method for processing a reference for a macroblock required for motion compensation at a decoding side for restoring compressed image data, and in particular, a windowing unit for selectively outputting a reference according to a horizontal motion vector. In addition, the present invention relates to a macroblock reference processing apparatus and method for motion compensation to reduce the number of components to improve hardware efficiency.

In general, a motion image conforming to MPEG-1 (2) to be applied in a high-definition television (HDTV) digital satellite broadcasting is to restore the original image through motion compensation. The encoding side converting the digital image signal transmits the compressed image according to the difference between the before and after image, and adds a motion vector (motion vector) to the compressed image. Accordingly, the decoding side restores the original image by performing motion compensation using a motion vector along with an operation of stretching the compressed image. For this purpose, a processing process for a reference necessary for motion compensation is required. This reference becomes information representing the similarity between pictures in picture units. This reference may be divided into a forward reference indicating similar information with a front picture and a backward reference indicating similar information with a back picture.

In general, since the forward reference and the backward reference are arranged according to the type of the picture currently being decoded, the forward reference and the backward reference are not specifically determined, but are arranged dependently on the picture of the image.

These references are stored in the main memory through a preprocessing operation such as decoding on the decoding side, and then restored to the original image through a processing operation according to motion compensation. In case of motion compensation, it is processed in units of macroblocks. The macroblocks are divided into luminance components consisting of four blocks and color components consisting of two blocks. References are processed in macroblocks by default, which will be described according to FIG.

1 is a block diagram of a reference processor of a general macroblock. First, the memory 11 receives and stores a reference of a predetermined macroblock from a main memory (not shown). The source unit 12 receives a reference from the memory 11 in units of lines and performs windowing. The horizontal interpolator 13 performs half-pixel motion compensation on the original reference and outputs the half-pixel motion compensation. The vertical interpolation unit 14 outputs the horizontal interpolated reference by performing half pixel motion compensation on the vertical direction. The synthesis unit 15 receives the horizontal interpolated and vertical interpolated references and outputs the macroblock in the form of a macroblock. Then, it is displayed on the screen through the display process.

A detailed operation of the windowing unit according to the related art in the process of processing such a reference will be described with reference to FIG. 2.

FIG. 2 is a configuration diagram of the original drawing part according to the related art, and as can be seen from FIG. 2, the windowing part 12 includes a first latch L1 and a second latch L2 for latching a reference for each line. And a barrel shifter BS1 for shifting and selectively outputting the latched reference according to a horizontal motion vector, and a third latch L3 for latching the output of the barrel shifter BS1.

The windowing unit 12 configured as described above performs the windowing operation according to the horizontal motion vector in detail. First, the first latch L1 latches a predetermined reference supplied from the memory 11 by 8 (pixels) x 8 (bits). Subsequently, the second latch L2 latches the next reference supplied from the memory 11 by 8 (pixels) x 8 (bits). The first latch L1 and the second latch L2 have the same storage capacity, and may store a bit amount corresponding to 8 (pixels) × 8 (bits). In other words, the first latch L1 latches from the memory 11 line by line such that one line becomes eight pixels. After the first latch L1 latches the reference of the predetermined line, the second latch L2 latches the reference of the next line.

On the other hand, the barrel shifter BS1 selectively outputs the references latched by the first latch L1 and the second latch L2 according to the horizontal vortex vector. The horizontal motion vector has a value of 0-7. For example, if the horizontal motion vector is 3, the barrel shifter BS1 is latched by the second latch L2 from the fourth pixel from the left of the eight pixels of one line with respect to the reference latched by the first latch L1. Takes up to the third pixel and adds one pixel to the eight pixels taken, making a total of nine pixels. The barrel shifter BS1 selectively generates 9 pixels according to the horizontal motion vector for each line and outputs 9 (pixels) x 8 (bits) to the third latch L3 at the rear end. The third latch L3 is latched by 9 (pixels) by 8 (bits) and output in a timely manner to perform horizontal interpolation. Thereafter, horizontal interpolation and vertical interpolation are performed as specified in MPEG (2), synthesized in macroblock units, and reproduced as images by a reproduction operation.

However, in order to process motion compensation in real time, several pixels must be processed at the same time, and the size of the macroblock for the luminance component Y defined in MPEG-1 (2) is 16 (pixels) x 16 ( Line), it is easy to set the processing unit to 16 pixels, but the efficiency of the hardware decreases and the area occupied on the circuit board becomes larger due to the increase of components, which is a factor in miniaturizing the entire system.

An object of the present invention is to provide a macroblock reference processing apparatus according to motion compensation that can improve processing efficiency of hardware by reducing the processing capacity of each component for windowing the macroblock reference by about half.

Another object of the present invention is to reference the macroblock reference processing method according to the motion compensation to improve the processing efficiency of the hardware by latching some or all of the macroblock reference and selectively drawing the reference according to the horizontal motion vector. In providing.

The object of the present invention as described above is a reference processing apparatus for generating a macro reference unit after motion compensation and horizontal and vertical interpolation of a predetermined reference previously stored in memory, wherein the reference in units of lines from the memory is lowered according to storage capacity. First and second latches for latching pixels or all pixels, and a barrel shifter for adding and outputting one pixel after receiving a pixel latched by the first latch or a pack cell latched by the second latch, Windowing means for selectively taking a reference required for motion compensation according to a predetermined horizontal motion vector; And synthesizing means for correctly rearranging the order of references reversed by the original drawing means to form a single macroblock.

Another object of the present invention as described above is a reference processing method for generating a predetermined reference stored in memory in macroblock units after motion compensation and horizontal and vertical interpolation. Latching a lower pixel corresponding to half of a line to select and latching all pixels of a line for selection; A second step of adding and windowing one pixel to a lower pixel of a line or all pixels of a latched line according to a predetermined horizontal motion vector; A third step of performing a half-pixel motion compensation on the pixel windowed in the second step in a horizontal direction and then performing half-pixel motion compensation on a vertical direction to perform horizontal and vertical interpolation; And a fourth step of receiving the horizontally and vertically interpolated pixels in the third step to rearrange the order of the references reversed in the original drawing to form a macroblock.

Hereinafter, a preferred embodiment of the present invention will be described in detail with reference to the accompanying drawings.

The present invention includes a memory 11 having an element as shown in FIG. 1 in its general configuration, which receives and stores a reference of a macroblock currently being processed from a main memory, and reads line by line. A windowing unit 12 capable of circularly outputting the required portion according to the motion vector value, a horizontal interpolation unit 13 performing horizontal interpolation for half-pixel motion compensation, and a vertical direction for half-pixel motion compensation The interpolator 14 performs interpolation, and a synthesizer 15 for outputting a motion-compensated reference while storing the forward and backward references.

Since the memory 11 of the present invention receives a decoded reference from the main memory, a detailed description thereof will be omitted, and the original dosing unit 12 receiving the reference from the memory 11 and circulating the reference will be omitted. The operation with respect to FIG. 3 will be described.

3 is a block diagram of a circle doping part according to the present invention. As shown, the original doweling section 12 of the present invention is selective according to the first latch L11 having a processing capacity of 4 × 8, the second latch L12 having a processing capacity of 8 × 8, and the horizontal motion vector. Barrel shifter (BS11) and the third latch (L13) to be output.

First, an operation of reading a reference by the first latch L11 and the second latch L12 will be described with reference to FIG. 4 (a). The macroblocks of the luminance component shown in FIG. 4A are divided into four blocks, and each block can be subdivided into 8 (pixels) x 8 (lines). For convenience of explanation, the block on the left corresponds to 1 and the block on the right corresponds to 2, and the upper 4 pixels and the lower 4 pixels are referred to as L for the line constituting one block.

The first latch L11 latches the lower four pixels of the eight pixels belonging to the top line in the block located at the upper left. The second latch L12 latches all eight pixels of the first line. When the references of the macroblock currently being processed correspond to the forwards, the second latch L11 latches a reference of 4 (pixel) x 8 (bit) corresponding to the FIL of the first line, and the second latch (L12). Latches a reference of 8 (pixels) x 8 (bits) corresponding to FIML (FIM + FIL). If it is a reference of the backward, the first latch L11 will latch the BIL of the first line, and the second latch L12 will latch the BIML (BIM + BIL) of the first line. Whether the reference in the line constituting the block is forward or backward is determined by the nature of the macroblock. Therefore, the first latch L11 and the second latch L12 are considered to latch any reference.

Meanwhile, the barrel shifter BS12 selectively takes 4 pixels among the pixels latched by the first latch L11 and the second latch L12 according to the horizontal motion vector, and adds one pixel to output 5 pixels. The horizontal motion vector represents three modes of A mode or B mode. One beater indicates the order of the pixel groups. As shown by the solid line in FIG. 4 (b), the barrel shifter BS12 takes the upper four pixels among the eight pixels latched by the second latch L11. In the next step, four pixels latched by the first latch L11 are taken as shown by the broken lines in FIG.

According to the mode indicated by the horizontal motion vector, the latching order of the first latch L11 and the second latch L12 is changed, and outputs the pixel latched to hold the latched pixel or latch the next pixel. An example of such an operation is shown in FIG.

Steps A1 to A5 in FIG. 5 show that the first latch L11 and the second latch L12 latch when the horizontal motion vector is in the A mode, and the steps B1 to B5 indicate that the horizontal motion vector is latched. In the B mode, the first latch L11 and the second latch L12 are latched. As described above, the order of the references latched by the first latch L11 and the second latch L12 is changed according to the horizontal motion vector, which will be described for each mode. The first case is A mode. In the first step A1, the first latch L11 latches F1L, which is the lower half (4 pixels) of one line, and the second latch L12 latches F1ML, which is 8 pixels of one line. In the second step A2, the first latch L11 continues to latch the latching F1L, and the second latch L12 latches F2ML, which is 8 pixels of one line of the other block. At this time, four pixels taken by the barrel shifter BS12 in the second step become F1M. Subsequently, in the third step A3, the first latch L11 latches B1L, which is half of one line of the reference of the backward, and the second latch L12 latches B1ML corresponding to all of the lines. In the third step, the barrel shifter BS12 takes the F1L latched by the first latch L11. As such, the first latch L11 alternately performs one step latching operation and one step holding operation, while the second latch L12 repeatedly performs one step latching operation.

Second, when the horizontal motion vector is B mode, the following description will be given according to the steps B1 to B5. In the B mode, the reference belonging to the macroblock on the right side 2 shown in FIG. do. In the first step B1, the first latch L11 latches F2L, which is the lower half (4 pixels) of one line, and the second latch L12 latches F2ML, which is 8 pixels of one line. In the second step B2, the first latch L11 latches F1L of the left block, and the second latch L12 continuously latches the latched F2ML. In the second step B2, the barrel shifter BS12 takes F2M, which is the upper pixel of the eight pixels latched by the second latch L12. In the third step B3, the first latch L11 latches B2L of the second line in the right block, and the second latch L12 latches B2ML corresponding to 8 pixels of the second line. In the third step B3, the barrel shifter BS12 takes F1L of four pixels latched by the first latch L11. As described above, the first latch L11 repeatedly performs one step latching operation, while the second latch L12 alternately performs one step latching operation and one step holding operation.

Again, in FIG. 3, the barrel shifter BS12 selectively takes 4 pixels according to the horizontal motion vector, adds one pixel, and outputs a total of five pixels. That is, the windowing unit 12 outputs 5 (pixels) x 8 (bits) to the third latch L13. The third latch L13 outputs latched pixels, that is, a reference, when there is an output request from the horizontal interpolator 13. Subsequently, interpolation is performed by the horizontal interpolation unit 13 and the vertical interpolation unit 14, and then the synthesis unit 15 correctly rearranges the reference inverted by the circular drawing operation and outputs it in a single form. do.

In the prior art, the barrel shifter requires 9 (pixels) × 8 (bits) of 8: 1 muxes in hardware. However, in the present invention, since the barrel shifters require 5 (pixels) × 8 (bits) of 8: 1 muxes. The area occupied by the circuit board can be reduced, and the number of components can be reduced.

As described above, the present invention can process the reference smoothly even if the processing capacity of each component that performs windowing has half the processing capacity as compared with the prior art, thereby improving the utilization of hardware and reducing the manufacturing cost. There is an effect that can be obtained.

Claims (6)

A reference processing apparatus for generating a predetermined reference previously stored in a memory in a macroblock unit after motion compensation, horizontal and vertical interpolation, and for latching a lower pixel or all pixels according to a storage capacity of a line unit reference from the memory. Motion compensation according to a predetermined horizontal motion vector, comprising a first and second latch and a barrel shifter for outputting one pixel after receiving the pixel latched by the second latch or the pixel latched by the second latch. Windowing means for selectively taking a reference required for the; And synthesizing means for correctly rearranging the order of the references reversed by the original drawing means to form a single macroblock of a single shape. The apparatus of claim 1, wherein the first latch has half the storage capacity of the second latch. The reference processing apparatus of claim 2, wherein the first latch has a storage capacity capable of storing four pixels. 2. The method of claim 1, wherein if the horizontal motion vector is the first mode, the first latch is held and the pixel latched is held for one more step, while if the horizontal motion vector is the second mode, the second latch is held. A reference processing method for a macroblock according to motion compensation, characterized in that the latch is held and the latched pixel is held for one more step. The apparatus of claim 1, wherein the barrel shifter is implemented by using 5 (pixels) × 8 (bits) of 8: 1 mux. A reference processing method of generating a predetermined reference stored in memory in macroblock units after motion compensation, horizontal and vertical interpolation, and corresponding to a single line break to select a reference to be windowed with respect to the reference. A first step of latching all pixels of a line as well as latching a lower pixel; A second step of adding and windowing one pixel to a lower pixel of a line or all pixels of a latched line according to a predetermined horizontal motion vector; A third step of performing horizontal and vertical interpolation on the pixel windowed in the second step by performing half pixel motion compensation on a horizontal direction and then performing half pixel motion compensation on a vertical direction; And a fourth step of receiving the horizontally and vertically interpolated pixels by the third step and rearranging the order of the inverted references correctly in the windowing process to form a macroblock. Reference processing method of macroblock according to compensation.