KR0179302B1 - Voltage pulse converter changed pulse according to voltage variation - Google Patents

Voltage pulse converter changed pulse according to voltage variation Download PDF

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Publication number
KR0179302B1
KR0179302B1 KR1019960043267A KR19960043267A KR0179302B1 KR 0179302 B1 KR0179302 B1 KR 0179302B1 KR 1019960043267 A KR1019960043267 A KR 1019960043267A KR 19960043267 A KR19960043267 A KR 19960043267A KR 0179302 B1 KR0179302 B1 KR 0179302B1
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KR
South Korea
Prior art keywords
voltage
output
switching
pulse
storage
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KR1019960043267A
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Korean (ko)
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KR19980023767A (en
Inventor
한일송
최영재
김대환
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한국전기통신공사
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Priority to KR1019960043267A priority Critical patent/KR0179302B1/en
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Publication of KR0179302B1 publication Critical patent/KR0179302B1/en

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Classifications

    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/50Analogue/digital converters with intermediate conversion to time interval
    • H03M1/54Input signal sampled and held with linear return to datum

Abstract

1. Technical field to which the invention described in the claims belongs
A voltage / pulse converter for changing a pulse according to a voltage change
2. Technical Challenges to be Solved by the Invention
It is intended to provide a voltage / pulse converter that can perform fast analog operation using analog voltage values in analog signal processing or analog digital mixed signal processing by changing the pulse according to the voltage change of the capacitor.
3. The point of the solution of the invention
Power storage means for receiving electric current from outside and storing electric power; A voltage comparison means for receiving an output voltage of the storage means and comparing the output voltage with a reference voltage and outputting the result; Pulse extraction means for outputting a pulse to the outside in accordance with the output of the voltage comparison means; And a discharging means for discharging the current of the storage means by feeding back the output of the pulse extracting means as a control signal.
4. Important Uses of the Invention
It is used to convert voltage to pulse in all fields where analog digital mixed signal processing is applied, to convert voltage to pulse in analog digital mixing calculator such as neural network computer, and to convert pulse to electric charge of capacitor.

Description

A voltage / pulse converter for changing a pulse according to a voltage change

The present invention relates to a voltage / pulse converter for changing a pulse according to a voltage change for analog signal processing or analog digital mixed signal processing.

A typical voltage / pulse converter continuously generates the same pulse when the voltage exceeds a certain threshold, and stops generating the pulse when the voltage falls below the threshold. Therefore, it has been mainly used in the field of communication to generate a pulse corresponding to a carrier frequency.

Conventionally, there is a problem in that a calculation speed is lowered by performing a calculation process after an analog voltage is converted into a digital value by using an analog / digital (A / D) converter to process a signal in a calculator such as a neural network computer.

In particular, when a voltage / pulse converter used in a neural network computer or the like is implemented using an analog / digital converter as in the past, an analog / digital converter occupies a large chip area, so that it is difficult to make a large-scale integrated circuit. There was a problem to be solved. Therefore, a new voltage / pulse converter is required for use in neural network computers and the like.

According to an aspect of the present invention, there is provided a method of driving a liquid crystal display device, including: applying a voltage to a liquid crystal display panel to change a pulse according to a voltage change of a capacitor, / Pulse converter.

1A and 1B are block diagrams of a voltage / pulse converter according to the present invention,

2A and 2B are detailed block diagrams of a voltage / pulse converter according to the present invention,

FIGS. 3A and 3B are detailed configuration diagrams of a charge discharging unit according to the present invention;

4A and 4B are another detailed configuration diagram of the charge discharging portion according to the present invention,

5A and 5B are still another detailed configuration diagram of the charge discharging portion according to the present invention,

6 is a detailed circuit diagram of a voltage comparator according to the present invention,

DESCRIPTION OF THE REFERENCE NUMERALS

11: charge storage section 12: voltage comparison section

13: Pulse extraction unit 14: Charge discharge unit

According to an aspect of the present invention, there is provided an apparatus comprising: storage means for receiving an electric current from outside and storing electric power; A voltage comparison means for receiving an output voltage of the storage means and comparing the output voltage with a predetermined reference voltage and outputting the result; Pulse extraction means for outputting a pulse to the outside in accordance with the output of the voltage comparison means; And a discharging means for discharging the current of the storage means by feeding back the output of the pulse extracting means as a control signal.

Further, another apparatus of the present invention includes: a storage means for receiving a current from the outside to store it and outputting the stored current; A voltage comparison means for receiving an output voltage of the storage means and comparing the output voltage with a predetermined reference voltage and outputting the result; Pulse extraction means for outputting a pulse to the outside in accordance with the output of the voltage comparison means; And a discharging means for discharging the current of the storage means by feeding back the output of the voltage comparing means as a control signal.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2A and 2B are detailed block diagrams of a voltage / pulse converter according to the present invention. In FIG. 1A and FIG. 1B, a voltage / pulse converter according to the present invention is a block diagram, A comparator 13, a pulse extractor 13, and a charge discharger 14, respectively.

First, the configuration and operation of FIG. 1A will be described.

When the first analog switch 110 is in the ON state, a current is inputted from the outside in the charge storage unit 11 and electric charge is accumulated in the capacitor 111, so that the voltage of the capacitor 111 is increased. In addition, in the charge storage unit 11, the fifth analog switch 112 is connected in parallel with the capacitor 111 to remove the charge in the capacitor 111 remaining lower than the reference voltage after the operation of the voltage / pulse converter is completed do. That is, a fifth analog switch 112 for resetting the voltage / pulse changer is connected in parallel to the capacitor 111.

When the first analog switch 110 is in the on state, the second analog switch 120 of the voltage comparator 12 is turned off and the fourth analog switch is turned on, (12). In order for the voltage comparator 12 to operate substantially, the first analog switch 110 is turned off so that no further current flows from the external to the charge accumulator 11, When the voltage of the capacitor 111 is larger than the reference voltage V 1 , the output of the voltage comparator 121 is turned on and the capacitor 111 is smaller than the reference voltage V 1 , the output of the voltage comparator 121 is turned off.

The pulse extraction unit 13 is configured by using a two input AND gate whose one input is the output of the voltage comparator 12 and the other input is the master clock of the master clock generator 131. Here, when the output of the voltage comparator 12 is in the ON state, a pulse is generated at the output of the pulse extractor 13 at the cycle of the master clock, and when the output of the voltage comparator 12 is in the OFF state No pulse is generated at the output of the pulse extracting unit 13. [

The charge discharger 14 includes a third analog switch 140 and a discharge controller 141. When the output of the pulse extractor 13 is in an on state, the output signal of the pulse extractor 13 is fed back to the on / off control signal, and the third analog switch 140 is turned on to connect the capacitor 111 to the discharge controller 141 At this time, the current of the capacitor 11 is discharged through the discharge controller 141. The discharge control unit 141 is a resistive element (element having a resistance value for adjusting the current discharge rate of the capacitor) or a constant current element (element for causing the current of the capacitor to be outputted at a constant value). FIGS. 3A and 3B and FIGS. 4A and 4B are diagrams illustrating the configuration of the discharge control unit 141 using a resistive element. FIGS. 5A and 5B are views illustrating the configuration of the discharge control unit 141 using a constant current device.

In the voltage / pulse converter operating as described above, all the switches except for the third analog switch 140 of the charge discharging unit 14 are turned on / off according to a control signal input from an external processor.

Now, referring to the configuration and operation of FIG. 1B, the configuration and operation are the same as those of FIG. 1A except for the portions described below.

When the output of the voltage comparator 12 is on, the output signal of the voltage comparator 12 is fed back to the on / off control signal, and the third analog switch 140 is turned on to connect the capacitor 111 to the discharge controller 141 At this time, the current of the capacitor 11 is discharged through the discharge controller 141.

FIGS. 3A and 3B are detailed configuration diagrams of the charge discharging unit according to the present invention, FIGS. 4A and 4B are other detailed configuration diagrams of the charge discharging unit according to the present invention, 6 is a detailed circuit diagram of the voltage comparator according to the present invention. The configuration and operation of a specific embodiment according to the present invention will be described with reference to the drawings.

When the first analog switch 110 is in the ON state, a current is inputted from the outside in the charge storage unit 11 and electric charge is accumulated in the capacitor 111, so that the voltage of the capacitor 111 is increased. At this time, the second analog switch 120 of the voltage comparator 12 is turned off, the fourth analog switch is turned on, and the state of the voltage comparator 12 is reset. In order for the voltage / pulse converter to operate substantially, it is necessary to turn off the first analog switch 110 so that no further current flows to the charge storage portion 11. [ When the second analog switch 120 is turned on and the fourth analog switch 122 is turned off and the voltage of the capacitor 111 is larger than the reference voltage V 1 , And the output of the voltage comparator 121 is turned off when the voltage of the capacitor 111 is smaller than the reference voltage V 1 .

As shown in Fig. 1A, in the pulse extracting section 13, when the output of the voltage comparator 12 is in an on state, a pulse is outputted at a cycle of the master clock subsequently. At this time, the pulse output of the pulse extracting unit 12 is fed back as a control signal to turn on the third analog switch of the charge discharger 14. However, when the output of the voltage comparator 12 is in the on state, the third analog switch of the charge discharger 14 is turned on and the capacitor 111 is connected to the discharge controller 141, The current of the capacitor 111 is discharged through the capacitor 141. Therefore, the voltage of the capacitor 111 is lowered. This process continues until the voltage of the capacitor 111 becomes smaller than the reference voltage of the voltage comparator 121. The pulse extracting unit 13 outputs a pulse at the cycle of the master clock until this time.

1B, the output of the voltage comparator 12 is input to the pulse extractor 13, and the output of the voltage comparator 12 is fed back to the control signal, Turn on the switch. At this time, in the pulse extracting unit 13, when the output of the voltage comparator 12 is in the ON state, a pulse is outputted at the cycle of the master clock subsequently. However, when the output of the voltage comparator 12 is in the on state, the third analog switch of the charge discharger 14 is turned on, and the capacitor 111 is connected to the discharge regulator 141, The current of the capacitor 111 is discharged through the capacitor 141. Therefore, the voltage of the capacitor 111 is lowered. This process continues until the voltage of the capacitor 111 becomes smaller than the reference voltage of the voltage comparator 121. The pulse extracting unit 13 outputs a pulse at the cycle of the master clock until this time.

As described above, the charge discharger 14 includes the third analog switch 140 and the discharge adjuster 141. The third analog switch 140 is configured to be turned on and off according to the output of the voltage comparator 12 or the output of the pulse extractor 13. The third analog switch 140 is connected to the capacitor 111 when the third analog switch 140 is on, The discharge control unit 141 is connected to the discharge control unit 141 to discharge the current of the capacitor 111. [ The discharge control unit 141 is configured using a resistive element or a constant current element.

3A and 3B illustrate the internal adjustment of the discharge regulator 14 using the resistive element. In the case of using an n-type field effect transistor (MOSFET), the gate terminal and the drain terminal are connected to the third analog switch 140, And connect the source terminal to ground. This configuration is advantageous in that it is not affected by external signals since it is an internal adjustment.

FIGS. 4A and 4B illustrate the external adjustment of the discharge regulator 14 using a resistive element. In the case of using an n-type field effect transistor (MOSFET), the drain terminal is connected to the third analog switch 140 , The source terminal is connected to the ground, and the gate terminal is configured to be controlled from the outside. This configuration has an advantage that the discharge of the capacitor 111 can be externally adjusted.

FIGS. 5A and 5B are diagrams for explaining a case where external control is performed by using a field effect transistor (MOSFET) resistance control type multiplication operator (Korean Patent No. 94-77234) or an analog control type multiplier, It is also possible.

When the capacitor voltage of the charge storage section 11 becomes smaller than the comparison voltage V 1 of the voltage comparison section 12, the pulse is no longer generated at the output of the pulse extraction section 13, Is completed. After the operation of the voltage / pulse converter is completed, the fifth analog switch 112 for resetting the voltage / pulse converter is turned on to discharge all the current in the capacitor 111 in order to remove the charge in the remaining capacitor 111 .

Referring Referring to Figure 6 an example of a voltage comparator 121, voltage comparator 121 is a source terminal of claim 1 p-type metal oxide semiconductor field effect transistor (MOSFET) (61), a source terminal coupled to V pp is V pp A second p-type metal oxide semiconductor field effect transistor (MOSFET) 62 connected to a gate terminal of the first p-type metal oxide semiconductor field effect transistor (MOSFET) 61 and a drain terminal connected to the output terminal, ), A drain terminal connected to a gate terminal and a drain terminal of the first p-type metal oxide semiconductor field effect transistor (MOSFET) 61, a gate terminal connected to V - and a source terminal connected to V nn , metal oxide semiconductor field effect transistor (MOSFET) (63), a drain terminal connected to the output terminal and the gate terminal is connected to the source terminal V + is the 2 n-type metal oxide film is attached to V nn And a conductive field effect transistor (MOSFET) (64).

In the figure, when V - is larger than V + , V o is a value obtained by subtracting about 1.1 V from V pp , and the state is almost V pp value. Then, when V - is smaller than V + , V o becomes a value obtained by adding approximately 1.1 V to V nn , so that V nn is almost turned off.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. The present invention is not limited to the drawings.

The present invention as described above makes it possible to manufacture a large scale integrated circuit capable of performing fast analog operation using analog voltage values in analog signal processing or analog digital mixed signal processing by changing the pulse according to the voltage change of the capacitor The technology that converts voltage to pulse in all fields where analog digital mixed signal processing is applied, the technology to convert voltage to pulse in analog digital mixing calculator such as neural network computer, the device to convert pulse to charge of capacitor There is an effect that various applications can be made.

Claims (26)

  1. Power storage means for receiving a current from the outside to store the current, and outputting the stored current;
    A voltage comparison means for receiving an output voltage of the storage means and comparing the output voltage with a predetermined reference voltage and outputting the result;
    Pulse extraction means for outputting a pulse to the outside in accordance with the output of the voltage comparison means; And
    And a discharging means for feeding back the output of the pulse extracting means as a control signal and discharging the current of the accumulating means.
  2. The method according to claim 1,
    The storage means
    A first switching means for on / off switching a current input from the outside;
    Charge charging means for charging a current input from the outside when the first switching means is turned on; And
    And second switching means connected in parallel with the charge charging means to remove an electric charge in the charge charging means that is turned on when a predetermined operation is completed and remains lower than a reference voltage.
  3. 3. The method of claim 2,
    Wherein the charge charging means comprises:
    And a capacitor.
  4. 4. The method according to any one of claims 1 to 3,
    Wherein the voltage comparing means comprises:
    Second switching means for on / off switching the output voltage input from the storage means; And
    When the second switching means is turned on, receives the output of the storage means as one input, receives the predetermined reference voltage as another input, and when the voltage of the storage means is greater than the predetermined reference voltage (V 1 ) And outputting an off state when the voltage of the storage means is lower than the predetermined reference voltage (V 1 ).
  5. 5. The method of claim 4,
    Wherein the voltage comparing means comprises:
    And fourth switching means connected between the output terminal of the second switching means and the ground to reset the state of the voltage comparator when the second switching means is turned off, / Pulse converter.
  6. 6. The method of claim 5,
    Wherein the voltage comparator comprises:
    The source terminal of claim 1 p-type metal oxide semiconductor field effect transistor (MOSFET) connected to the V pp;
    A second p-type metal oxide semiconductor field effect transistor (MOSFET) having a source terminal connected to Vpp and a gate terminal connected to the gate terminal of the first p-type metal oxide semiconductor field effect transistor (MOSFET) and a drain terminal connected to the output terminal, ;
    The drain terminal is the first 1 p-type metal oxide semiconductor field effect transistor connected to the gate terminal and the drain terminal of the (MOSFET), and the gate terminal V - is connected to the source terminal of claim 1 n-type metal oxide semiconductor field effect associated with the V nn A transistor (MOSFET); And
    And a second n-type metal oxide semiconductor field effect transistor (MOSFET) having a drain terminal connected to the output terminal, a gate terminal connected to V + , and a source terminal connected to V nn .
  7. 5. The method of claim 4,
    Wherein the pulse extracting means comprises:
    Master clock generating means for generating a master clock; And
    Wherein the output of the voltage comparison means is one input and the master clock output from the master clock generation means is another input to carry out a logical product operation so that when the output of the voltage comparison means is on, And a logical product operation means for outputting a pulse in a periodic manner.
  8. 8. The method of claim 7,
    The discharge means
    Third switching means for switching the output of the pulse extracting means to an on / off control signal and switching the third switching means; And
    And discharge control means connected to the storage means for discharging the current of the storage means when the third switching means is in the on state.
  9. 9. The method of claim 8,
    The discharge control means includes:
    And a resistance means for adjusting a current discharge rate of said storage means.
  10. 10. The method of claim 9,
    Wherein the resistance means comprises:
    A voltage / pulse converter comprising a field effect transistor.
  11. 11. The method of claim 10,
    Wherein the field effect transistor comprises:
    And a gate terminal connected to the third switching means.
  12. 11. The method of claim 10,
    The field effect transistor
    And the gate terminal is adjustable from the outside.
  13. 9. The method of claim 8,
    The discharge control means includes:
    And a multiplier operable to output a current of the storage means at a constant value.
  14. Power storage means for receiving a current from the outside to store the current, and outputting the stored current;
    A voltage comparison means for receiving an output voltage of the storage means and comparing the output voltage with a predetermined reference voltage and outputting the result;
    Pulse extraction means for outputting a pulse to the outside in accordance with the output of the voltage comparison means; And
    And a discharging means for discharging the current of the storage means by feeding back the output of the voltage comparing means as a control signal.
  15. 15. The method of claim 14,
    The storage means
    A first switching means for on / off switching a current input from the outside;
    Charge charging means for charging a current input from the outside when the first switching means is turned on; And
    And second switching means connected in parallel with the charge charging means to remove an electric charge in the charge charging means that is turned on when a predetermined operation is completed and remains lower than a reference voltage.
  16. 16. The method of claim 15,
    Wherein the charge charging means comprises:
    And a capacitor.
  17. 17. The method according to any one of claims 14 to 16,
    Wherein the voltage comparing means comprises:
    Second switching means for on / off switching the output voltage input from the storage means; And
    When the second switching means is turned on, receives the output of the storage means as one input, receives the predetermined reference voltage as another input, and when the voltage of the storage means is greater than the predetermined reference voltage (V 1 ) And outputting an off state when the voltage of the storage means is lower than the predetermined reference voltage (V 1 ).
  18. 18. The method of claim 17,
    Wherein the voltage comparing means comprises:
    And fourth switching means connected between the output terminal of the second switching means and the ground to reset the state of the voltage comparator when the second switching means is turned off, / Pulse converter.
  19. 19. The method of claim 18,
    Wherein the voltage comparator comprises:
    The source terminal of claim 1 p-type metal oxide semiconductor field effect transistor (MOSFET) connected to the V pp;
    A second p-type metal oxide semiconductor field effect transistor (MOSFET) having a source terminal connected to Vpp and a gate terminal connected to the gate terminal of the first p-type metal oxide semiconductor field effect transistor (MOSFET) and a drain terminal connected to the output terminal, ;
    The drain terminal is the first 1 p-type metal oxide semiconductor field effect transistor connected to the gate terminal and the drain terminal of the (MOSFET), and the gate terminal V - is connected to the source terminal of claim 1 n-type metal oxide semiconductor field effect associated with the V nn A transistor (MOSFET); And
    And a second n-type metal oxide semiconductor field effect transistor (MOSFET) having a drain terminal connected to the output terminal, a gate terminal connected to V + , and a source terminal connected to V nn .
  20. 18. The method of claim 17,
    Wherein the pulse extracting means comprises:
    Master clock generating means for generating a master clock; And
    Wherein the output of the voltage comparison means is one input and the master clock output from the master clock generation means is another input to carry out a logical product operation so that when the output of the voltage comparison means is on, And a logical product operation means for outputting a pulse in a periodic manner.
  21. 21. The method of claim 20,
    The discharge means
    Third switching means for receiving the output of the voltage comparing means as feedback by an on / off control signal; And
    And discharge control means connected to the storage means for discharging the current of the storage means when the third switching means is in the on state.
  22. 22. The method of claim 21,
    The discharge control means includes:
    And a resistance means for adjusting a current discharge rate of said storage means.
  23. 23. The method of claim 22,
    Wherein the resistance means comprises:
    A voltage / pulse converter comprising a field effect transistor.
  24. 24. The method of claim 23,
    Wherein the field effect transistor comprises:
    And a gate terminal connected to the third switching means.
  25. 24. The method of claim 23,
    The field effect transistor
    And the gate terminal is adjustable from the outside.
  26. 22. The method of claim 21,
    The discharge control means includes:
    And a multiplier operable to output a current of the storage means at a constant value.
KR1019960043267A 1996-09-30 1996-09-30 Voltage pulse converter changed pulse according to voltage variation KR0179302B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019960043267A KR0179302B1 (en) 1996-09-30 1996-09-30 Voltage pulse converter changed pulse according to voltage variation

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
KR1019960043267A KR0179302B1 (en) 1996-09-30 1996-09-30 Voltage pulse converter changed pulse according to voltage variation
GB9720799A GB2319127B (en) 1996-09-30 1997-09-30 A voltage/pulse converting apparatus
JP26751097A JP3421229B2 (en) 1996-09-30 1997-09-30 Voltage / pulse converter that changes the pulse by voltage change

Publications (2)

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KR19980023767A KR19980023767A (en) 1998-07-06
KR0179302B1 true KR0179302B1 (en) 1999-04-01

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KR (1) KR0179302B1 (en)
GB (1) GB2319127B (en)

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US7518540B2 (en) 2002-07-31 2009-04-14 Quantum Semiconductor Llc Multi-mode ADC and its application to CMOS image sensors
AT363767T (en) 2002-07-31 2007-06-15 Quantum Semiconductor Llc Serial, asynchronous analog digital conversion with dynamically adjusted bandwidth
US7319423B2 (en) 2002-07-31 2008-01-15 Quantum Semiconductor Llc Multi-mode ADC and its application to CMOS image sensors
KR20140017631A (en) * 2011-03-29 2014-02-11 콘티넨탈 테베스 아게 운트 코. 오하게 Device for measuring a supply voltage in electric vehicles

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL137500C (en) * 1964-04-23
US3587092A (en) * 1969-04-04 1971-06-22 Weston Instruments Inc Analog-digital converters
US4031367A (en) * 1975-03-31 1977-06-21 Schlumberger Technology Corporation Methods and apparatus for pulse height analyzer offset control
FR2385264B1 (en) * 1977-03-22 1982-03-19 Hitachi Ltd
JPS581567B2 (en) * 1978-04-07 1983-01-12 Hitachi Ltd
JPS62112222U (en) * 1985-12-28 1987-07-17

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GB2319127A (en) 1998-05-13
KR19980023767A (en) 1998-07-06
GB9720799D0 (en) 1997-12-03
JPH10336034A (en) 1998-12-18
JP3421229B2 (en) 2003-06-30
GB2319127B (en) 2000-09-06

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