KR0179185B1 - Relay short circuit / open inspection device - Google Patents

Abstract

Relay short circuit / open inspection apparatus according to the present invention relates to a device that minimizes the time to inspect the short / open state of the relay of the equipment equipped with a plurality of relays, the operation state of a plurality of relays configured in the equipment or apparatus It can inspect the number or the whole batch or sequential to improve the productivity of the equipment or device and the working efficiency of the inspector, and improve the productivity of the equipment or device by storing the data about error or failure rate of the input relay. It can be used as a useful data, and the circuit of the inspection device can be extended to inspect multiple relays at the same time, thereby providing compatibility between different types of equipment or devices, and identifying relays to be measured by 7-segment. It is to be able to plan the convenience of the inspector.

Description

Relay short circuit / open inspection device

1 is a circuit diagram showing an apparatus for checking a short circuit / open state of a conventional relay.

2 is a block diagram of a device for checking for shorts / opens of a relay according to the invention.

3 (a) and 3 (b) are circuit diagrams of an apparatus for inspecting a short circuit / opening of a relay according to the present invention.

4 (a)-(c) are waveform diagrams of a state in which a chattering state and a negative logic gate portion generated by a switch of a clock generator in accordance with the present invention are removed;

5 (a) and (b) are truth tables for the output signal of the up counter according to the present invention.

* Explanation of symbols for main parts of the drawings

10: clock generator 12: switch

20: negative logic gate portion 22, 24: negative logic gate

30: up counter part 32, 34, 36, 38: flip-flop

40: 7-segment drive part 42, 44, 46, 48: logical product gate

50: 7-segment 60: decoder

62, 64: decoder 70: integrated circuit unit for selective relay driving

72, 74: integrated circuit 76: latch circuit

80: selection relay 90: measurement relay

92: relay for reference voltage 100: computer

The present invention relates to a relay short circuit / open inspection apparatus, and more particularly to a device that minimizes the time to inspect the short / open state of the relay of the equipment equipped with a plurality of relays.

In general, various equipments are driven by applying a predetermined power, and such equipment includes a plurality of relays for operating or driving various devices configured in the equipment. Therefore, the plurality of relays are driven by the control signal of the control unit provided in the equipment to interrupt the applied power.

In this way, the relay provided in the equipment or the device is normally operated so that various instruments or devices connected to the relay can be operated correctly by the control signal of the controller.

However, in the related art, when a relay malfunctions due to an overvoltage, an overcurrent, a change in characteristics, or the like, a device equipped with a plurality of relays may not operate normally. In other words, since the relay has a function of switching the state of the device or the device by the control signal of the control unit, the control signal of the control unit cannot be transmitted to the device or the device. Therefore, when the relay breaks or breaks down, the function of the equipment is reduced, resulting in a decrease in productivity and a rise in defects.

1 is a circuit diagram for checking a short circuit / open state of a plurality of relays configured in a conventional equipment, wherein a relay 2 for supplying a signal and a relay under test 3 to be inspected are connected to the measurement unit 1. The relay 4 of the inspection unit 5 is connected to the relay 2 and the relay 3 to be measured, and is driven to the coil units 2b and 3b of the relay 2 and the relay 3 to be measured. The voltages Vcc are connected respectively.

In the conventional inspection apparatus configured as described above, the relay 3 of the inspection unit 4 having the inspection circuit configured therein for the inspection of the plurality of measurement relays 3 mounted on the predetermined equipment is to be inspected. Connect to one side of and check the short-circuit or open state of the relay under test (3).

That is, if a constant voltage is applied from the measuring unit 1 and the inspection unit 5 sends a constant voltage to the relay under measurement 3 and the relay under measurement 3 is turned on, the short circuit after recognizing the contact resistance value is performed. In this case, it is judged to be good, and when it is input in a state where there is no contact resistance value, the defective judgment in the open state can be made.

As described above, in order to inspect the operation state of a plurality of measured relays configured in one equipment or device, a relay of an inspection unit is connected to each relay to be measured, and the measured relay is inspected after applying a reference voltage from the measurement unit. In order to inspect a plurality of relays to be tested, the increase in the inspection time caused by inspecting the relays to be tested one by one, the reduction of the inspector's inspection efficiency due to the simple and repeated inefficient inspection, and the predetermined equipment B After the manufacture of the device, the inspection time of the relay increases, so there is a problem that the time required to manufacture the device or equipment is longer.

The present invention has been made in order to solve the above problems, the object of the present invention is to inspect the short circuit or open state of a plurality of relays provided in the equipment or apparatus at a time to reduce the inspection time of the relay, to improve productivity relay The present invention provides a short circuit / open inspection device.

A feature of the relay open / short test apparatus according to the present invention for achieving the above object is a clock for selecting a relay to be inspected in the device for checking the short-circuit and opening of a plurality of relays mounted on the equipment or device A signal generator for generating a signal, a negative logic gate for removing noise components included in a clock signal generated from the clock generator, and a selection signal of a relay to be counted by checking the signal output from the negative logic gate A 7-segment driver for outputting a drive control signal by performing a logical operation on the up counter for outputting the signal, the selection signal output from the up counter, and the number of relays to be examined according to the drive signal output from the 7-segment driver. A relay drive data generator composed of 7-segments represented by; A decoding unit for decoding the selection signal output from the up counter of the relay drive data generator, a selection relay driving direct circuit unit for outputting the signal decoded and output from the decoding unit to a selected relay, and the selection relay driving direct An inspection unit configured to provide a driving signal to a selected one of the plurality of relays according to a signal output from a circuit unit; It is composed of a computer that outputs a reference voltage and a control signal to a plurality of relays attached to the equipment or device to determine whether the relay is shorted or opened.

Hereinafter, based on the accompanying drawings, a preferred embodiment of the relay short circuit / re-inspection apparatus according to the present invention will be described in detail.

2 is a block diagram of a device for inspecting a short circuit or an opening of a relay, and includes a clock generator 10 for selecting a relay to be inspected and a noise component embedded in a clock signal generated from the clock generator 10. The logical logic unit 20, an up counter unit 30 for countering a signal output from the negative logical gate unit 20, and data counted and output from the up counter unit 30 are logical. A relay drive data generator 300 comprising a 7-segment driver 40 for performing a calculation and a 7-segment 50 for displaying a predetermined character by driving the 7-segment driver 40; A decoder unit 60 for enabling the counter signal output from the up counter unit 30 and an integrated circuit unit for selecting relay driving for outputting a signal to a relay to be selected as an enable signal output from the decoder unit 60 ( 70 and an inspection unit 200 including a plurality of selection relay units 80 connected to the selection relay driving integrated circuit unit 70; A computer 100 for outputting and inspecting a reference voltage and a control signal is provided to a plurality of relays 90 to be mounted on equipment or devices.

3 (a) and 3 (b) are circuit diagrams of an apparatus for inspecting a short circuit / opening of a relay according to the present invention, wherein the clock generator 10 includes a switch 12 for generating a clock signal; A first negative logical gate portion 22 and a second negative logical gate portion 24 connected to two contacts of the switch 12, respectively, and the switch 12 and the first and second negative logical products, respectively. The driving voltage Vcc is connected between the gate portions 22 and 24 through the resistors R1 and R2 having a constant magnitude. The output terminals of the negative logical gates 22 and 24 are respectively connected to mutual input terminals.

The up counter unit 30 connects a plurality of flip-flops 32, 34, 36, 38 in series, and the negative counter is connected to the clock terminals of the flip-flops 32, 34, 36, 38. The output terminal of the AND gate portion 20 is connected, and the signal output from the output terminal of each flip-flop 32, 34, 36, 38 is connected to the input terminal of the 7-segment driver 40. The 7-segment 50 capable of displaying a plurality of digits is connected to the output terminal of the 7-segment driver 40.

In addition, the input terminals of the first decoder 62 and the second decoder 64 of the decoder unit 60 are connected to the output terminals of the flip-flops 32, 34, 36, 38, and the second decoder ( A plurality of integrated circuits 72 and 74 of the selective relay driving integrated circuit unit 70 are connected to an output terminal 64, and a latch circuit 76 is connected to an output terminal of the plurality of integrated circuits 72 and 74.

The first decoder 62 may be configured as an extension circuit capable of inspecting a plurality of relays 94 and 96 to be measured. That is, the output terminal of the first decoder 62 may include a circuit to which the plurality of integrated circuits 72 and 74 of the second decoder 64 and the selective relay driving integrated circuit unit 70 are connected.

A plurality of selection relays 82 and 84 are connected to the output terminal of the latch circuit 76, and the selection relays 82 and 84 are respectively connected to the measurement targets 94 and 96 of the equipment or device to be inspected. Connected. In addition, the relays 94 and 96 to be measured are connected to a computer 100 that outputs a reference voltage or a control signal.

It will be described the operation of the open / short inspection device of the relay according to the present invention having such a configuration.

The relay drive data generator 300 is an up counter unit 30 as a selection relay 82 and 84 for measurement separately from the plurality of measured relays 94 and 96 of equipment or devices connected to the computer 100. ), And the number of flip-flops 32, 34, 36, and 38 of the up counter unit 30 can be distinguished through the 7-segment 50. For example, in order to avoid repeated display of the same circuit, only the data values 13-10 which can control 16 as one simple 64 measured relays 94 and 96 can be implemented. The operation is the same as in the conventional case, but the order is to select 16 and then select 64 measured relays 94 and 96 next.

In the case of the generator generating data by selecting the 64 relays 94 and 96 to be measured, this is the same method as described above, and this is the flip-flop 32 and 34 when the up-counter unit 30 is designed. It is possible to add two more (36) and (38). In addition, the connection part of the 7-segment 50 is the same, and only the number of encoding of the 7-segment drive part 40 needs to be increased to 15-10.

When the switch 12 for generating the clock signal of the clock generator 10 is operated to select the relays 94 and 96 to be inspected, driving connected through A and B which are two contacts of the switch 12 are performed. The voltage Vcc is output to the negative logical gate portion 20. That is, when the switch 12 is switched from the A position to the B position, the first driving voltage Vcc connected to the input terminals of the first and second negative logic gate portions 22 and 24 is connected to the A stage. The driving voltage Vcc is applied to the negative logic gate portion 22 in a high state. At this time, the driving voltage Vcc connected to the B stage is bypassed to the ground, and the second negative logic gate unit 24 is applied with the signal in a low state. On the contrary, when the switch 12 is switched from the B position to the A position, the driving voltage Vcc is applied in a high state to the second negative logic gate portion 24 connected to the B stage. In addition, the driving voltage Vcc is bypassed in the A stage, and a low state signal is applied to the first negative logic gate portion 22.

However, when switching between the A and B stages of the switch 12, chattering occurs due to the switching of mechanical contacts. Therefore, in order to remove such chattering, the negative logic gate portion 20 is connected to remove chattering.

4A and 4C are waveform diagrams showing the chattering state generated by the switch of the clock generation unit and the state removed through the negative logic gate unit. FIG. FIG. 4B is a waveform diagram of the driving voltage Vcc generated before the operation, and FIG. 4B is a waveform diagram of the driving voltage in the chattered state generated when the switch 12 is switched. It can be seen that chattering has occurred. At this time, the signal chattered and output at the A and B stages of the switch 12 passes through the first and second negative logic gate portions 22 and 24, as shown in FIG. Output is with chattering removed. This means that the chattering generated at the time of switching of the switch 12 outputs the signals output through the first negative logical gate portion 22 and the second negative logical gate portion 24, respectively. 22) and chattering can be eliminated by re-input to the input terminal of the second negative logical gate portion 24.

The switching signal of the switch 12 output from the negative logic gate unit 20 is applied to the clock terminal of the first flip-flop 32 of the up counter unit 30. The flip-flops 32, 34, 36, and 38 of the up counter unit 30 maintain the applied high or low signal state. When a high signal is applied, the output of the output terminal maintains a high state. When the low state signal is applied to the input terminal, the low state is outputted. That is, the state signal is applied to the output terminal while maintaining the state signal applied from the outside. The number of flip-flops 32, 34, 36, 38 of the up counter unit 30 can be extended to a plurality in accordance with the number of the relays 94, 96 to be measured.

When a high state signal is applied to the first flip flop 32 of the up counter unit 30, the first flip flop 32 outputs a high state signal, and the second flip flop 34 is a first flip flop 32. It is connected to the inverting output terminal of the flop 32 to receive a low signal and maintain a low state. When the output terminal of the first flip-flop 32 outputs a low state signal, the inverted output terminal outputs a high state signal, so the second flip-flop 34 becomes high and outputs a high signal from the output end. .

The 7-segment driver 40 is connected to the output terminals of the flip-flops 32, 34, 36, 38 of the up counter unit 30, and the 7-segment driver 40 is a plurality of logical products. It is composed of gates 42, 44, 46, and 48. That is, the output signal output from the output ends of the flip-flops 32, 34, 36, 38 is applied as an input signal to the input terminal of the 7-segment driver 40. For example, when a low signal is applied to the first logical gate 42 of the 7-segment driver 40, the first logical gate 42 outputs a low signal through a logical operation to generate a 7-segment ( It outputs '01' where 50) is 0. That is, although the output signal of the first logical gate 42 is in a low state, the display light emitting diodes D1 -Dn, which are terminals of the 7-segment 50, display '01'. The state represented by the 7-segment 50 is represented by 1 to 16, not 0-15, so that the examiner can easily recognize the state.

Thus, the inspector may select the measurement relay 94 or 96 through the 7-segment 50 when selecting the measurement relay 94 or 96 of the equipment or device, or the measurement relay 94 (96) can be easily recognized.

5 is a truth table of the output signal of the up counter, FIG. 5 (a) is a truth table of the driving input data of the relays 94 and 96 to be measured, and FIG. 94 is a control truth table for driving input data having a set of (96) and (96).

Data output from the output terminals of the flip-flops 32, 34, 36 and 38 configured in the up counter unit 30 is applied to the decoder unit 60, and the decoder unit 60 is input data. Outputs the enable signal. That is, when the output signal of the flip-flops 32, 34, 36, 38 applied to the input terminal of the first decoder 62 is 13-10, the enable signal is transmitted to the second decoder 64 through the output terminal. Output This can select a certain number of relays 94 and 96 to be measured.

Accordingly, one enable signal output from the output terminal of the first decoder 62 is applied to the second decoder 64, and the second decoder 64 outputs the enable signal to a plurality of integrated circuits connected to the output terminal. do. Therefore, the first decoder 62 is enabled by the data values output from the flip-flops 32, 34, 36, 38, and the first decoder 62 enables the second decoder 64. Let's do it. In addition, the second decoder 64 selects the relays 94 and 96 to be measured by enabling the plurality of integrated circuits 72 and 74 of the selection relay driving integrated circuit unit 70. Data output from the plurality of integrated circuits 72 and 74 is input to an input terminal of the latch circuit 76 to output a signal for selecting one of a predetermined number of relays 94 and 96 to be measured. That is, the latch circuit 76 maintains the initial state until the next drive signal is applied after driving the selected relays 94 and 96 using a plurality of D-flip flops.

At this time, the selection relay unit 80 connected to the latch circuit 76 is connected to the relays 94 and 96 of the equipment or the device, respectively, and checks the operation state of the relays 94 and 96 to be measured. The relay switches 82a and 84a of the selection relays 82 and 84 are connected to the relay switch 90a of the reference voltage supply relay 92 to be used, and the relay switches of the selection relays 82 and 84 are connected. The relay switches 84a and 86a of the relays 94 and 96 to be measured are connected to the 82a and 84a.

The output terminals of the computer 100 are connected to the relays 94 and 96 respectively, and the computer 100 applies a reference voltage to the reference voltage supply relay 92 or the relay 94 to be measured ( There is a built-in program to measure and determine whether 96) is shorted or open.

In this way, the computer 100 supplies a reference voltage from the output terminal to the relay switch 92a of the reference voltage supply relay 92, and applies a control signal to the coil unit 92b. In addition, the measured voltage is input from the relay switches 94a and 96a of the relays 94 and 96 to be measured.

Therefore, the reference voltage output from the computer 100 is output through the relay switch 92a of the reference voltage supply relay 92 because the relay switch 92a is already turned on by the driving voltage Vcc. to be. At this time, when one of the plurality of selection relays 82 and 84 is turned on by the signal output from the latch circuit 76, the magnetic field of the coil units 82b and 84b of the selection relays 82 and 84 is turned on. The relay switches 84a and 86a are kept on, and the reference voltages output through the relay switch 92a of the reference voltage supply relay 92 are relay switches 84a of the selection relays 82 and 84. Outputs to relay switches 94a and 96a of relays 94 and 96 under measurement 86a. If the coil parts 94b and 95b of the relays 94 and 96 are kept on by the driving voltage Vcc, the relay switches 94a and 96a are turned on and the computer 100 The output reference voltage is input to the input terminal.

However, if the relays 94 and 96 to be opened are open, the coil parts 94b and 96b of the relays 94 and 96 are not turned on by the driving voltage Vcc and thus the relay switch 94a. Since the 96a cannot be turned on, the measurement voltage is not applied to the input terminal of the computer 100. Therefore, the computer 100 can determine the short-circuit or open state of the relays 94 and 96 to be measured through the reference voltage supply relay 92 and the selection relays 82 and 84.

In addition, the relays 94 and 96 measured through the clock generator 10 can be easily inspected as the selection relays 82 and 84 sequentially connected to the latch circuit 76.

As described above, when the relay switches 94a and 96a of the relay to be tested 94 and 96 are turned on at the reference voltage value through the reference voltage supply relay 92, the relay switch 94a is turned on. On-state resistance value of 96a) is input through the input terminal, and the input voltage value is converted into analogue / digital conversion and calculated as resistance value, and the measured relays 94 and 96 are opened by comparing with the reference resistance value. Or short circuit status can be determined.

Accordingly, the present invention can inspect the operation state of a plurality of relays configured in the equipment or the device by a predetermined number or in a batch or sequentially to improve the productivity of the equipment or the device and the work efficiency of the inspector. Data about errors or failure rates of relays can be saved to improve productivity of equipment or devices.Also, multiple relays can be tested at the same time by expanding the circuit of the test equipment. Compatibility between the two and seven-segment relay to be measured can be recognized for the convenience of the inspector.

Claims (9)

A device for inspecting whether a plurality of relays mounted on a plurality of devices or devices is shorted or opened, the apparatus comprising: a clock generator for generating a clock signal for selecting a relay to be inspected; and a clock signal generated from the clock generator. Logic operation of the negative logic gate to remove the noise component, the up counter for outputting the selection signal of the relay to be checked by counting the signal output from the negative logic gate, and the selection signal output from the up counter A 7-segment driving unit for outputting a driving control signal, and a 7-segment relay driving data generator for displaying the number of relays to be inspected according to a drive signal output from the 7-segment driving unit as a predetermined character; A decoding unit for decoding the selection signal output from the up counter of the relay drive data generator, a selection relay driving direct circuit unit for outputting the signal decoded and output from the decoding unit to a selected relay, and the selection relay driving direct An inspection unit configured to provide a driving signal to a selected one of the plurality of relays according to a signal output from a circuit unit; And a computer for outputting a reference voltage and a control signal to a plurality of relays attached to the equipment or the device to determine whether the relay is shorted or open. The relay short / open inspection apparatus according to claim 1, wherein the clock generation unit comprises a switch configured to generate a clock signal, and a resistor connected to the two contacts of the switch to apply a driving voltage. The relay short / open inspection apparatus according to claim 1, wherein the negative logical gate portion includes first and second negative logical gates connected to respective contacts of the switch. 4. The method of claim 3, wherein an output terminal of the first negative logical gate is connected to an input terminal of a second negative logical gate, and an output terminal of the second negative logical gate is connected to an input terminal of the first negative logical gate. Relay short / open inspection device. The relay short / open inspection apparatus according to claim 1, wherein the up counter unit can extend the flip-flop, the 7-segment driving unit, and the 7-segment according to the number of the relay to be measured. 2. The apparatus of claim 1, wherein the decoder unit comprises: a first decoder for enabling a predetermined number of relays to be measured in one set; and a first decoder for enabling a predetermined number of relays with an enable signal output from the first decoder; Relay short / open inspection device comprising a two decoder. The integrated circuit of claim 1, wherein the integrated circuit for selecting relay driving unit comprises a plurality of integrated circuits for outputting a control signal for driving the selected relay with an enable signal output from the second decoder, and a control signal applied from the plurality of integrated circuits. And a latch circuit for driving the connected select relay. 8. The relay short / open inspection apparatus according to claim 7, wherein the latch circuit comprises a flip-flop which maintains a state until the next control signal is applied after driving the selection relay. 7. The method of claim 1 or 6, wherein the plurality of integrated circuits of the selection relay driving integrated circuit unit are enabled by the enable signal of the second decoder to output a signal for controlling the selection relay. Relay short / open inspection device.