KR0172079B1 - Flash charging circuit using reset i.c. - Google Patents

Abstract

The present invention relates to an automatic flash charging circuit using a reset IC, comprising: an oscillator driven according to an oscillation operation control signal applied to output a voltage, a booster for boosting and outputting a power output from the oscillator to a predetermined voltage; A charging unit for outputting the boosted power output from the boosting unit, a neon lamp variable according to the state of charge of the charging unit, a neon lamp output unit for outputting a corresponding charging state signal, and a driving signal when a predetermined time elapses A reset unit for outputting a signal, a signal calculation unit for performing an AND operation on the driving signal and the charge state signal output from the reset unit, and outputting a reset signal corresponding thereto; An oscillation signal output unit driven according to a signal and outputting a corresponding oscillation signal; When the copper signal is output, the controller determines the charging completion state of the charging unit according to the applied charging state signal, and outputs a trigger signal and a clock signal corresponding thereto, and is driven according to the trigger signal output from the controller to generate a predetermined amount of flashes. It includes a light emitting part that emits light, eliminating the risk of overcharging the flash, freeing the time-comparting function of the microcomputer, improving the reliability of the charging completion, and repetitive on / off operation of the power supply. Abnormal charging condition can be prevented.

Description

Flash Auto Charging Circuit Using Reset IC

1 is a block diagram of a flash automatic charging circuit using a reset IC according to an embodiment of the present invention,

2 is a detailed circuit diagram of a flash automatic charging circuit using a reset IC according to an embodiment of the present invention.

* Explanation of symbols for main parts of the drawings

10: oscillation unit 20: boosting unit

30: charging unit 40: neon lamp state output unit

50: reset unit 60: signal operation unit

70: oscillation signal output unit 80: control unit

90: light emitting part

The present invention relates to a flash automatic charging circuit using a reset IC, and more specifically, to reset the flash to automatically complete the charging of the flash using a reset IC, and to prevent overcharge It relates to a flash automatic charging circuit used.

In the conventional flash charging circuit, the microcomputer continuously checks the state of the neon lamp until the charging is completed and the neon lamp is turned on.

If the microcomputer does not continuously check the neon lamp, overcharging occurs due to missing the charging completion time, and the time-slicing function of the microcomputer is greatly limited.

Therefore, an object of the present invention is to solve the above-mentioned problems, eliminating the risk of overcharging the flash, freeing the time-splitting function of the microcomputer, improving the reliability of charging completion, and repeating the fast on / off operation of the power supply. It is to provide a flash automatic charging circuit using a reset IC to prevent abnormal charging state that may occur in the initial state of flip-flop.

As a means for achieving the above object, the configuration of the present invention comprises: an oscillating unit which is driven in accordance with an oscillation operation control signal applied to output a voltage; A booster for boosting and outputting the power output from the oscillator to a previous voltage and a charging unit for charging the booster power output from the booster; A neon lamp output unit configured to change an operating state of the neon lamp according to the charging state in the charging unit, and output a charging state signal corresponding thereto; A reset unit for outputting a driving signal when a predetermined set time elapses; A signal calculator for performing an AND operation on the driving signal and the charge state signal output from the reset unit, and outputting a reset signal corresponding thereto; An oscillation signal output port for varying an operating state according to a constant redlet signal and being driven according to an applied clock signal to output a corresponding oscillation signal; A control unit for determining a charging completion state of the charging unit according to a charging state signal applied when the driving signal is output from the reset unit, and outputting a trigger signal and a clock signal corresponding thereto; And a light emitting unit driven according to a trigger signal output from the controller to emit a predetermined amount of flash.

With the above-described configuration, a person having ordinary skill in the art to which the present invention pertains will be described in detail with reference to the accompanying drawings.

1 is a block diagram of a flash automatic charging circuit using a reset IC according to an embodiment of the present invention, and FIG. 2 is a detailed circuit diagram of a flash automatic charging circuit using a reset IC according to an embodiment of the present invention.

As shown in FIG. 1, a configuration of a flash automatic charging circuit using a reset IC according to an embodiment of the present invention includes: an oscillator 10 which is driven in accordance with an oscillation operation control signal applied to output a voltage; A booster 20 for boosting and outputting the power output from the oscillator 10 to a predetermined voltage; A charging unit 30 for outputting a boosting power output from the boosting unit 20; A neon lamp output unit 40 that varies in accordance with the state of charge of the charging unit 30 and outputs a charging state signal corresponding thereto; A reset unit 50 for outputting a driving signal after a predetermined time elapses; A signal calculation unit 60 for performing an AND operation on the driving signal and the charging state signal output from the reset unit 50 and outputting a reset signal corresponding thereto; The operating state is changed according to the always reset signal, and the oscillation signal output unit 70 which is driven according to the applied clock signal and outputs the corresponding oscillation signal and the charging state which is applied when the driving signal is output from the reset unit 50 A control unit 80 for determining a charging completion state of the charging unit 30 and outputting a trigger signal and a clock signal corresponding to the signal; And a light emitter 90 driven according to a trigger signal output from the controller 80 to emit a predetermined amount of flash.

As shown in FIG. 2, the configuration of the oscillator 10 includes: a first capacitor C900 having an input power source connected to one terminal and the other terminal grounded; A first resistor R900 having an input power connected to one terminal and one terminal connected to the other terminal of the first resistor R900, and a second resistor R901 having the other terminal connected to the oscillation signal output unit; A PNP type first transistor Q901 having a base terminal connected to a resistor R900 and a second terminal R901 coupled terminal; A third resistor (R902) having one terminal connected to the collector terminal of the transistor (Q901) and the other terminal being grounded; A second capacitor C901 having the other terminal connected to an emitter terminal of the first transistor Q901 and one terminal connected to an input power source; A base terminal is connected to the emitter terminal of the first transistor Q901, and the emitter terminal includes a PNP type second transistor Q900 connected to an input power source.

In the configuration of the booster 20, an input terminal one terminal 1 is connected to a collector terminal of the second transistor Q900, and the first boost transformer T900 and the cathode of which the middle terminal 2 is grounded are connected to the cathode. A terminal is connected to the other terminal 4 of the output terminal of the first boosting transformer T900, and is connected between the collector terminals of the first transistor Q901, and the anode terminal is grounded with the first diode D900 and the anode. A second diode D901 having a terminal connected to the other terminal 3 of the first boosting transformer T900 and a third diode D902 having an anode terminal connected to the one end terminal 5 of the output terminal of the first boosting transformer T900. )

The charging unit 30 includes a main capacitor C1 having one terminal connected to the cathode terminal of the third diode D902 and one terminal of the fourth resistor R903, and the other terminal being grounded. .

The neon lamp state unit 40 may include a fourth resistor R903 having one terminal connected to a cathode terminal of the third diode D902; A neon lamp N1 having one terminal connected to the other terminal of the fourth resistor R903; A fifth resistor R904 having one terminal connected to the other terminal of the neon lamp N1; A PNP type third transistor Q902 having an emitter terminal connected to the other terminal of the fifth resistor R904; One terminal is connected to the other terminal of the PNP type third transistor Q902, and the other terminal is connected to the ground terminal of the third capacitor C902 and the third transistor Q902, and the emitter terminal An NPN type fourth transistor Q903 having a grounded state and a movable voltage of 5V applied thereto; A fourteenth resistor R914 to which a starting power source 5V is applied to one terminal; A third resistor R912 having one terminal connected to the collector terminal of the PNP type third transistor Q902; The emitter terminal is grounded, the base terminal is connected to the other terminal of the thirteenth resistor (R912), and the collector terminal is connected to the fourteenth resistor (R914), and is made of an NPN type ninth transistor (Q908) outputting a neon lamp state. .

The light emitting unit 90 includes a fourth diode D903 having an anode terminal grounded and a cathode terminal connected to a second diode D901 cathode terminal; A fifth PNP type transistor Q904 having a fourth capacitor C903 and an emitter terminal connected to a cathode of the second diode D901; An NPN type eighth transistor Q907 connected to a base terminal of the fifth transistor Q904 and an emitter terminal grounded; A fourth capacitor C903 and a seventh resistor R907 having one terminal connected to the base terminal of the eighth transistor Q907 and the other terminal being grounded; One terminal is connected to the base terminal of the eighth transistor (Q907), the other terminal is connected to the trigger signal output terminal (FL-TRG) of the eighth resistor (R907) and the collector terminal is the second diode (D901) a sixth transistor (Q905) connected to the cathode terminal and a base terminal connected to the fifth transistor (Q904) collector terminal; A sixth resistor R905 having one terminal connected to the emitter terminal of the sixth transistor Q905; A seventh transistor (Q906) having a base terminal connected to the collector terminal of the fifth transistor (Q904), an emitter terminal connected to the other terminal of the sixth resistor (R905), and the collector terminal being grounded; A ninth resistor R908 having one terminal connected to the base terminal of the seventh transistor Q906 and the other terminal grounded; A tenth resistor R909 having one terminal connected to a cathode terminal of the third diode D902; A high voltage output transistor I1 having a base terminal connected to the other terminal of the sixth resistor R905, a collector terminal connected to the other terminal of the tenth resistor R909, and an emitter terminal grounded; A sixth capacitor C905 and a seventh capacitor C907 having one terminal connected to the other terminal of the tenth resistor R909; An eleventh resistor R910 having one terminal connected to the other terminal of the sixth capacitor C905; A third diode (R902) connected between a cathode terminal of the tenth resistor (R909) and a collector terminal of the high voltage output transistor (I1), and an anode terminal of which is connected to the other terminal of the eleventh resistor (R910); A second boost transformer T901 having one input terminal connected to the other terminal of the seventh capacitor C906 and the other terminal connected to the output other terminal to be grounded; A discharge tube (XE TUBE) whose one terminal is connected to the third diode (D902) cathode terminal and the middle terminal is connected to one side terminal of the output terminal of the second boost transformer (T901); A twelfth resistor (R911) having one terminal connected to the other terminal of the discharge tube (XE TUBE) and having the other terminal grounded; The anode terminal comprises a third diode (D902) connected to the other terminal of the discharge tube (XE TUBE) and one terminal of the twelfth resistor (R911).

In the configuration of the signal operation unit 60, the first terminal of the input terminal is connected to the reset unit 50, the second terminal is connected to the other terminal of the 14th resistor (R914) of the neon lamp state unit 40, the output terminal The third terminal includes an AND gate U3, which is an AND operator connected to the oscillation signal output unit 70.

The oscillation signal output unit 70 is configured of a D flip-flop U4, a second terminal of the D terminal of the D flip-flop U4 is grounded, and a first terminal is applied with a starting voltage of 5 V. The third terminal CLK, which is a clock terminal, is connected to the microcomputer U1 clock pulse output terminal FL-OSC of the controller 80, and the preset terminal PR is a fourth terminal of the logic of the operation unit 60. The oscillation signal output terminal Q terminal is connected to the other terminal of the second terminal R901 of the oscillation unit and the microcomputer (U1) oscillation operation check terminal FL-NEC of the control unit 80. .

The operation of the flash automatic charging circuit using the reset IC according to the embodiment of the present invention by the above configuration is as follows.

As shown in the accompanying FIG. 2, when power is first applied, the capacitor C1 of the charging unit 30 is not charged, and thus the neon lamp U1 of the neon lamp state unit 40 is turned off. The third transistor Q902 and the ninth transistor Q908 are turned off, and the neon lamp state signal of the high state is output to the state confirmation FL-NES terminal of the microcomputer U1.

The reset IC U2 of the reset unit 50 transmits the high state drive signal POR to the microcomputer drive signal POR terminal of the controller 80 when a predetermined set time (about 10 ms) elapses after the power is applied. The second terminal of the logical product operator U3 of the signal operation unit 60 is output.

Before the predetermined set time has elapsed, the logical product operator U3 of the signal calculating unit 60 performs the high-level neon lamp state signal output from the neon lamp state output unit 40 and the reset unit 50 reset IC U2. In operation, the driving signal of the low state is logically ANDed, and the corresponding low signal is output to the D flip-flop U4 preset PR terminal of the oscillation signal output unit 70.

As the low signal is applied to the preset PR terminal, the D flip-flop U4 outputs a high oscillation signal to the oscillator 10 and applies the first transistor Q901 to the first transistor Q901. The first transistor Q901 is turned off according to the oscillation signal, and the operation is not performed until the driving signal of the reset unit U2 of the reset unit 50 is output to the high state.

After a certain time has elapsed, when the driving unit outputs a high state from the reset unit 50, the logical AND operator U3 may generate the high state neon lamp state signal FL-NES and the high signal of the diffuser reset unit 50. By performing an AND operation and outputting a high signal corresponding thereto, the D flip-flop U4 is driven.

The microcomputer U1 applies a clock signal to the clock terminal CLK of the D flip-flop U4 of the oscillation signal output unit 70, and the D flip-flop U4 generates a low oscillation signal according to the applied clock signal. Is output to the base terminal of the first transistor Q901.

As the oscillation signal in the low state is applied, the first transistor Q901 is turned on, and accordingly, the second transistor Q900 is turned on, so that the output voltage of the oscillator 10 is applied to the boost transformer T900.

The booster 20 boosts and outputs the input power output from the oscillator 10 to a predetermined chargeable voltage, and the boosted voltage is charged to the charger 30.

When the charging unit 30 is charged to a predetermined voltage (280V), the neon lamp N1 of the neon lamp state output unit 40 is turned on, and a high signal is transmitted to the ninth transistor Q908 through the third transistor Q902. Is approved.

As the high signal is applied, the ninth transistor Q908 is turned on so that the neon lamp state signal in the low state is output to the microcomputer U1 neon lamp state output signal FL-NES terminal of the controller 80.

When a low signal is applied to the neon lamp state output signal FL-NES terminal of the control unit 80, the microcomputer U1 determines that the charging operation of the charging unit 30 is completed, and stops the clock signal to terminate the charging operation. .

After charging is completed, the microcomputer U1 outputs a trigger signal to the light emitting unit 90, and outputs the trigger signal to the light emitting unit 90, and the light emitting unit 90 is large as the fifth transistor Q904 is turned on. A high voltage is applied to the counting discharge tube XE TUBE to emit a certain amount of flash.

As described above, in the embodiment of the present invention, the risk of overcharging of the flash is eliminated, the time-slicing function of the microcomputer is freed, the reliability of the completion of charging is increased, and the D flip-flop occurs in the initial state of the D flip-flop due to the rapid on / off operation of the power supply. It is possible to provide a flash automatic charging circuit using a reset IC having an effect to prevent abnormal charging state.

This effect of the present invention can be used in all fields using a flash for still images, such as a general film camera and a digital still camera, a still video camera.

Claims (5)

Oscillation means for driving in accordance with the oscillation operation control signal applied to output a voltage; Boosting means for boosting and outputting the power sourced to the oscillation means to a predetermined voltage; Charging means for charging boosting power output from the boosting means; Neon lamp output means for varying the operation state of the neon lamp in accordance with the state of charge of the charging means, and outputs a corresponding charge state signal; Reset means for outputting a drive signal when a predetermined set time has elapsed; Signal calculating means for performing an AND operation on the driving signal and the charging state signal outputted from the reset means, and outputting a corresponding reset signal; An oscillation signal output means for varying an operation state according to an always reset signal and being driven according to an applied clock signal to output a corresponding oscillation signal; Control means for determining a charging completion state of the charging unit according to a charging state signal applied when the driving signal is output from the reset means, and outputting a trigger signal and a cleat signal corresponding thereto; And a light emitting means for driving in response to a trigger signal output from the control means to emit a predetermined amount of flash light. And said calculating means comprises an AND gate. The flash automatic charging circuit using a reset IC according to claim 1, wherein the oscillation signal output means comprises a D flip flop. 2. The flash automatic charging circuit according to claim 1, wherein the charging operation is not performed because the oscillation means is not driven according to the reset signal output from the reset means when the predetermined setting time has not elapsed. 2. The flash automatic charging circuit using a reset IC according to claim 1, wherein said reset means comprises an IC.