KR0168021B1 - Monostable signal independently generated on multi-bit bus detecting and transmission circuits - Google Patents

Abstract

The present invention relates to a circuit capable of detecting and outputting a one-shot signal generated independently from each other on a multi-bit bus. The present invention relates to a service by a monostable signal generated from one bit of multiple bits on a multi-bit bus. This is to prevent an error that may occur when the period of the read signal for detecting the monostable signal is variable when the monostable signal occurs in another bit.

To this end, the present invention includes a first latch for generating an output when the monostable signal is input and initialized by the rising edge detection signal of the read signal; A second latch driven by a rising edge detection signal of a read signal to receive an output of the first latch and initialized by a falling edge detection signal of the read signal; The multiplexer detects the bit position at which the monostable signal is generated by selecting one of the output of the first latch and the output of the second latch according to the falling edge detection signal of the read signal.

Description

Monostable Signal Detection and Transmission Circuits Independently Generated on Multiple-Bit Buses

1 is a block diagram of a monostable signal detection and transmission circuit in accordance with an embodiment of the present invention.

2 to 18 are operational waveform diagrams showing the results of simulating the monostable signal detection and transmission circuit of the present invention by an interrupt handler.

* Explanation of symbols for the main parts of the drawings

1,2: 1st, 2nd latch 3: Multiplexer

4: end gate 5: or gate

rd0: rising edge detection signal rd1: falling edge detection signal

dat: Data input signal dout: Bit position detection signal

sout: Pulse presence / no detection signal

The present invention detects a one-shot signal generated independently of each other on a multi-bit bus, which maintains only one very short clock period for a sufficiently long time, hereinafter referred to as a monostable signal. More specifically, the present invention relates to a circuit capable of outputting a signal, and more particularly, when a monostable signal is generated in another bit during service by a monostable signal generated in one of several bits on a multi-bit bus. In addition, by detecting and outputting the generated position, the monostable signal detection and transmission circuit generated independently on a multi-bit bus can operate correctly even when the period of the read signal detecting the monostable signal is variable. It is about.

Service operation on the bus because it cannot detect and output exactly when the monostable signal occurs in another bit in the service state by the monostable signal generated in any one of several bits on the bus serving multiple bits. This error occurs, especially when the period of the read signal for detecting the monostable signal is variable, it is difficult to read the monostable signal, which may cause an error in service operation using the bus.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to generate a monostable signal in another bit of a service of a monostable signal generated independently of each other in any one of several bits on the bus. The present invention provides a monostable signal detection and transmission circuit that is independently generated on a multi-bit bus so that it can be detected and transmitted without error by detecting and outputting the same without error.

In order to achieve the above object, the present invention provides a first latch for generating an output when a monostable signal is input and initialized by a rising edge detection signal of a read signal; A second latch driven by a rising edge detection signal of a read signal to receive an output of the first latch and initialized by a falling edge detection signal of the read signal; On the multiple bit bus, characterized in that it comprises a multiplexer for detecting the bit position where the monostable signal is generated by selecting one of the output of the first latch and the output of the second latch according to the falling edge detection signal of the read signal. An independently generated monostable signal detection and transmission circuit is provided.

Hereinafter, a monostable signal detection and transmission circuit generated independently on a multi-bit bus according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram schematically illustrating some components of a monostable signal detection and transmission circuit generated independently on a multi-bit bus according to an embodiment of the present invention.

The circuit shown in FIG. 1 has a data input terminal (D) capable of receiving a specific bit and an initialization terminal (clr) that can be initialized by an external signal to generate an output immediately after a monostable signal is input. There is a first latch 1 initialized by the rising edge detection signal rd0 of the read signal, which is enabled or initialized by the data input terminal D and an external signal leading to the output terminal of the first latch. In the state having the enable terminal (load) and the initialization terminal (clr) is driven by the rising edge detection signal (rd0) of the read signal to receive the output of the first latch, the falling edge detection signal (rd1) of the read signal The second latch 2 is initialized by ().

The bit position detection signal dout in which the monostable signal is generated by selecting one of the output of the first latch 1 and the output of the second latch 2 according to the falling edge detection signal rd1 of the read signal is selected. Is provided with a multiplexer (3).

In addition, an end gate 4 for providing an initialization signal is connected to the initialization terminal clr of the first latch by a logical product of the output of the first latch 1 and the rising edge detection signal rd0 of the read signal. The OR gate 5 that detects the presence / absence of the monostable signal is independently configured by a logical sum between the output of the first latch 1 and the monostable signal applied to another bit.

Here, when a 1-bit monostable signal detection and transmission circuit is composed of two first and second latches (1) (2), one multiplexer (3), and one end gate (4), By connecting in multiple stages in parallel, it is also possible to detect and output or transmit a signal generated at each bit on a multi-bit bus.

2 to 18 are operation waveform diagrams showing some results of simulation by an interrupt handler of a monostable signal detection and transmission circuit generated independently on a multi-bit bus according to an embodiment of the present invention. This simulation waveform diagram shows the rising edge detection signal rd0 of the read signal when the monostable signal dat0 (dat1) is generated at the logic high level 1 at the data input terminal D of the first latch on the 2-bit bus. And the falling edge detection signal rd1 and its operation result are shown by the output signal dout0 (dout1) and the interrupt signal intout of the multiplexer.

Claims (3)

When the monostable signal is input, an output is generated and driven by the rising edge detection signal of the pulse, and the rising edge detection signal of the monostable signal is driven to receive the output of the first latch. The second latch is initialized by the falling edge detection signal of < RTI ID = 0.0 > and < / RTI > one of the output of the first latch and the output of the second latch according to the falling edge detection signal of the monostable signal to generate a monostable signal. A monostable signal detection and transmission circuit generated independently on a multiple bit bus, comprising a multiplexer for detecting a position. 2. The monostable signal detection and transmission independently generated on a multiple bit bus according to claim 1, characterized by comprising an end gate for initializing the first latch with an output of the first latch and a rising edge detection signal of a pulse. Circuit. 3. The independent stage of claim 1 or 2, further comprising an or gate 5 for detecting the output of the first latch and detecting the presence / absence of a monostable signal. Stable signal detection and transmission circuit.