KR0158826B1 - A loading/eject control circuit of cdp without a tray - Google Patents

Abstract

The present invention relates to a loading / eject control circuit of a trayless CDP, comprising: a loading control unit for performing a disc loading function, an eject control unit for performing an eject function of the disc, and connected to and driven by the eject control unit and the loading control unit; It consists of a motor driving circuit part for controlling the motor, and detects the mounting and the size of the disk by the detection sensor and the detected detection signal is controlled by the logic circuit, so that the loading and ejecting operation of the disk can be precisely performed. In addition to improving the precision of the control circuit, the control circuit can be configured as a digital circuit, thereby improving the simplicity of the system.

Description

Trayless Loading / Eject Control Circuits

1 (a) and (b) show a state at completion according to the disc size of the compact disc player,

2 is a disc position sensor and a solenoid control circuit diagram of a conventional compact disc player.

3 is a block diagram for explaining the present invention,

(A-c) is a waveform diagram showing the waveform state according to the operation of the present invention,

5 is an output state diagram of the position sensor when the loading is completed by the disk type according to the present invention,

6 (a) and 6 (b) are state diagrams at the completion of ejection according to the disc type according to the present invention.

* Explanation of symbols for main parts of the drawings

1: Loading control unit 2: Eject control unit

3: drive motor 4: motor drive circuit part

5: phototransistor means 6: oal gate means

7: end gate means 8: rising edge detector

9: Chucking completion detection switch 10: First signal delay unit

11: second signal delay unit 12: flip-flop means

13: first false gate means 14: second false gate means

15: first end gate means 16: second end gate means

17: disc size discrimination circuit section 18: false gate means

19: end gate means 20: not gate means

CD: Disc

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a loading / eject control circuit of a CD-less CDP, in particular by detecting the mounting and size of a disc by a detection sensor and allowing the detected detection signal to be controlled by a logic circuit. And precisely perform the eject operation, thereby improving the precision of the system, as well as the control circuit can be configured as a digital circuit according to the loading / ejection control of the trayless CD to improve the simplicity of the system accordingly It is about a circuit.

In general, a microcomputer used in a portable or a vehicle does not have a tray for releasing a disk. Therefore, when a disk reaches a certain position by a user, a chucking device for clamping the disk is required. In addition, in order to drive the chucking device, a pulse signal must be supplied to the solenoid for a predetermined time by a control signal programmed according to a signal input from each sensor.

In case of driving the chucking device, the driving conditions are different according to the two types of disks, 12cm and 8cm, and if the chucking operation of the disk is wrong, the disk will be damaged. .

FIG. 1 (a) shows the arrangement of the disc and the arrangement of the sensor detecting the size of the disc when loading of the 12cm disc and (a) the 8cm disc is completed.

That is, when the discs 70 and CD are inserted by the user, the first to fifth light emitting diodes LED1 to LEDs installed at predetermined positions of the main body 71 are drawn by drawing the discs 70 and CD into the player by a roller (not shown). The positions of the disks 70 and CD are determined by a plurality of first to fifth position detection sensors 72a to 72e including the LED5 and the first to fifth photo transistors PT1 to PT5 (not shown). When the position is reached, a pulse is generated on the solenoid to drive the chucking device, thereby moving the disks 70 and CD vertically to complete the loading.

The conventional disk 70 and the CD position detection sensor and the solenoid control circuit have the first to fifth light emitting diodes LED1 to LED5 and the first to fifth phototransistors on the microcomputer 73 as shown in FIG. When the first to fifth position detection sensors 72a to 72e each of which are photocouplers constituted of PT1 to PT5 are connected, the first to fifth position detection sensors 72 to 72e are as shown in FIG. It is arrange | positioned at the predetermined position of the main body 71, and the solenoid 74 is connected to the output side of the microcomputer 73. As shown in FIG.

In addition, the microcomputer 73 receives a specific signal from a plurality of detection sensors 72a-72e, which applies a predetermined pulse signal to the light emitting diodes (LEDs) to turn on / off the port transistor (PT) from the presence of an object. It is to detect the presence.

Accordingly, the sensing signal or the predetermined pulse of the phototransistor PT is output, and the microcomputer 73 performs predetermined timing control programmed by the output pulse signal. That is, when an object (CD) is detected for a predetermined time (when the number of pulses is detected as the reference value or more), the microcomputer 73 loads the CD; Eject; It will control the chucking operation.

However, in the conventional apparatus as described above, the microcomputer 73 receives the first to fifth position detection sensors 72a to 72e under the condition that the disks 70 and CD flow between the light emitting diodes LED and the phototransistor PT. In this case, the position of the disk (CD) is determined, and when the specific condition is satisfied, the solenoid 74 is driven to perform loading and unloading operation. This is mainly driven by a light emitting diode driven by a pulse and thus the output of the phototransistor. Since the signal is used, the circuit configuration inside the microcomputer 73 adds a number of specific circuits for timing control, which causes a problem of causing a complicated circuit configuration.

Accordingly, the present invention has been made to solve the above-mentioned problems, the disk is mounted and detected by the detection sensor for driving the light-emitting diode to DC without pulse driving and the detected detection signal by the logic circuit By being controlled, the disk loading and ejecting operations can be performed precisely, thereby improving the precision of the system. As a result, the control circuit can be configured as a digital circuit, thereby eliminating the need for a tray to improve the simplicity of the system. Its purpose is to provide CD loading / eject control circuitry.

The present invention for achieving the above object, the loading control unit having a plurality of logic elements and flip-flop means for performing the loading function of the disk, and specific to the motor drive to perform the eject function of the disk An eject control unit for outputting a control signal, and a motor driving circuit unit for driving the drive motor by the control signal output from the eject control unit and the loading control unit.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

As shown in FIG. 3, the present invention provides a loading control unit 1 for performing a loading function of a disc (CD), an eject control unit (2) for performing an eject function of the disc (CD), and an eject control unit ( 2) and a motor driving circuit unit 4 connected to the loading control unit 1 and controlling the driving motor 3.

In addition, the loading control unit 1 includes phototransistor means PT1-PT5 and 5 for detecting a position of a disk CD installed and mounted on a part of a CDP (hereinafter referred to as CDP) deck body, and the phototransistor means 5 An OR gate means (ORGATE) 6 for outputting an OR logic signal in accordance with a detection signal detected from the N-axis, and an AND gate means (AND) for outputting an AND logic output signal in accordance with a logic output signal of the OR gate means 6. GATE, a rising edge detector 8 for detecting a rising edge signal of the false gate means 6, and a chucking detection switch 9 for detecting whether the disk CD is chucked. And a chucking detection switch for outputting a pulse having a predetermined width in synchronization with the rising edge signal of the detection output of the chucking completion detection switch 9 to the rising edge signal of the detection output of the chucking completion detection switch 9. Rising edge of detection output of (9) A first signal delay unit 10 serving as a signal delay Td for a predetermined time based on the signal, and a second pulse outputting a pulse having a predetermined width by receiving a pulse output signal of the first signal delay unit 10; And a flip-flop means 12 for inputting a logic output signal to the AND gate means 7 according to the signal delay portion 11 and the output signals of the second signal delay portion 11 and the rising edge detection portion 8. .

In addition, the eject control unit 2 includes first and second false gate means 13 and 14 for outputting an OR logic signal in accordance with the detection signal of the photocoupler means 5, and the first and second odd eggs. Discrimination of the size of the disc (CD) for discriminating the size of the disc (CD) and the first and second and gate means (15,16) for generating the AND logic output signal in accordance with the logic output signal of the gate means (13,14). An oar gate means 18 for outputting an oar logic signal according to the furnace section 17, the logic output signals of the first and second end gate means 15, 16, and an output signal of the oal gate means 18; And an AND gate means 19 for generating an AND logic signal in accordance with the UNLOAD signal.

Here, the motor driving circuit section 4 is connected to the load terminal LD of the end gate means 7 and the unloading terminal of the end gate means 19, and the disc size determination circuit part 17 is connected. Is connected to the first end gate means 15 and to the second end gate means 16 via a not gate means 20. In addition, the end gate portion 7 is connected to the rod (LD) only.

Next will be described the effect of the present invention made of the configuration as described above.

In the operation of the present invention, first, when a traffic loading function setting signal is inputted through an external keyboard (not shown), a load (LD) signal having a high signal level is input to the AND gate means 7, wherein the disc (CD) When is inserted, any one of the phototransistor means 5 detects this and inputs the detection signal, that is, the high level signal, to the OR gate means 6. Then, since the OR gate means 6 is an OR logic circuit, a high signal having a waveform as shown in FIG. 4A is input to the AND gate means 7. At the same time as the above process, the output signal of the algae 6 is detected by the rising edge detector 8 whenever the rising edge signal is generated. Then, the rising edge detector 8 inputs the high level signal having the waveform as shown in FIG. 4A to the S (SET) terminal of the flip-flop means 12.

Since the waveform of the second signal delay unit 11, which is input to the R (RESET) terminal, has a low signal level as shown in FIG. The high level signal of the waveform is input to the AND gate means 7. Therefore, the AND gate means 7 is operated because both the LD signal terminal, the output signal of the OR gate means 6, and the output signal of the flip-flop means 12 are high signal levels, so as to output the high level output signal to the motor drive circuit portion ( Enter 4).

The motor drive circuit section 4 then drives the drive motor 3 in accordance with this signal to perform the loading function.

On the other hand, when the disk CD is transported by the roller and the chucking is completed during the operation, the chucking completion detection switch 9 detects this and outputs a waveform signal such as the output of the chucking completion sensor of FIG. The first signal delay unit 10 receives a pulse signal having a predetermined width based on the rising edge signal of the output signal of the chucking completion detection switch 9 according to the second signal delay unit 11. ). At this time, the signal acts as a signal delay td for a predetermined time as shown in FIG. 2A based on the rising edge signal of the chucking completion detection switch.

Then, the second signal delay unit 11 delays the signal for a predetermined time with respect to the falling edge of the delay signal, and then inputs the pulse signal to the R (RESET) terminal of the flip-flop means 12.

Then, the flip-flop means 12 inputs the low signal to the AND gate means 7 in synchronization with the rising edge signal input from the second signal delay portion 11. In addition, in the AND gate means 7, the waveforms of the fourth drawing (A) LD (H) are fed to the motor drive circuit section 4 through the load LD terminal in accordance with the input signal of the flip-flop means 12. Input the low signal together.

Therefore, this motor drive circuit section 4 completes the loading operation of the drive motor 3 by the low signal.

Meanwhile, when the eject function is set during the operation, the eject function is executed. As shown in FIG. 5, the eject function is distinguished and operated according to the sizes of the 12 cm disk and the 8 cm disk.

That is, the eject function is completed at the position (low signal) where the photo coupler PT2 is turned on for the 12 cm disc by the disk size discrimination circuit 17, and the photo couplers PT1 and PT4 are turned on simultaneously for the 8 cm disc. The eject function is executed at the position (low signal) (see FIG. 6).

For example, when the eject function is set when a 12 cm disc is inserted, an unload signal is applied to the end gate means 19. When the detection signal of the photocouplers 5, PT2 and PT5 is input to the first OR gate 13 while the loading operation is completed, the high signal is generated by the OR logic operation as shown in f of FIG. Input to the first and gate means 15.

At the same time, a high signal is input from the disk size discrimination circuit section 17 to the first and gate means 15. At this time, the high signal is also input to the knock gate means 20 so that the signal is inverted and then the low signal is input to the second and gate means 16, so that the second and gate means 16 are not operated. As a result, 12cm disc discrimination does not work.

On the other hand, as in the above process, when the 12 cm disk is mounted, the first and gate means 15 inputs the high signal as in f of FIG. 2B to the OR gate means 18 and accordingly The OR gate means 18 outputs a high signal to the AND gate means 19.

Accordingly, the AND gate means 19 inputs a high signal to the motor drive circuit portion 4 by the unload signal and the output signal of the OR gate means 18, and accordingly, the matter drive circuit portion 4 Driven by the drive motor (3) to immediately perform the eject operation.

Therefore, the eject function is executed immediately after the photo coupler PT2 is turned on through the above process.

On the other hand, when an 8 cm disc is inserted, the unload signal is applied to the AND gate means 19. When the detection signal of the photocouplers PT1 and PT4 is input to the second OR gate 14 while the loading operation is completed, the high signal is generated by a waveform such as k in FIG. 4C by the OR logic operation. It is input to the two-and-gate means 16.

At the same time, the low signal from the disk size discrimination circuit section 17 is inverted via the knock gate 20 and then input to the second and gate means 16 as a high signal.

At this time, since the low signal of the disc size determining circuit unit 17 is also input to the first and gate means 15, the first and gate means 15 are not operated accordingly, so that a malfunction of 8 cm disc discrimination does not occur.

On the other hand, when the 8 cm disk is mounted as described above, the second and gate means 16 inputs the high signal as in the k of FIG. 4C to the OR gate means 18 and accordingly OR The gate means 18 outputs a high signal to the AND gate means 19.

Accordingly, the AND gate means 19 inputs a high signal to the motor drive circuit portion 4 by the unload signal and the output signal of the OR gate means 18, and accordingly the motor drive circuit portion 4 causes the drive motor ( 3) to execute the eject operation immediately.

Therefore, the eject function is executed as soon as the photocouplers PT1 and PT4 are turned on through the above-described process, so that the disc does not leave the set.

As described above, the present invention detects the mounting and the size of the disk by the detection sensor and controls the detected detection signal by the logic circuit so that the loading and ejecting operations of the disk can be performed precisely. In addition, since the control circuit can be configured as a digital circuit, it is possible to improve the simplicity of the system.

Claims (1)

Is connected to the loading control unit 1 for performing the loading function of the disk (CD), the eject control unit (2) for performing the eject function of the disk (CD), the eject control unit (2) and the loading control unit (1) In the trayless CDP loading / eject control circuit including a motor driving circuit section 4 for controlling the driving motor 3, The loading control unit 1 includes photocoupler means 5 and PT1-PT5 for detecting the position of the disk CD set and mounted on a part of the CD deck body, and detection detected by the phototransistor means 5. An oral gate means 6 for outputting an OR logic signal in accordance with the signal, an AND gate means 7 for outputting an AND logic output signal in accordance with the logic output signal of the OR gate means 6, and the oral gate means ( A rising edge detector 8 for detecting the rising edge signal of 6), a chucking detection switch 9 for detecting whether the chucking of the disk CD is completed, and a detection output of the chucking completion detection switch 9 A first signal delay unit 10 which outputs a predetermined width in synchronization with the rising edge signal, and a second signal delay unit which receives a pulse output signal of the first signal delay unit 10 and outputs a pulse having a predetermined width ( 11) and output signals of the second signal delay section 11 and the rising edge detection section 8; And a flip-flop means 12 for inputting a logic output signal to the AND gate means 7, wherein the eject control part 2 is configured to output an ologic signal according to the detection signal of the phototransistor means 5; First and second and gate means 15 and 16 for generating an AND logic output signal in accordance with the first and second false gate means 13 and 14 and the logic output signals of the first and second false gate means 13 and 14. ), A disc size judging circuit section 17 for judging the size of the disc (CD), and an oval gate means for outputting an oull logic signal in accordance with the logic output signals of the first and second end gate means (15, 16). And an AND gate means 19 for generating an AND logic signal in accordance with the output signal and the unload signal of the false gate means 18, the AND gate means 19 and the AND gate means 7; The motor drive circuit portion 4 is controlled from the output signal of Loading / ejecting control circuit of CDP-free X-rays.