KR0155642B1 - Block noise removing apparatus of mpeg decoder - Google Patents

Abstract

The present invention relates to an apparatus for removing block noise of an MPEG decoder, and in particular, a DCT DC coefficient when a video is restored in an MPEG decoder which restores a still picture and a motion picture compressed by DCT and quantization to an original picture in the MPEG 1 or MPEG 2 standard. The present invention relates to a block noise removing apparatus of an MPEG decoder for removing block noise generated at a boundary of a block due to a difference in values.

MPEG technology compresses data using techniques such as DCT, quantization, and motion estimation during MPEG video compression, and in the case of a decoder that restores the compressed image, inverse DCT, inverse quantization, and motion compensation are used. Restore the compressed data by applying the technique of.

However, the conventional MPEG decoder is DCT to remove spatial redundancy of data in MPEG video compression process, so the energy is concentrated toward the low frequency, so that the information of the high frequency part which is relatively low in energy is discarded for data compression in the quantization process. Therefore, when restoring the compressed data again, the high frequency component is lightened and the edge part is crushed, and the block boundary part appears clearly in 8 × 8 block unit due to the DC value difference of the block unit (8 × 8 pixel) to DCT. There is a problem that image quality is deteriorated by block noise.

Therefore, in order to solve the above problem, the present invention can improve the image quality by removing the block noise generated in the MPEG decoding process by searching the 8 × 8 block unit boundary of the image decoded by the MPEG decoder and low-pass filtering the corresponding portion. It is a block noise removing device.

Description

Block Noise Reduction Device of MPEG Decoder

1 is a circuit block diagram showing the configuration of a conventional MPEG 1 decoder.

2 is a circuit block diagram showing the configuration of a block noise removing device of the present invention MPEG decoder.

3 is a diagram showing a pixel configuration of one screen to be MPEG decoded.

(b) is a block diagram of one screen to be MPEG decoded.

(c) shows the pixel configuration of one block to be MPEG decoded.

(A)-(e) of FIG. 4 are the output waveform diagram of each part of this invention.

5 is a circuit block diagram showing a configuration of a pixel unit LPF applied to the present invention.

6 is a circuit block diagram showing the configuration of a line unit LPF applied to the present invention.

* Explanation of symbols for main parts of the drawings

20: horizontal boundary detection unit 30: horizontal boundary filter unit 30

40: vertical boundary detection unit 40 50: vertical boundary filter unit 50

21, 42: Counter 31: Pixel Unit LPF

42: LPF line unit

The present invention relates to an apparatus for removing block noise of an MPEG (moving picture expert group) decoder. In particular, the present invention relates to DCT (Discrete Cosine Transform) and quantization in MPEG 1 or MPEG 2 standards. The MPEG decoder block noise removing device is used to remove block noise generated at the boundary of the block due to the difference of DCT value of DCT when restoring the original still image and the moving image to the original image. It is about.

1 is a circuit block diagram showing the configuration of a conventional MPEG decoder, the configuration of which is as follows.

First, a bitstream separation unit 1 for separating audio information and video information from a bitstream in which compressed audio information and video information stored in a video tape or a compact disk (CD) and the bitstream separation unit ( A buffer unit 2 temporarily storing the video bitstream separated in 1), and a demux for variable length decoding of pure data information by removing an overhead portion from the video bitstream stored in the buffer unit 2; Inverse quantization of inverse quantization of constant data obtained by the variable length decoding process of the variable length decoding unit 3 and the demux / variable length decoding unit 3 to obtain the DCT coefficient value DCT-converted in the MPEG image compression process. The inverse DCT section 5 which obtains the pixel value of the original screen from the DCT coefficient value obtained by the inverse quantization section 4, and the demux / variable length decoding section 3 Length decoded macrotable An adaptive predictor 6 which receives the motion vector of the block and copies the macroblock from a specific position of an intra picture indicated by the value of the motion vector, and produces the next screen; and the adaptive predictor 6 The adder 7 outputting the decoded video signal to the frame memory 8 by combining the output of the inverse DCT unit 5 and the output of the inverse DCT unit 5, and temporarily storing the decoded video output from the adder 7. Frame frame 8 which is output to the adaptive predictor 6 and output to the outside.

The operation of the conventional MPEG decoder configured as described above will be described with reference to FIG.

First, the bitstream separator 1 separates the MPEG compressed video stored in the CD or the video CD, that is, the audio information and the video information, which are packetized by reading the bitstream, and then separates the separated video information into the buffer unit ( 2), and the buffer unit 2 temporarily stores the input image information and outputs the image information to the demux / variable length decoding unit 3.

The demux / variable length decoding unit 3 removes overhead information (various heads, start codes, etc.) from the bitstream of the image information output from the buffer unit 2 and obtains pure data information. Huffman uses this statistical data that is dependent on the frequency of occurrence in the MPEG video compression process to encode small bits for high frequency values and high bits for low frequency values. Variable length coding is applied to the coding concept.

Accordingly, the demux / variable-length decoding unit 3 variably decodes pure data information and quantizes coefficient values quantized in the MPEG video compression process and values 1 to 31 depending on how full the buffer is during quantization. The quantization parameter (QP) value and the motion vector value per macro block are obtained, and the obtained quantized coefficient value and the quantization parameter (QP) are outputted to the inverse quantization unit (4). Also, the motion vector value is output to the adaptive predictor.

In this case, the inverse quantization unit 4 is a quantized output from the demux / variable length decoding unit 3 to obtain more '0' coefficient values of the macroblock obtained through DCT during MPEG video compression. Inverse quantization is performed by dividing the coefficient value and the quantization parameter (QP) by a constant value to obtain a DCT coefficient value of the MPEG image compression process, and outputs the obtained DCT coefficient value to the inverse DCT unit 5.

The inverse DCT unit 5 inversely DCTs the DCT coefficient values [F (u, v); 8 × 8 blocks of DCT coefficients (total 64)] output from the inverse quantization unit 4 to perform an inverse DCT. The pixel value [f (x, y); pixel value of the original screen] is recovered and output to the adder 7. When DCT is performed on a certain image in the MPEG image compression process, DCT is performed according to Equation (1) below. In the case of reverse DCT in reverse DCT section 5, reverse DCT is performed according to the following expression (2).

In this case, the adaptive predictor 6 displays the screen of the specific position of the first decoded intra picture indicated by the motion vector value per macroblock output from the demux / variable-length decoder 3 and the frame memory 8. Read from the next screen to produce the next screen and output to the adder (7), the adder (7) is made by the pixel value of the original screen output from the inverse DCT section 5 and the adaptive predictor (6) The sum of the pictures is output to the frame memory 8, which is a picture that has been completely reconstructed into a decoded picture, that is, a picture before MPEG compression.

Then, the frame memory 8 temporarily stores the input decoded image and outputs it externally.

In addition, since MPEG compressed video has a bi-directional predictive screen called B-picture (Bi-Directional Predicted Pictrure), it does not have a forward motion vector like P-picture (Predicted Picture) but a backward motion vector. After creation, the appropriate copy from this screen is not only used to create the next screen, but also to create the previous screen.

Accordingly, the adaptive predictor 6 determines macroblock type information for distinguishing whether the corresponding macroblock of the motion vector value output from the inverse quantizer 4 is a macroblock of a P picture or a macroblock of a B picture. First, the macroblock of the prediction screen is generated by distinguishing whether to copy from the front or the back according to the analysis result.

As described above, MPEG technology compresses data using techniques such as DCT, quantization, and motion estimation during MPEG video compression, and decompresses the inverse DCT, inverse in the MPEG video compression process. Compressed data is recovered by applying techniques such as quantization and motion compensation.

However, the conventional MPEG decoder is DCT to remove the spatial redundancy of the data in the MPEG image compression process, so the energy is concentrated toward the low frequency, so that the information of the high-frequency portion, which is relatively low in energy, is decompressed in the quantization process. When the compressed data is restored again, the high frequency component is lightened and the edge part is crushed, and the block boundary part is 8 × 8 block unit due to the DC value difference of the DCT block unit (8 × 8 pixel). There is a problem that the image quality is degraded by the block noise appearing clearly.

Therefore, in order to solve the problem, the present invention finds an 8 × 8 block unit boundary of an image decoded by an MPEG recorder and low-passes the corresponding portion to remove block noise generated in the MPEG decoding process, thereby improving image quality. It is an object of the present invention to provide a block noise removing device.

Referring to Figure 2 the configuration of the present invention for achieving the above object is as follows.

First, a horizontal boundary detection unit 20 which detects a horizontal block boundary portion of an image decoded by an MPEG decoder and outputs the detected signal to the horizontal boundary filter unit 30, and outputs the horizontal boundary detection unit 20 by the horizontal boundary detection unit 20 The horizontal boundary filter unit 20 removes block noise generated at the horizontal boundary of the image encoded and input by the MPEG encoder according to the predetermined signal, and the vertical block boundary portion of the image decoded by the MPEG decoder is input. A horizontal boundary detector 40 for detecting and outputting the detected signal to the vertical boundary filter unit 50 and a horizontal boundary portion of the horizontal boundary filter unit 30 according to a predetermined signal output from the vertical boundary detector 40. It consists of a vertical boundary filter unit 50 for removing the block noise of the vertical boundary portion of the image from which the block noise of.

The horizontal boundary detector 20 counts a system clock of an image signal decoded by an MPEG decoder and outputs a high signal every eighth clock, and the first counter 21. A logical delay operation of the one pixel delay unit 22 for delaying the output signal of the pixel by one pixel, the output signal of the first counter 21 and the output signal of the one pixel delay unit 22, and the result of the horizontal boundary filter unit 30 is composed of an oragate 23 output to the first switch 33, the horizontal boundary filter unit 30 filters the input MPEG decoded video signal in units of pixels, the first switch 33 A low pass filter (LPF) 31 for outputting a signal and an MPEG decoded video signal are delayed by a delay in the filtering process of the pixel unit LPF 31 and outputted to the first switch 33. A signal output from the first delay unit 32, the pixel unit LPF 31 and the first delay unit 32 Is composed of a first switch 33 for selectively outputting the signal according to the signal output from the oragate 23 of the horizontal boundary detector 20, the vertical boundary detector 40 is decoded by the MPEG decoder A divider 41 for dividing the system clock of the signal by n (n = 325) and converting it into a line clock, and a line clock outputted from the divider 41 to output a high signal every eighth clock. Computes the operation of the second counter 42, the one-line delayer 43 for delaying the output of the second counter 42 by one line, and the outputs of the second counter 42 and the one-line delayer 43. And the result is the ora gate 44 which outputs the result to the second switch 53 of the vertical boundary filter unit 50, wherein the vertical boundary filter unit 50 is formed of the horizontal boundary filter unit 30. A line unit LPF 51 for filtering the image signal output from the first switch 33 in line units, and an output of the first switch 33 A second delay unit 52 for delaying the video signal by a delay in the process of filtering the line unit LPF 51 and outputting it to the second converter 53; and the line unit LPF 51 and the second delay unit ( And a second switch 53 for selectively outputting the signal output from the 52 according to the vertical boundary detection signal output from the oragate 44 of the vertical boundary detection unit 40.

The operation of the present invention configured as described above will be described with reference to FIGS. 2 through 6.

First, as shown in (a) of FIG. 3, a screen composed of 352 pixels wide and 240 pixels high has 8 × 8 pixels (see (c) in FIG. 3) as the basic unit of the inverse DCT in the MPEG decoder. As shown in b), when a video signal decoded by inverse DCT of 44 blocks and 30 blocks per screen is input to the block noise removing device of the present invention, the first counter 21 of the horizontal boundary detection unit 20 is input. The system clock (see (a) of FIG. 4) for the video signal is counted to output a high signal as shown in (c) of FIG. 4 for every eighth clock, and the one-pixel delay unit 22 receives the first counter 21. ) Is delayed by one pixel as shown in (d) of FIG. 4 and output to the one input terminal of the oragate 23. (The first counter 21 is reset by the input horizontal sync signal H-sync)

Then, the OR gate 23 performs an OR operation on the signal output from the first counter 21 and the signal output by being delayed by one pixel from the one pixel delay unit 22 to perform an 8n and 8n + 1 operation on the system clock. The horizontal boundary detection signal is output to the first switch 33 of the horizontal boundary filter unit 30 as shown in FIG.

In this case, the pixel unit LPF 31 of the horizontal boundary filter unit 30 filters the image signal decoded by the MPEG decoder on a pixel basis and outputs the pixel signal to the first switch 33, and the first delay unit ( 32) delays the input decoded video signal for a predetermined time and outputs it to the first switch 33, wherein the delay time of the first delay device 32 is decoded by an MPEG decoder and the input video signal is the pixel. It is equal to the time delayed while filtering in the unit LPF 31.

In addition, the first switch 33 performs a pixel unit LPF 31 when the horizontal boundary detection signal as shown in (c) of FIG. 4 of the horizontal boundary detection unit 20 is high. Select the video signal filtered in units of pixels and output it to the vertical boundary filter unit 50, and when the input horizontal boundary detection signal is low, the video signal output from the first delay unit 32 is selected to be vertical. Output to the boundary filter part 50 is carried out.

As described above, the video signal output from the first converter 33 is output by removing block noise generated in the horizontal boundary portion of the video signal reversely DCTed in block units by the MPEG decoder.

On the other hand, when the block noise of the horizontal boundary portion is removed from the first switch 33 as described above, the divider 41 of the vertical boundary detection unit 40 divides the input system clock by n (in this case, the horizontal constituting the screen). N is 352 because the number of pixels is 352), and a clock is generated once every n divisions to output the line clock signal generated to the second counter 42, and the second counter 42 outputs the input line clock signal. The counter outputs a high signal every eighth clock, and the one-line delay unit 43 delays the high signal output from the second counter 42 by one line and outputs it to one input terminal of the oragate 44. (The frequency divider 41 and the second counter 42 are reset by the vertical synchronization signal V-sync)

Then, the OR gate 44 performs an OR operation on the signals output from the second counter 42 and the one-line retarder 43, and thus, the vertical boundary detection signal is generated by the vertical boundary filter unit 50. It outputs to the two-changer 53.

When the vertical boundary detection signal is input to the second switch 53 as described above, the line unit LPF 51 of the vertical boundary filter unit 50 is connected to the first switching unit of the horizontal boundary filter unit 30. 33) and outputs the image signal output from the first switch 33 to the second converter 53 by filtering the video signal output from the line unit by the line unit, and the second delay unit (52). The filter is delayed by a predetermined time delayed by the filtering process of the LPF 51 and outputted to the second switch 53.

Therefore, when the signal output from the oA gate 44 is high, the second switch 53 filters the image signal from which the block noise of the vertical boundary part is removed by filtering the line unit LPF 51 line by line. When the signal output from the oragate 44 is low, the output signal is selected and output by selecting and outputting the video signal delayed by the one-line delayer 43 for a predetermined time, thereby completely preventing block noise generated during the decoding process of the MPEG decoder. To be removed.

5 and 6 are circuit block diagrams showing the configuration of the pixel unit LPF 31 and the line unit LPF 51. The configuration and operation thereof will be described as follows.

First, referring to FIG. 5, the configuration of the pixel unit LPF 31 will be described. A pixel delay unit 31A for delaying a video signal decoded by an MPEG decoder by 1 pixel and the pixel delay unit 31A 1 pixel delayer 31B for delaying the video signal outputted from the second pixel by 1 pixel again, multiplying the decoded input video signal by 1/4 and outputting to the adder 31F, and A second multiplier 31D for multiplying the video signal delayed by one pixel by the one pixel delayer 31A and outputting the result to the adder 31F, and one video signal output from the one pixel delayer 31B. Multiplying / 4 and outputting the third multiplier 31E to the adder 31F and the signals output from the multipliers 31C, 31D, and 31E to add the first multiplier 33 of the horizontal boundary filter unit 30; It is comprised by the adder 31F which outputs to ().

In the pixel unit LPF 31 configured as described above, when the video signal decoded by the MPEG decoder is input to the one-pixel delay unit 31A, the one-pixel delay unit 31A delays the input image signal by one pixel and another one pixel. The one-pixel delay unit 31B outputs the video signal delayed by one pixel from the one-pixel delay unit 31A by one pixel and outputs it to the third multiplier 31E.

The first multiplier 31C multiplies the decoded and input video signal by 1/4 and outputs the result to the adder 31F, and the second multiplier 31D outputs one from the one-pixel delay unit 31A. The pixel-delayed video signal is multiplied by 1/2 and the result is output to the adder 31F. The third multiplier 31E multiplies 1/4 by the second-delayed video signal from the one-pixel delayer 31B. The result is output to the adder 31F.

Then, the adder 31F sums the image signals output from the multipliers 31C, 31D, and 31E and outputs them to the first switch 33 of the horizontal boundary filter unit 30, thereby completing filtering on a pixel basis. will be.

Secondly, referring to FIG. 6, the configuration of the line unit LPF 51 will be described. In the horizontal boundary filter unit 30, the block noise of the horizontal boundary portion is removed to delay the input image signal by one line. And a one-line delayer 51B for delaying the video signal delayed by one line by the one-line delayer 51A again by one line. Reference numerals 51C, 51D, and 51E, which are not described, It is a multiplier and 51F is an adder.

In the line unit LPF 51 configured as described above, one line delay unit 51A delays the input image signal by one line delay block 51A by removing the block noise of the horizontal boundary portion from the horizontal boundary filter unit 30. 51B), and the one-line delayer 51B delays the video signal delayed by one line by the one-line delayer 51A by one line and outputs it to the sixth multiplier 51E.

In addition, the fourth multiplier 51C multiplies the video signal to which the block noise is removed and inputs it by 1/4, and outputs the result to the adder 51F. The fifth multiplier 51D outputs the first line delay 51A. ) Multiplies the video signal delayed by one line by 1/2 and outputs the result to the adder 51F, and the sixth multiplier 51E is 1/4 of the video signal delayed second by the first line delayer 51B. Multiply by and output the result to the adder 51F.

Then, the adder 51F adds the image signals output from the multipliers 51C, 51D, and 51E, and outputs the summed image signals to the second switch 53 of the vertical boundary filter unit 50, thereby completing filtering on a line basis. will be.

As described above, the present invention can improve the image quality by removing the block noise generated in the MPEG decoding process by low-pass filtering the corresponding portion by finding a block unit boundary composed of 8 × 8 pixels of the image decoded by the MPEG decoder. Block noise reduction device.

Claims (4)

A horizontal boundary filter unit 20 which detects a horizontal block boundary portion of an image decoded by an MPEG decoder and outputs the detected signal to the horizontal boundary filter unit 30, and outputs the horizontal boundary filter unit 20 from the horizontal boundary filter unit 20. The horizontal boundary filter unit 30 which removes block noise generated at the horizontal boundary of the image input and decoded by the MPEG decoder according to the predetermined signal is detected, and the vertical block weight portion of the image decoded and input by the MPEG decoder is detected. The horizontal boundary filter unit 30 outputs the detection signal to the vertical boundary filter unit 50, and blocks the horizontal boundary portion of the horizontal boundary filter unit 30 in accordance with a predetermined signal output from the vertical boundary detector 40. A block noise removing device of an MPEG decoder, characterized by comprising a vertical boundary filter unit 50 for removing block noise in a vertical boundary portion of an image from which noise is removed. The horizontal boundary detecting unit 20 counts a system clock of a video signal that is recorded by an MPEG recorder and outputs a high signal every k (k = 8) th clocks. And a 1 pixel delay 22 for delaying the output signal of the first counter 21 by 1 pixel, and an output signal of the first counter 21 and the output of the 1 pixel delay 22. Comprising an OR signal 23 and outputs the result to the first switch 33 of the horizontal boundary filter unit 30, the horizontal boundary filter unit 30 is an MPEG decoded image input The pixel unit LPF 31 filtering the signal in units of pixels and outputting the signal to the first converter 33 and the MPEG decoded image signal as much as delayed in the filtering process of the pixel unit LPF 31. A first delay unit 32 output to the switch 33, and the pixel unit LPF 31 and the first delay unit 32; Block noise removing device of the MPEC decoder characterized in that it comprises a first switch 33 for selectively outputting the output signal according to the signal output from the oragate 23 of the horizontal boundary detection unit 20 . The divider 41 of claim 1, wherein the vertical boundary detector 40 divides a system clock of an image signal decoded by an MPEG decoder into n (n = 325) and converts the system clock into a line clock. A second counter 42 for outputting a high signal for every k (k = 8) -th clocks by applying the line clock outputted from (41); and one line for delaying the output of the second counter 42 by one line. OR of the delay unit 43 and the outputs of the second counter 42 and the one-line delay unit 43 and output the result to the second switch 53 of the vertical boundary filter unit 50. A line 44, and the vertical boundary filter unit 50 filters the image signal output from the first switch 33 of the horizontal boundary filter unit 30 line by line LPF 51. And delay the video signal output from the first switch 33 to the second switch 53 by delaying the video signal output by the line unit LPF 51 in the filtering process. Vertical boundary detection output from the oragate 44 of the vertical boundary detection unit 40 to output the second delay unit 52 and the signal output from the line unit LPF 51 and the second delay unit 52 2. A block noise canceling apparatus for an amplifier (MPEC) decoder, characterized in that it comprises a second switch (53) for selective output in accordance with a signal. 4. A block according to claim 2 or 3, wherein the counting coefficient k of the first counter 21 or the second counter 42 is applicable to all natural numbers according to a given signal. Noise canceller.