KR0153615B1 - Sense amplifier circuit with better equalizing action - Google Patents

Abstract

1. The technical field to which the invention described in the claims belongs:

A sense amplifier circuit of a semiconductor memory device.

2. The technical problem to be solved by the invention;

It is to provide a sense amplifier circuit that can reduce the coupling noise to eliminate the malfunction.

3. Summary of Solution to Invention;

First and second bipolars, which are connected between the first and second sensing lines and the output terminals respectively receiving the converted current from the voltage-current converter, and receive a control signal for controlling the equalization operation through the base. At least one resistor connected between the transistor and the output terminal and the power supply voltage is provided.

4. Important uses of the invention;

It is suitably used for sense amplifiers.

Description

Sense Amplifier Circuit with Equalization Operation

1A and 1B are schematic sense amplifier circuits designed according to the prior art and waveform diagrams of their output.

2a, 2b are schematic sense amplifier circuits designed in accordance with the present invention and waveform diagrams thereof.

The present invention relates to a semiconductor memory device, and more particularly to a sense amplifier circuit.

Recently, as the memory density is increased and the size is increased, the length and load of the sensing line increase while the current of the sensing line is reduced or maintained, making it difficult to raise the swing of the sensing line in a short time. A sense amplifier used to solve this phenomenon is shown in FIG. 1A. That is, the bipolar transistors T1 and T2 are used to electrically separate the sense lines L1 and L2 and the output terminal Vout to obtain a large output voltage while maintaining a small swing of the sense lines L1 and L2 with a large load. The sense amplifier is a differential amplifier consisting of resistors R1, R2 and bipolar transistors T1, T2 and current source Io. In addition, a common mode voltage Vcm is applied to the bases of the bipolar transistors T1 and T2. The common mode voltage Vcm always maintains a high level. A drain-source channel is connected in series between the sensing lines L1 and L2 connected to the emitter terminals of the bipolar transistors T1 and T2, respectively, and the gate thereof is connected to the clock signal φ EQ. A voltage current converter 10 is shown which is connected between the sensing lines L1, L2 and the input terminal Vin to convert an input voltage into a current.

In operation, the swing voltage Vaa between the sensing lines L1 and L2 is proportional to the log value of the current difference I1-I2, while the output voltage Vbb of the output terminal Vout is multiplied by the resistance R by the current difference I1-I2. It is determined by the value. Since the operation of the sense amplifier is well known, detailed operations will be omitted.

If the output voltage is large, the detection time is lost to reverse it when the next signal is reversed, and wrong data may be detected. For this purpose, an equivalent circuit is employed to connect the PMOS transistor T3 at both ends of the sense lines L1 and L2 to apply the clock signal φEQ at a low level to match the sense lines at both ends.

In this case, however, it is difficult to completely match the sense line of structurally heavy load in a short time, and as a result, there is a time delay until the output is matched. This will be explained with the output waveform diagram in the sensing operation shown in FIG. 1B. In the figure, section M1 represents a sensing section, and a front section and a rear section represent an equalization period. There is a burden to turn off the voltage to current converter (10) part during the equalization operation, and the coupling noise generated when the equivalent transistor of PMOS transistor T3 is turned on or off may be amplified by the output and cause a malfunction. have.

Accordingly, an object of the present invention is to provide a sense amplifier circuit capable of preventing malfunction by eliminating coupling noise that may occur when an equivalent transistor is turned on or off.

According to the technical idea of the present invention for achieving the above object, between the first and second sensing lines, which are the two input terminals receiving the converted current from the voltage-current converter and the output terminal, respectively, the equalization operation is performed through the base. And at least one resistor connected between the output terminal and the power supply voltage, the first and second bipolar transistors receiving a control signal for control as a base.

DETAILED DESCRIPTION A detailed description of preferred embodiments of the present invention will now be described with reference to the accompanying drawings.

It should be noted that like elements and parts in the figures represent the same numerals wherever possible.

FIG. 2A is a circuit diagram for controlling equalization of a sense line according to the present invention, and FIG. 2B is an output waveform diagram during a sensing operation according to the present invention.

Referring to FIGS. 2A and 2B, a control clock which is a control signal for eliminating the PMOS transistor T3 used to equalize the sensing lines L1 and L2 and performing a sensing operation and an equalization operation through the bipolar transistors T1 and T2. By applying the signal φEQC, detection and equalization can be performed alternately. That is, when the high level is applied to the bipolar transistors T1 and T2, the sensing operation is performed as in the conventional sense amplifier, and when the low level is applied, the power supply voltage is opened between the sensing lines L1 and L2 and the output terminal Vout. Equalization operation is performed by VCC and resistors R1 and R2. That is, the control clock signal? EQC is a signal that can transition from a high level to a low level or from a low level to a high level. This structure equalizes the output directly through the resistors R1 and R2, thereby realizing high-speed and reliable equalization, and further reducing equalization noise since it does not equalize the input lines sense lines L1 and L2.

As described above, the present invention has an effect of reducing coupling noise. In addition, the present invention has the effect of eliminating the malfunction that may occur during the equalization operation of the sensing line.

Although the present invention described above is limited to, for example, the drawings, the same will be apparent to those skilled in the art that various changes and modifications can be made without departing from the technical spirit of the present invention.

Claims (2)

A sense amplifier circuit having at least two first and second sensing lines, the input terminals receiving current converted from a voltage current converter, comprising: a connection between the first and second sensing lines and an output terminal, respectively, and controlling an equalization operation. And a resistor connected between the first and second bipolar transistors receiving a control signal as a base and between the output terminal and the power supply voltage. The sense amplifier circuit of claim 1, wherein the equalization operation is performed when the control signal is at a low level, and the sensing operation is performed when the control signal is at a high level.