KR0152029B1 - Synchronously added averaging apparatus and method by interpolation - Google Patents

Abstract

The present invention corrects the errors generated in the system itself by synchronous addition by applying an averaged interpolation technique to improve the S / N ratio in digital signal processing, thereby minimizing errors in subsequent signal processing. The present invention relates to a synchronous addition averaging apparatus using the method. The present invention connects an interpolator including a distance error calculator, an interpolation filter coefficient storage unit, and an interpolation filter to the front end of the synchronous addition averaging unit for averaging the digital signals by a predetermined number of times so that the sampling points coincide with each other. Thus, the distance error is calculated from the input digital signal, the interpolation filter coefficient corresponding to the distance error is calculated by using the interpolation formula, and the value is multiplied and multiplied by the interpolation filter coefficient calculated by delaying the input digital signal by a predetermined time interval. Add all of them together to obtain an interpolated digital signal. At this time, the interpolated digital signal is fed back to find the distance error at the point where the error obtained is minimized, and the signal is interpolated to correct the error accurately.

Description

Synchronous Add Averaging Device Using Interpolation Technique and Its Method

(A)-(c) of FIG. 1 is an input / output signal waveform diagram of a conventional analog / digital converter.

2 is an overall block diagram of a synchronous addition averaging apparatus using the interpolation method of the present invention.

3 is a block diagram showing the detailed configuration of the interpolator in FIG.

4 is a graph showing an example of a digital signal input to an interpolation filter on a time axis.

5 is a graph showing an error function curve for an error such as jitter.

FIG. 6 is a graph showing an example of an error function when a distance error is calculated at a T / 16 interval with respect to the input signal of FIG.

7 is a graph showing an output signal when the input signal of FIG. 4 is interpolated through the interpolator of the present invention.

* Explanation of symbols for main parts of the drawings

10: interpolator 11: distance error calculation unit

12: interpolation filter coefficient storage unit 13: interpolation filter

20: synchronous addition averaging unit

The present invention relates to synchronous addition averaging for improving signal-to-noise (S / N) ratio in digital signal processing. In particular, the synchronous addition is performed by applying an interpolation technique to minimize phase error between digital input signals, thereby reducing errors in subsequent signal processing. The present invention relates to a synchronous addition averaging apparatus using an interpolation technique and a method for minimizing the error.

In general, in a digital signal processing system, an analog input signal is first converted into a digital signal in accordance with a predetermined sampling clock signal, and the digital signal is processed by applying an algorithm by a signal processing technique. In this case, when the analog input signal contains a large amount of noise, the following digital signal processing is performed after averaging the digital signals sampling the same input signal for a predetermined number of times in order to improve the signal-to-noise ratio. When the digital signal sampled and input for a certain period of time is called Xi (n), the digital signal Y (n), which is averaged and outputted, is represented by the following equation (1).

Here, the signal-to-noise ratio is improved as the averaging frequency M is increased. As described above, the method of averaging the sampling time points of the respective input signals Xi (n) so as to coincide with each other when averaging each input signal is called a synchronous addition method. However, even though the analog / digital conversion is performed according to the sampling clock signal synchronized with the system, an error occurs due to the imperfection in the system. For example, due to a delay characteristic of an analog device or jitter of an analog / digital changer, an error occurs because the input signals are not analog / digital converted at an accurate time.

1 is an input / output signal waveform diagram of a conventional analog / digital converter, and illustrates an example in which an error occurs due to jitter of the analog / digital converter. Fig. 1 (a) shows the analog input signal X (t), and Fig. 1 (b) (c) shows the analog input signal X (t) when the averaging frequency M is 2; It is a digital output signal [X0 (n), X1 (n)] converted to a sampling clock signal synchronized with the system. As shown in (c) of FIG. 1, jitter of the analog-to-digital converter when i = 1. The error E1 occurred by.

When the digital signal sampled as described above is synchronously added and averaged for a predetermined time, each input signal Xi (n) is expressed as in the following equation (2).

Here, in general, the error Ei due to jitter is within the sampling period T. When the averaging frequency M is 2, the output signal Y (n) obtained by averaging the input signal Xi (n) is expressed as in the following equation (3).

As such, when the same input signal [X (t)] is input for the same period, distorted information is output in the averaged output signal [Y (n)] unless the analog / digital converter corrects the error caused by the jitter of the clock. Included.

However, according to the conventional method of averaging by synchronous addition so that only the sampling point n coincides, there is a problem in that phase errors generated in the system itself cannot be eliminated. In particular, when the same input signal is input for the same period, if the phase error between the digital input signals is not corrected, the averaged output signal includes distorted information, thereby making an error of inputting wrong information into the subsequent signal processing apparatus.

SUMMARY OF THE INVENTION The present invention has been made to solve the conventional problems as described above, and an object of the present invention is to perform signal processing in subsequent stages by synchronizing and averaging digital signals using an interpolation technique that can correct errors occurring in the system itself. The present invention provides a synchronous addition averaging apparatus using an interpolation technique and a method for minimizing time error.

A feature of the present invention for achieving the above object is a digital signal processing system for processing a digital signal sampled according to a predetermined clock signal, the distance error from the input digital signal is calculated to minimize the distance error An interpolator for interpolating the input digital signal by generating an interpolation filter coefficient corresponding to this point, and averaging the digital signals output from the interpolator by a predetermined number of times so that sampling points coincide with each other. A synchronous addition averaging apparatus using an interpolation technique is characterized by comprising a synchronous addition averaging unit to be applied.

In addition, another aspect of the present invention for achieving the above object is a method for processing a digital signal sampled according to a predetermined clock signal, the step of calculating a distance error from the input digital signal, and corresponding to the distance error Calculating the interpolation filter coefficients using the interpolation equation, delaying the input digital signal at a predetermined time interval, obtaining an interpolated digital signal using the calculated interpolation filter coefficients, and a distance error at a predetermined interval. Calculating an error function from the interpolated digital signal while varying and repeating the above process until a distance error at the time when the error function becomes the minimum value is repeated; and a predetermined number of times so that the sampling time of the interpolated digital signal coincides with each other. Synchronized sum average using interpolation method characterized in that it comprises the step of averaging On the way.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to FIGS. 2 through 7.

2 is an overall block diagram of a synchronous addition averaging apparatus using the interpolation technique of the present invention. As shown, the digital signal X (n) applied from the analog / digital converter of the front end is input to the apparatus of the present invention, and the interpolator 10 receiving the signal receives the digital signal X (n). ] To calculate the interpolation filter coefficient by calculating the distance error and filter the input digital signal [X (n)] using the coefficient. A synchronous addition averaging unit 20 is connected to the output terminal of the interpolator 10 to average the predetermined number of times so that the sampling time coincides with the digital signal Y (n) output from the interpolator 10, The signal output from the addition averaging unit 20 is applied to a signal processor at a later stage.

3 is a block diagram showing the detailed configuration of the interpolator 10 in FIG. As shown, the digital signal X (n) input to the interpolator of the present invention is applied to the distance error calculator 11 and the interpolation filter 13, respectively. The distance error calculator 11 calculates and outputs a distance (or phase) error due to jitter from the input digital signal X (n) at the beginning of signal input, and then feeds back from the interpolation filter 13 thereafter. The error is obtained from the signal [Y (n)]. Thus, the distance error at the time when the error is minimum is output. The interpolation filter coefficient storage unit 12 is connected to the output terminal of the distance error calculation unit 11, and the interpolation filter coefficient storage unit 12 stores the interpolation filter coefficient corresponding to each distance error obtained using the interpolation equation. . The interpolation filter coefficient read out from the interpolation filter coefficient storage unit 12 is applied to the interpolation filter 13, and the interpolation filter 13 delays the input digital signal X (n) at a predetermined time interval and interpolation filter coefficient. Multiply by and add the multiplied values to output the interpolated filtered digital signal.

The operation of the interpolator configured as described above will be described with reference to the graphs of FIGS. 4 to 7.

First, as illustrated in (b) and (c) of FIG. 1 to explain the interpolation filter, a digital signal [X (n)] repeatedly sampled with the same input signal for the same period, for example, X1 = f (T1), X2 = f (T2),... It is assumed that a signal with Xn = f (Tn) is input to the interpolation filter 13. The only quadratic curve can be found from any three points, as there is a unique line for any two points. The N-th order complementary term for the digital signal [X (n)] is given by the following equation (4).

According to the interpolation equation, when the distance error T is known, the interpolation filter coefficient can be calculated. When the calculated interpolation filter coefficient is added to the interpolation filter 13, the interpolation filter 13 delays the input signal at a predetermined time interval (X1, The interpolated digital signal P (T) can be obtained by multiplying X2, ..., Xn) by the interpolation filter coefficients in order. The interpolated digital signal P (T) means a digital signal sampled at an accurate sampling position without error. Therefore, in the present invention, first, the distance error due to jitter or the like is obtained, and then the interpolation filter coefficient corresponding to the jitter is obtained by the interpolation equation.

4 is a graph showing an example of the digital signal X (n) sampled on the time axis and input to the interpolation filter 13. According to the graph, the input signal X (n) is not accurately sampled and is symmetrical. This doesn't work. The error function f (E) due to the error E due to jitter or the like has a symmetrical curve within the sampling period (-T, + T) as shown in the graph shown in FIG. E)] is defined using the input signal symmetry characteristics as shown in the following equation (5).

Therefore, the distance error calculator 11 calculates the distance error e by using the error function f (E) when the sampled digital signal X (n) is input, and then interpolates the filter coefficient storage unit 12. ) If the input signal X (n) satisfies the perfect symmetry condition, the error function f (E) is zero. The interpolation filter coefficient storage unit 12 is a memory device that calculates the interpolation filter coefficient corresponding to the distance error e using the interpolation equation [P (T)] and stores all the calculated values. Therefore, when the distance error e is input from the distance error calculator 11, the interpolation filter coefficient storage unit 12 reads the interpolation filter coefficient corresponding to the input distance error e and outputs the interpolation filter 13 to the interpolation filter 13. The interpolation filter 13 outputs the interpolated signal [Y (n) = P (T = e)] by multiplying the input signal by the multiplication and adding the interpolation filter coefficient.

However, the signal Y (n) obtained by the interpolation technique as described above is not accurate and may cause a lot of errors. Therefore, the interpolated output signal Y (n) is fed back to the distance error calculation unit 11 to obtain the error signal g (e), and then the distance error (g (e)] becomes a minimum value. e) move and find. In this case, the error signal g (e) with respect to the interpolated output signal Y (n) may be defined as shown in Equation 6 using the above-described error function f (E).

FIG. 6 illustrates the error signal [g] when the distance error e is continuously output at the T / 16 interval using the third order Bogan equation for the input signal X (n) of FIG. (e)] is a graph showing an example of the error signal g (e) obtained by the calculation formula. According to this graph, the time when the error signal g (e) calculated by continuously feeding back the interpolated output signal Y (n) becomes the minimum value is the time when the distance error e is 2/16. Therefore, the distance error calculator 11 outputs the distance error value (e.g., 2/16) obtained by iterative calculation to the interpolation filter coefficient storage unit 12, and output signal [Y] interpolated by the interpolation filter 13 at this time. (n)] is shown symmetrically as shown in the graph in FIG.

The signal Y (n) output from the interpolation filter 13 is applied to the synchronous addition averaging unit 20, and the synchronous addition averaging unit 20 samples the input signal Y (n) from each other. The averaged signal is averaged again a predetermined number of times, and the averaged digital signal is output to a signal processor at a later stage.

As described above, the present invention calculates an error from the input digital signal, calculates an interpolation filter coefficient using the interpolation equation, uses the same to interpolate the input signal, and then synchronizes and averages the correction to correct the error generated in the system itself. Since it is possible to minimize the error in the subsequent signal processing.

Claims (7)

In a digital signal processing system for processing a digital signal sampled according to a predetermined clock signal, a distance error from the input digital signal is calculated to find a point where the distance error is minimum, and an interpolation filter coefficient corresponding to this point. An interpolator for generating and interpolating the input digital signal; And a synchronous addition averaging unit for averaging the digital signals output from the interpolator a predetermined number of times so that sampling points coincide with each other and applying the same to a signal processor at a later stage. The apparatus of claim 1, wherein the interpolator comprises: a distance error calculator for calculating a distance error from an input digital signal; An interpolation filter coefficient storage unit for generating and storing an interpolation filter coefficient corresponding to each distance error through a predetermined interpolation equation; And an interpolation filter for delaying the input signal at a predetermined time interval, multiplying the corresponding interpolation coefficient read by the interpolation filter coefficient storage unit, and adding all the multiplied values to output an interpolated filtered digital signal. Synchronous Addition Averaging System. The method of claim 2, wherein the distance error calculator calculates and outputs a distance error from an input digital signal initially, and thereafter obtains an error from the interpolated signal from the interpolation filter while varying the distance error at a predetermined interval. A synchronous addition averaging apparatus using an interpolation technique, characterized in that it outputs a distance error at a time when an error is minimized. A method of processing a digital signal sampled according to a predetermined clock signal, comprising: calculating a distance error from an input digital signal; Calculating an interpolation filter coefficient corresponding to the distance error using a interpolation term; Delaying the input digital signal at a predetermined time interval and obtaining an interpolated digital signal using the calculated interpolation filter coefficients; Calculating an error function from the interpolated digital signal while varying the distance error at a predetermined interval and repeating the above process until a distance error at the time when the error function becomes a minimum value is detected; And averaging the interpolated digital signal by a predetermined number of times so that sampling time points coincide with each other. The method of claim 4, wherein the distance error is calculated from an input digital signal by the following equation. Here, f (E) is a distance error function, and X (T-1) and X (T + 1) are digital input signals sampled at each time point T-1, T + 1. 5. The method of claim 4, wherein the interpolation filter coefficient corresponding to the distance error is calculated by using the following interpolation term. Here, P (T) is an interpolated digital signal, T is a distance error, T1-Tn is a sampling time point, and X1-Xn is an input signal sampled at each time point T1-Tn. 5. The method of claim 4, wherein the error function of the interpolated digital signal is calculated by the following equation. Here, g (e) is an error function, and Y (n-1) and Y (n + 1) are interpolated digital signals at sampling points n-1 and n + 1.