KR0147721B1 - Car power antenna system - Google Patents

Abstract

The present invention relates to a power antenna system of a motor vehicle that can arbitrarily adjust a restraint time when locking a motor by using a counter method.

The present invention simplifies the internal operation structure while minimizing the number of external components, leaving the existing method, allowing the power antenna to operate not only in the relay driving method but also in the MOSFET driving method, and the maximum operating time by the counter method. It is possible to adjust the restraint time at the time of motor restraint, and to have the dead time at the time of switching on / off to prevent the simultaneous turn-on period of the MOSFET when driving the MOSFET.

Description

Car Power Antenna System

1 is a block diagram of a conventional power antenna system.

2 is an overall configuration diagram of a power antenna system according to the present invention.

3 is a circuit diagram showing a detailed configuration of a power antenna system according to the present invention.

4 is a circuit diagram showing a partial detailed configuration of the input command unit of FIG.

FIG. 5 is a detailed configuration diagram of the restriction control unit of FIG.

FIG. 6 is an exemplary view illustrating a MOSFET driving method of the output driver of FIG. 3.

7 is another exemplary embodiment of the relay driving method of the output driver of FIG.

* Explanation of symbols for main parts of the drawings

10: input command unit 20: logic circuit unit

30: frequency generator 40: overcurrent detector

50: counter circuit section 60: output drive section

70: constant voltage generator

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power antenna system of a motor vehicle, and more particularly, to a power antenna system of a motor vehicle capable of arbitrarily adjusting a restraint time during motor locking using a counter method.

1 is a configuration diagram of a conventional power antenna system.

In the conventional power antenna system, as shown in FIG. 1, a switch S1 having one end connected to a battery B + of a vehicle, a timer 2 connected to the other end of the switch S1, and a timer 3 The power supply unit 1 outputs the power voltage Vs and the reference voltage Vref by inputting the battery voltage B + according to the output of the motor, and the motor driving unit driving the motor M in accordance with the output of the timer unit 2. (3), an overcurrent detector (4) for detecting an overcurrent of the motor (M) in accordance with the output of the motor driver 3, and a timer unit for protecting the motor from overcurrent in accordance with the output of the overcurrent detector (4) It consists of an overcurrent protection part 5 for controlling (2).

The operation of the conventional power antenna system configured as described above will be described.

The power antenna system of the vehicle automatically raises and lowers the antenna by switching the switch S1 as the radio switch or the ignition key of the vehicle is turned ON / OFF. By forward and reverse rotation.

That is, when the radio switch or the ignition key of the car is turned on, the motor for moving the power antenna is rotated forward to raise the antenna. When the radio switch or the ignition key of the car is turned off, the motor is reversed to lower the antenna.

In such a power antenna system of a vehicle, the rise and fall speed of the antenna is determined by the size of the battery voltage of the vehicle and the bending due to the aging of the antenna, and the time that the antenna can rise and fall, that is, the maximum The operation time Ts is determined.

When the radio switch or the ignition key of the vehicle is turned on / off, the switch S1 is turned on so that the timer unit 2 operates to output the power voltage Vs from the power supply unit 1 during the maximum operating time Ts. The power supply voltage Vs output from the power supply unit 1 is supplied to the motor driving unit 3 through the overcurrent protection unit 5 and the timer unit 2 to drive the motor M forward and backward.

However, the antenna is at the top when the position is rising before the maximum operation time or at the bottom when the antenna is descending. In this case, the motor M driving the antenna is mechanically locked, and an overcurrent flows in the motor M, resulting in a risk that the motor M is burned out.

To solve this problem, the overcurrent detecting unit 3 detects an overcurrent flowing in the motor M, and when an overcurrent flows, outputs a signal to the overcurrent protection unit 5 so that the overcurrent protection unit 5 supplies the power supply unit through the timer unit 2. (1) is controlled to prevent the power supply voltage Vs from being supplied to the motor driver 3.

That is, the overcurrent protection circuit 5 is operated to stop the driving of the motor M to protect the motor M. FIG.

However, since the conventional power antenna system is driven only by the relay driving method, the conventional power antenna system is not operated by the MOSFET driving method and has a large number of external components and has a complicated internal operation structure.

An object of the present invention for improving the above problems is to simplify the internal operation structure while minimizing the number of external components, to provide a power antenna system of a vehicle for enabling operation in the MOSFET method as well as the relay drive method of the power antenna. Is in.

In addition, another object of the present invention is to set the maximum operating time (Ts) by the counter method, arbitrarily adjust the restraint time when the motor is locked, and to prevent the simultaneous turn-on period of the MOSFET in the MOSFET driving method The present invention provides a power antenna system of a vehicle having a dead time of on / off.

In order to achieve the above object, the power antenna system of an automobile according to the present invention generates an input command unit for determining the rise and fall of an antenna, and a frequency signal for obtaining a stable period for setting the maximum operation time of the rise and fall of the antenna. A frequency generator, an over-current detector for arbitrarily adjusting the restraint time by a counter method, and detecting the restraint when the motor is restrained when the antenna is raised and lowered. The counter circuit unit determines the maximum operation time by using a counter method and inputs the frequency signal outputted from the counter, and determines the rotation of the motor according to the output of the overcurrent detector, and outputs the frequency signal and the counter circuit unit output from the frequency generator. Ascending the input command unit and A logic circuit unit for outputting signals to the input command unit and the counter circuit unit to prevent an unstable state that may occur during a falling command, an output driver unit performing a forward or reverse rotation of the motor according to the output of the logic circuit unit, and the input command And a constant voltage generator configured to generate a constant voltage based on a battery voltage as an input and supply the constant voltage to the logic circuit, the frequency generator, the overcurrent detector, and the counter circuit.

Hereinafter, an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

As shown in FIG. 2, the power antenna system of the vehicle according to the present invention includes an input command unit 10, a logic circuit unit 20, a frequency generator unit 30, an overcurrent detector unit 40, a counter circuit unit 50, And an output driver 60 and a constant voltage generator 70.

The input command unit 10 determines the rise and fall of the antenna, and is configured to allow the antenna to rise and fall even when the battery voltage B + of the vehicle drops to a low voltage instantaneously, and to satisfy the characteristics of a small stagnation current. do.

The frequency generator 30 is composed of an oscillator (OSC) to generate a frequency signal for obtaining a stable period for setting the maximum operating time (Ts) of the rise and fall of the antenna.

The overcurrent detector 40 arbitrarily adjusts the restraint time by using a counter method for inputting a frequency signal output from the frequency generator 30, and detects the restraint when the motor is restrained when the antenna is raised and lowered.

The counter circuit unit 50 determines the maximum operating time Ts by using a counter method as a frequency signal output from the frequency generator 30, and determines the rotation of the motor according to the output of the overcurrent detector 40. In particular, the stable maximum operation time of the antenna rising and falling in accordance with the rising and falling commands of the input command unit 10 by the counter method connected to the overcurrent detection unit 40 by the frequency signal generated by the frequency generator 30 Determining Ts and limiting the operation of the counter by the operation of the overcurrent detection unit 40 due to overcurrent when the antenna is constrained by the motor M when the antenna is raised and lowered determines the rotation of the motor M.

The logic circuit unit 20 inputs a frequency signal output from the frequency generator 30 and an output of the counter circuit unit 50 to prevent an unstable state that may occur when the input command unit 10 rises or falls. The signal is output to the command unit 10 and the counter circuit unit 50.

The output driver 60 performs forward or reverse rotation of the motor M according to the output of the logic circuit 20.

The constant voltage generator 70 generates a constant constant voltage Vcc1 by inputting the battery voltage B + of the vehicle according to the output of the input command unit 10 to generate the logic circuit 20, the frequency generator 30, and the overcurrent detector. 40 to the counter circuit section 50.

Detailed configuration of a power antenna system of a vehicle according to the present invention configured as described above will be described with reference to the accompanying drawings.

FIG. 3 is a circuit diagram showing a detailed configuration of a power antenna system according to the present invention. FIG. 4 is a circuit diagram showing a partial detailed configuration of the input command unit 10 of FIG. 3, and FIG. 5 is a restraint control section 41 of FIG. 6 is an embodiment showing a MOSFET driving method of the output driver 60 of FIG. 3, and FIG. 7 is another embodiment showing a relay driving method of the output driver 60 of FIG.

As shown in FIG. 2, the input command unit 10 is connected to the constant voltage source 16 and the battery B + which output a constant constant voltage Vcc2 by inputting the battery voltage B +, and when the antenna is raised and lowered. The output of the inverter 15 is set input (S) using the up / down switch 14 to be switched, the inverter 15 having an input connected to the switch 14, and the constant voltage Vcc2 of the constant voltage source 16 as a supply power. The RS flip-flop 11 and the inverted output (/ Q) of the RS flip-flop 11 are used as the base inputs, and the emitter is connected to the ground, and the constant voltage generator ( A non-inverting input terminal (+) is connected to the npn transistor 13 and the switch 14 which connects the collector to 70 to block the constant voltage supply of the constant voltage generator 70 to minimize the static current, and the inverting input terminal (-). The reference voltage Vref is applied to determine the on / off state of the switch 14 and the logic circuit 20 The comparator 12 outputting the power output unit 1) and the low voltage driving unit 17 are capable of raising and lowering the antenna even when the battery voltage B + drops to a low voltage momentarily and satisfying characteristics of a small stagnation current.

Here, as shown in FIG. 4, the low voltage driver 17 may include a zener diode (ZD) having a cathode connected to a battery power source (B +) of a vehicle, and a base through a resistor (R1) at an anode of a zener diode (ZD). Is connected to the constant voltage source 16 through a resistor (R3), the collector is connected to the emitter is connected to the npn transistor (Q1), npn transistor (Q1) of the resistor (R2) connected both ends of the base and ground, and The base is connected to the collector of the npn transistor Q1, the collector is connected to the constant voltage source 16 through the resistor R4, the collector is connected to the input terminal of the RS flip-flop 11, and the emitter is connected to the ground, and the RS flip. It consists of npn transistor Q2 which causes the inverting output / Q of the flop 11 to become high.

In addition, the RS flip-flop 11 has a three input NAND gate N1 and an input terminal connected to an output terminal of the resistor R4 and the inverter 15 to output an inverted output / Q, and a three input NAND gate N1. The input terminal is connected to the output terminal and the output terminal of the logic circuit 20, and the two input NAND gate (N2) connected to the output terminal of the input terminal of the three input NAND gate (N1).

Here, the reference voltage Vref corresponds to about 1/2 of the battery voltage B + of about 12V, and is used to determine whether the switch 14 is turned on or off.

As illustrated in FIG. 3, the overcurrent detector 40 is connected to the output driver 60 to detect an overcurrent, and the value detected by the resistor 43 is input to the inverting input terminal (-). A counter for counting the frequency signal output from the frequency generator 30 according to the output of the comparator 42 and the comparator 42 for determining whether an overcurrent is input by using the reference voltage Vsen as a non-inverting terminal (+) ( 44, and the restraint control unit 41 which outputs the counter 44 to the counter circuit unit 50 to control the restraint time by combining the restraint time adjustment data D1, D2, and D3 input from the outside as an input. It is composed of

Here, the restraint control part 41 has a plurality of two-input exclusive oar gates 45 and 46 which respectively input the restraint time adjustment data D1, D2 and D3 and the output of the counter 44 as shown in FIG. 47, and an OR gate 48 for ORing the outputs of the plurality of two input exclusive OR gates 45, 46, 47.

As shown in FIG. 3, the counter circuit unit 50 performs a three-input AND gate for logically multiplying a frequency signal output from the frequency generator 30 and a signal output from the restraint controller 41 of the overcurrent detector 40. (51), the signal is reset in accordance with the signal output from the logic circuit section 20 and set in accordance with the signal output from the restraining control section 41 of the overcurrent detection section 40 and output from the three input and gate 51 And a counter 52 for counting N, and an NAND gate 53 for negatively multiplying the signal output from the counter 52 and outputting it to the input terminal of the three input and gate 51 and the logic circuit unit 20.

As shown in FIG. 3, the logic circuit 20 uses the signal output from the comparator 12 of the input command unit 10 as a data input and the frequency signal output from the frequency generator 30 as a clock input. And the output of the D flip-flop 21 and the D flip-flop 21 as the data input, and the output of the frequency generator 30 as the clock input, and the initial high signal H as the reset input. ) Is an exclusive NOR gate that performs an exclusive negative OR of the D flip-flop 22 having the reset input, the signal output from the comparator 12 of the input command unit 10, and the signal output from the D flip-flop 22. 23, the inverter 29-1 for inverting the initial high signal H, the output of the inverter 29-1, the output of the exclusive Noah gate 23, the output of the D flip-flop 22, and the counter circuit section 50 AND gate which outputs the output of the NAND gate 53 of the Yite 24, the inverter 29 for inverting the output of the D flip-flop 22, the outputs of the inverters 29-1, 29, the output of the exclusive Noah gate 23, and the NAND gate of the counter circuit section 50 ( The AND gate 25 and the output of the D flip-flop 22 and the output of the NAND gate 53 of the counter circuit unit 50 are logically ORed by outputting the output of the 53 to the output driver 60. The OR gate 26 outputting to the reset input R of the RS flip-flop 11 of 10), the inverter 28 for inverting the output of the exclusive NOA gate 23, and the initial high signal H and the inverter ( The OR gate 28 is configured by ORing the output of the 28 and outputting it to the reset input Rs of the counter 52 of the counter circuit section 50.

As shown in FIG. 3, the constant voltage generator 70 has a base connected to the collector of the npn transistor 13 of the input command unit 10 and uses the battery voltage B + of the automobile as an emitter input. The logic circuit unit 20 generates a constant voltage Vcc1 by inputting the power supply applied through the pnp transistor 71 and the collector of the pnp transistor 71 according to the control of the control unit 10 and the collector of the pnp transistor 71. , The frequency generator 30, the overcurrent detector 40, and the constant voltage source 72 supplied to the counter circuit 50.

The output driver 60 drives the motor M in a MOSFET driving manner as shown in FIG. 6, or drives the motor M in a relay manner as shown in FIG.

When the output driver 60 drives the motor M in a MOSFET driving manner, as shown in FIG. 3, an npn transistor whose base input is the output of the AND gates 24 and 25 of the logic circuit 20, respectively. (61, 62), the charge pump circuit (63) connected to the collectors of the npn transistors (61, 62) and the output of the charge pump circuit (63) are gate inputs, and the battery power source (B +) of the vehicle is drain input. The MOSFET 64, 66 whose source is connected to the motor M, and the output of the charge pump circuit are the gate inputs, the drain is connected to the source of the MOSFET 64, 66, and the resistance 43 of the overcurrent detector 40 Is composed of MOSFETs 65 and 67 connected to sources.

Here, the output driver 60 is connected to one of the resistors R11 and the input of the inverter as shown in FIG. 6 at the output of the AND gate 24 of the logic circuit 20 and the other of the resistors R11. Is connected to the base of the transistor (Q61), the collector of the transistor (Q61) is a Zener diode (ZD11), the battery power ( Diode (D), whose anode is connected to the cathode of diode (D), the resistor (R14), the other end of which is connected to the gates of MOSFETs (64, 66), resistor (R14) through resistor (R12) to B +). A resistor (R15) having one end connected to the other end of), a cathode connected to the other end of the resistor (R14) and an anode connected to the ground, a Zener diode (ZD12) connected to the ground, and a diode of the diode (D) and the motor (M) One end is connected to the capacitor (C), the resistor (R12) and the other end is connected to the gate of the MOSFET (65, 67) The npn transistor Q13 and the inverter INV of which the base is connected to the resistor R13, the other end of the resistor R13 through the resistor R17, the collector is connected to the other end of the resistor R15, and the emitter is connected to the ground. The circuit is composed of two npn transistors Q12 having a base connected to the output terminal through a resistor R16, a collector connected to the other end of the resistor R15, and an emitter connected to the ground.

Here, the overcurrent sensing resistor 43 of the overcurrent sensing unit 40 is connected to the source and the ground of the MOSFETs 65 and 67.

In addition, when the output driver 60 drives the motor M in a relay driving manner, as shown in FIG. 7, the up / down signal UP / DWN applied through the logic circuit 20, that is, logic Collectors of the npn transistors Q21 and Q22 and the npn transistors Q21 and Q22 having the outputs of the AND gates 24 and 25 of the circuit section 20 as base inputs through the resistors R21 and 422 and whose emitters are connected to ground. It is connected to the battery power source (B +) and is configured to be a relay (REL) for controlling the rotation and rotation direction of the motor (M).

Here, the overcurrent sensing resistor 43 of the overcurrent sensing unit 40 is connected to the relay REL and the ground.

The operation of the power antenna system of the vehicle according to the present invention configured as described above will be described.

When the ignition key or the radio switch of the vehicle is turned ON, the switch 14 of the input command unit 10 is turned on, and the comparator 12 is applied with the reference voltage Vref and the battery voltage B + applied through the switch 14. Compare and output the high level signal. At the same time, the output of the switch 14 is applied to the set terminal S of the RS flip-flop 11 through the inverter 15 so that the npn transistor 13 is turned on regardless of the reset signal. Accordingly, the npn transistor 71 of the constant voltage generator 70 is turned on to drive the constant voltage source 72.

An initial high signal H is applied to the logic circuit unit 20 under an initial condition by the constant voltage source 72, and power is supplied to each circuit.

In the input command unit 10, as shown in FIG. 4, the low voltage driver 17 operates.

That is, when the battery power source B + is equal to or higher than the Zener diode ZD voltage, the npn transistor Q1 is turned on and the npn transistor Q2 is turned off, thereby not affecting the operation of the RS flip-flop 11 at all.

However, when the battery power supply B + is momentarily lowered and is lower than the Zener diode ZD voltage, the npn transistor Q1 is turned off and the npn transistor Q2 is turned on so that the npn transistor 13 is always turned on so that the pnp transistor 71 is turned on. It is turned on and the constant voltage source 72 is operated so that the on / off of the ignition key or radio switch, i.e., the rise and fall of the antenna, can be performed.

In the logic circuit unit 20, when the radio switch is turned on, that is, when the antenna is raised, the signal generated by the frequency generator 30 is delayed after the initial high signal H becomes low by the D flip-flops 21 and 22. After that, the exclusive NOR gate 23 becomes high so that the npn transistor 61 of the output driving circuit 60 is turned on, thereby raising the antenna. As described above, the delay using the D flip-flops 21 and 22 and the exclusive Noah gate 23 is to prevent unstable elements and abnormal oscillations that may occur during rising and falling.

At this time, the output of the AND gate 25 is turned low by the inverter 29 so that the npn transistor 62 of the output driver 60 is turned off.

In the counter circuit section 50, when the radio switch is turned on, the initial high signal H resets the counter 52 through the OR gate 27, and then counts for the maximum operating time Ts, and during this time, NAND The output of the gate 53 is kept high.

However, when the antenna continues to rise and the antenna is constrained, if the overcurrent continues to flow, the motor M may be burned out, and the counter 52 stops counting by the overcurrent detector 40.

That is, a low signal is transmitted to the reset terminal Rs of the counter 44 by comparing the value detected by detecting the overcurrent flowing in the motor M in the resistor 43 with the sensing reference voltage Vsen in the comparator 42. The counter 44 is operated by outputting.

The output of the counter 44 is input to the restraint controller 41 and the restraint time is determined by the combination of the restraint controller 41.

That is, the restraint time adjustment data D1, D2, and D3 input from the outside when the motor M is restrained are output at a low level by a combination made by the restraint control unit 41, and the AND gate of the counter circuit unit 50 is provided. The output of (51) is made low and applied to the clock terminal and the set terminal of the counter 52 to make the output terminals Q0-Qn of the counter 52 high. The output terminals Q0-Qn of the counter 52 which are high level are input to the NAND gate 53 and are output at the low level, and are input to the AND gates 24 and 25 of the logic circuit 20 so that the output is low. By doing so, the output drive circuit 60 is turned off so that the motor M is stopped.

When the starter key or radio switch is turned off, i.e., the antenna is turned down, a high level signal is applied to the set terminal S of the RS flip-flop 11 of the input command section 10 in FIG. 3 and the comparator 12 is referred to. The voltage is output to the data input terminals of the D flip-flops 21 and 22 of the logic circuit unit 20 in comparison with the voltage Vref. Therefore, the output of the D flip-flops 21 and 22 goes low and the output of the AND gate 25 goes high, causing the antenna to go down, i.e., fall.

At this time, the npn transistor 12 of the input command unit 10 and the npn transistor 71 of the constant voltage generator 70 are turned on. This is because the npn transistor 13 is turned on by the output of the RS flip flop 11 by outputting to the reset terminal R of the flip flop 11.

Also in this case, the maximum operating time Ts that the antenna can operate in the lowered state is made in the same manner as the rise of the antenna, and when constrained, it is constrained by the counter 44 and the restraining controller 41 of the overcurrent detecting unit 40. After the time is determined, the motor M is stopped.

The total current when the ascending of the antenna is completed and when the descent of the antenna is completed is different.

That is, when the descent of the antenna is completed, when the descent of the antenna is completed in the RS flip-flop 11 of the input command unit 10 of FIG. 3, the counter 52 of the counter circuit unit 50 of the NAND gate 53 The output is at a low level, which is input to the OR gate 26 of the logic circuit section 20 and the output of the OR gate 26 is at a low level so that the reset terminal of the RS flip-flop 11 of the input command section 10 ( Since R) is set at the low level, the pnp transistor 13 is turned off. Accordingly, the pnp transistor 71 of the constant voltage generator 70 is turned off, and thus the constant voltage source 72 is turned off.

Therefore, the power supply to the logic circuit 20, the frequency generator 30, the overcurrent detector 40, and the counter circuit 50 stops supplying power, and then the start command of the vehicle or the next command of the radio switch is raised. It remains low current until a command is issued, minimizing stall current.

The output driver 60 may be driven by a MOSFET driving method as shown in FIG. 6 or may be driven by a relay method as shown in FIG.

As described above, the power antenna system of the vehicle according to the present invention has the following effects.

First, the internal operation structure is simplified while minimizing the number of external components beyond the conventional method.

Second, the power antenna can operate not only in relay driving but also in MOSFET driving.

Third, the maximum operating time can be set by the counter method, and the restraint time can be arbitrarily adjusted when the motor is restrained.

Fourth, the MOSFET has a dead time at the time of switching on and off to prevent the simultaneous turn-on period of the MOSFET when driving the MOSFET.

Claims (12)

An input command unit 10 for determining the rise and fall of the antenna, a frequency generator 30 for generating a frequency signal for obtaining a stable period for setting the maximum operating time Ts of the rise and fall of the antenna, and the frequency An overcurrent detector 40 for detecting arbitrarily the restraint time when the motor is restrained when the antenna is lifted and lowered by the counter method by inputting the frequency signal output from the generator 30 as an input, and the frequency generator ( Counter circuit unit 50 to determine the maximum operating time (Ts) by using a counter method as a frequency signal output from 30) and to determine the rotation of the motor in accordance with the output of the overcurrent detection unit 40, the frequency generation Unstable that may occur when the rising and falling commands of the input command unit 10 by inputting the frequency signal output from the unit 30 and the output of the counter circuit unit 50 In order to prevent a condition, the logic circuit unit 20 for outputting a signal to the input command unit 10 and the counter circuit unit 50 and the motor M may be rotated forward or backward according to the output of the logic circuit unit 20. According to the output driver 60 and the output of the input command unit 10 to generate a first constant voltage (Vcc1) to the battery voltage (B +) by inputting the logic circuit 20, the frequency generator 30, An overcurrent detector (40) and a constant voltage generator (70) for supplying the counter circuit section (50) comprises a power antenna system of a vehicle. The method of claim 1, wherein the input command unit 10 is connected to the constant voltage source 16, the battery (B +) for outputting the second constant voltage (Vcc2) to the battery voltage (B +) as the input and the lowering of the antenna The output of the inverter 15 is set using the up / down switch 14 to be switched, the inverter 15 having an input connected to the switch 14, and the second constant voltage Vcc2 of the constant voltage source 16 as a power supply. The RS flip-flop 11 having the input S and the output of the logic circuit 20 as the reset input, the inverted output (/ Q) of the RS flip-flop 11 as the base input, and the emitter at ground And an npn transistor 13 connected to the constant voltage generator 70 to block supply of the first constant voltage Vcc1 of the constant voltage generator 70 to minimize the static current, and the switch 14. Is connected to the non-inverting input terminal (+) and the reference voltage (Vref) is applied to the inverting input terminal (-). Value (14) on / in the car power antenna system characterized in that comprises to determine the off-state the comparator 12 to output to the logic circuit portion 20 of the. 3. The power antenna system of claim 2, wherein the reference voltage (Vref) corresponds to about 1/2 of the battery voltage (B +). The low voltage driver 17 of claim 2, wherein the input command unit 10 further includes a low voltage driver 17 capable of raising and lowering the antenna and satisfying characteristics of a small stagnation current even when the battery voltage B + drops to a low voltage momentarily. Power antenna system of a vehicle, characterized in that it comprises a. The method of claim 4, wherein the low voltage driver 17 has a zener diode ZD having a cathode connected to a battery B +, a base connected to an anode of the zener diode ZD, and a collector connected to the constant voltage source 16. Is connected to the second npn transistor (Q1) and the collector connected to the ground, the base is connected to the collector of the second npn transistor (Q1) and the collector is connected to the input terminal of the constant voltage source 16 and RS flip-flop (11) And a third npn transistor (Q2) configured to connect an emitter to the ground so that the inverted output (/ Q) of the RS flip-flop (11) is in a high state. According to claim 1, wherein the overcurrent detector 40 is connected to the output driver 60, the resistor 43 for detecting the overcurrent, and the value detected by the resistor 43 as the input of the inverting input terminal (-) Comparator 42 for determining whether an overcurrent is detected using the sensing reference voltage Vsen as an input of the non-inverting stage (+), and counting a frequency signal output from the frequency generator 30 according to the output of the comparator 42. The restraint outputs to the counter circuit part 50 to control the restraint time by combining the counter 44 and restraint time adjustment data D1, D2, and D3 which are input from the outside as an input. Power antenna system of the vehicle, characterized in that it comprises a control unit (41). 7. The restraint control unit (41) according to claim 6, wherein the restraint control unit (41) receives a plurality of two-input exclusive oar gates (45, 46), each of which is an input of the restraint time adjustment data (D1, D2, D3) and the output of the counter (44). 47) and an ora gate (48) for ORing the outputs of the plurality of two input exclusive oar gates (45, 46, 47). The logic circuit part of claim 1, wherein the counter circuit part 50 performs a logical multiplication on the frequency signal output from the frequency generator 30 and the signal output from the overcurrent detection part 40. A counter 52 which is reset according to the signal output from the 20 and is set according to the signal output from the overcurrent detecting unit 40 and counts the signal output from the three input and gate 51, and the counter ( 52, an NAND gate 53 for negatively multiplying the signal output from the third input and gate 51 and the NAND gate 53 for outputting to the logic circuit 20. . 2. The logic circuit of claim 1, wherein the logic circuit unit 20 uses the signal output from the input command unit 10 as a data input and the frequency signal output from the frequency generator 30 as a clock input. The output of the first D flip-flop 21 and the output of the first D flip-flop 21 as a data input and the output of the frequency generator 30 as a clock input and the initial high signal ( Exclusive no-gate for exclusive negative OR of the second D flip-flop 22 and the signal output from the input command unit 10 and the signal output from the second D flip-flop 22 with H as a reset input. (23), a first inverter 29-1 for inverting the initial high signal H, an output of the first inverter 29-1, an output of the exclusive Noah gate 23, and a second D flip-flop 22 And the output of the counter circuit unit 50 by the AND Of the first and second inverters 29 and 29 and the first and second inverters 29-1 and 29 which inverts the output of the second and second flip-flop 22. The output of the second AND gate 25 and the second D flip-flop 22 which outputs the output of the exclusive Noah gate 23 and the output of the counter circuit unit 50 to the output driver 60. And a first OR gate 26 for ORing the output of the counter circuit unit 50 to the input command unit 10, a third inverter 28 for inverting the output of the exclusive NOA gate 23, and And a second ora gate (27) for ORing the initial high signal (H) and the output of the third inverter (28) to the counter circuit section (50). The power antenna system of claim 1, wherein the output driver (60) drives the motor (M) in a MOSFET driving manner. 2. The power antenna system of claim 1, wherein the output driver (60) drives the motor (M) in a relay manner. 2. The npn transistor of claim 1, wherein the constant voltage generator 70 has a base connected to the input command unit 10, the npn transistor 71 having a battery voltage B + as an emitter input, and the npn transistor 71. A constant voltage source generating a first constant voltage Vcc1 as an input of a power applied through a collector of the power supply, and supplying the first constant voltage Vcc1 to the logic circuit 20, the frequency generator 30, the overcurrent detector 40, and the counter circuit 50. A power antenna system for a vehicle, characterized in that it comprises a (72).