KR0147103B1 - Servo-interface device of wire-cut electro-discharge machine - Google Patents

Abstract

The present invention relates to a servo interface device for a wire cut electric discharge machine, which is an interface device between a NC (Numerical Controller) and a DC servo driver, and employs a number of logic circuits in a conventional control unit. In consideration of a problem that may cause trouble, an input buffer unit for buffering address, data, and control signals from the NC, a controller for receiving an interrupt signal from the NC and generating an interrupt signal, Clock generator for generating a clock according to the control, data for the interrupt cycle at each interrupt is loaded into the internal counter to start counting with the clock signal of the clock generator, the watch for generating a counter overflow signal in the abnormal operation of the NC Processing with Dog Timer And a timer unit for loading and outputting data to be output when the interrupt signal is generated and disabling the output when a counter overflow signal of the watch dog timer is generated, and employing a programmable logic device (PLD) in a logic circuit. By replacing the parts with software, the circuit is simplified, and by using the watch dog timer, it detects the abnormal operation of the NC at the servo interface and controls the control signal transmitted to the outside to prevent trouble to the external circuit due to the abnormal operation of the NC. It is to be done.

Description

Servo interface device for wire cut electric discharge machine

1 is a conventional block diagram.

2 is a schematic block diagram of the present invention.

3 is a detailed block diagram of the present invention.

4 is an angle timing diagram of FIG.

5 is an operational flow chart according to the present invention.

* Explanation of symbols for main parts of the drawings

10: NC 20: Servo Interface

21: input buffer 21a: address buffer

21b: data buffer 21c: control signal buffer

22: processor 22a: address decoder

22b: register section 22c: control section

22d: clock generator 22e: watch dog timer

23: timer section 24: gate and insulation section

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wire cut electric discharge machine, and more particularly, to a servo interface device for a wire cut electric discharge machine, which is an interface device of a NC (Numerical Controller) for controlling a DC motor and a DC servo driving period.

In general, a wire cut electric discharge machine uses a DC motor and a DC servo driver as a driving device, and requires a dedicated interface between the NC and the driver to control the motor.

FIG. 1 shows a block diagram of such a conventional interface device, which includes an input buffer unit 1 including an address buffer 1a, a data buffer 1b, and a control signal buffer 1c, and the input buffer unit ( 1) a control unit 2 for generating a control signal by synthesizing data from the NC input through the control unit; a gate unit 3 for controlling the control signals of the control unit 2; and an insulating unit for electrical insulation from the outside. It consists of (4).

The conventional interface device having such a configuration generates a control signal by synthesizing data received from the NC through the input buffer unit 1 in the control unit 2 and simply outputs these signals to the outside to output a DC servo driver and a DC motor. Controlled.

Therefore, the conventional technology employs a number of logic circuits to generate a signal for buffer enable, a signal for data latch, and a control signal to the control unit, thereby complicating the interface device and causing an external trouble in the abnormal operation of the NC device. There was a problem.

The present invention is to solve this problem, an object of the present invention is to simplify the number of logic circuits of the control unit and to detect the abnormal operation of the NC in the servo interface using a watch dog timer (Watch Dog Timer) is transmitted to the outside The present invention provides a servo interface device for a wire cut electric discharge machine that can prevent a trouble that may occur during abnormal operation of the NC by controlling a control signal.

Features of the present invention for achieving the above object is an input buffer unit for buffering the address and data and control signals from the NC, a control unit for generating an interrupt signal by receiving a signal necessary for generating an interrupt from the NC, the control of the control unit Clock generator for generating a clock in accordance with the interrupt cycle, and data corresponding to the interrupt period are loaded into an internal counter to start counting with a clock signal of the clock generator, and a watch dog that generates a counter overflow signal in case of abnormal operation of the NC. And a processing unit including a timer, and a timer unit for loading and outputting data to be output when the interrupt signal is generated and disabling the output when a counter overflow signal of the watch dog timer is generated.

Hereinafter, an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

2 is a schematic configuration diagram of a servo interface device for a wire cut electric discharge machining machine according to the present invention. The servo interface unit 20 integrates various commands from the NC 10 to the DC servo driver 30 and the DC. It has a structure to output to the motor 40.

As shown in FIG. 3, the servo interface 20 includes an input buffer 21 comprising an address buffer 21a, a data buffer 21b, and a control signal buffer 21c, and the control signal buffer ( An address decoder 22a for decoding an address from the address buffer 21a in accordance with a control signal from 21c, and from the address buffer 21a and a data buffer 21c in accordance with the decoding of the address decoder 22a. Register part 22b which temporarily stores an address and data, receives a signal necessary for generating an interrupt from the NC 10, generates an interrupt signal, and generates various control signals by the signal from the register part 22b. The controller 22c, the clock generator 22d for generating a clock under the control of the controller 22c, and data corresponding to the interrupt period are loaded into an internal counter at each interrupt so that the clock is loaded. The counting unit starts with the clock generation signal of the generation unit 22d, and is a processing unit 22 that is a watch dog timer 22e that generates a counter overflow signal when the NC 10 operates abnormally, and data to be output when an interrupt signal is generated. Is loaded and outputted, the timer unit 23 for disabling the output when the counter overflow signal of the watch dog timer 22e is generated, the gate for intermitting and electrically insulating the output signal of the timer unit 23, and It consists of an insulating part 24.

The timer unit 23 includes first and second timers 23a and 23b in which data is alternately loaded and outputted when an interrupt signal is generated, and the first and second timers 23a and 23b are used. ) Is a programmable timer.

In the present invention configured as described above, the control unit 22c receives a signal necessary for generating an interrupt from the NC 10 and generates first and second interrupt signals S1 and S2. Accordingly, the NC 10 ) Detects the first and second interrupt signals S1 and S2 to access the interface.

At this time, when the first interrupt signal S1 is generated, the clock signal S3 and the output enable signal S4 for loading data to be output for the next interval are loaded into the first timer 23a, and the first timer 23a is enabled. Wait).

When the second interrupt signal S2 is generated, the clock signal S3 and the output enable signal S4 are input to the first timer 23a so that the first timer 23a receives the output data with the loaded data. S9) is outputted and waits for signals S3 and S4 to enable the second timer 23b.

The signals S5 and S6 output from the controller 22c to the first and second timers 23a and 23b generate the first and second interrupt signals S1 and S2. The signal is an output enable signal for performing the above operation, and the signals S7 and S8 from the first and second timers 23a and 23b are also the first and second interrupt signals S1 and S2 of the control unit 22c. ) Is a signal to generate.

The clock generator 22d generates a clock using the signal S11 from the controller 22c, and the watch dog timer 22e loads the data corresponding to the interrupt period into an internal counter for each interrupt and clocks the clock. The counting operation is started with the signal S3.

The watch dog timer 22e generates a counter overflow signal S12 when data corresponding to the interrupt period is not loaded into the internal counter due to abnormal operation of the NC 10.

The counter overflow signal S12 is input to the clock generator 22d to disable the clock generator 22d. Accordingly, the first and second timers 23a and 23b and the watch dog timer 22e are provided. The clock input to) is also disabled.

Accordingly, the output signals S9 and S10 of the first and second timers 23a and 23b are also disabled to prevent troubles that may occur during abnormal operation of the NC 10. The timing diagram of the signal is shown in FIG. 4, and data to be output for the next interval is loaded at Ta and Tb.

On the other hand, Fig. 5 briefly illustrates the operation flow of the present invention. When interrupt generation is checked (S101), when the first interrupt signal S1 is generated, data of the second timer 23b is output and the first timer 23a is shown. The data is loaded into the data, and when the second interrupt signal S2 is generated, the data of the first timer 23a is output, and the data is loaded into the second timer 23b (S102) (S103).

After performing steps S102 and S103, it is determined whether the watch overflow signal S12 is generated by the watch dog timer 22e (S104). When the counter overflow signal S12 is not generated, the watch dog Data corresponding to the interrupt period is loaded into the internal counter of the timer 22e, and when the counter overflow signal S12 is generated, the clock generator 22d is disabled, and the first and second timers 23a, 23b and The clock input to the watch dog timer 22e is disabled to prohibit the output (S105) (S106).

As described above, the present invention simplifies the circuit by adopting a programmable logic device (PLD) in the logic circuit, replacing the conventional hardware with software, and detecting abnormal operation of the NC by using a watch dog timer. By controlling the control signal transmitted to the outside it is possible to prevent the trouble to the external circuit due to the abnormal operation of the NC.

Claims (4)

An input buffer unit for buffering address and data and control signals from the NC, a controller for receiving an interrupt signal from the NC and generating an interrupt signal, a clock generator for generating a clock under control of the controller, every A processing unit having a watch dog timer for loading a data corresponding to the interrupt period into an internal counter for each interrupt and starting counting with a clock signal of the clock generating unit and generating a counter overflow signal in case of abnormal operation of the NC; And a timer unit for loading and outputting data to be output and disabling the output when a counter overflow signal of the watch dog timer is generated. The address decoder of claim 1, wherein the processor is configured to decode an address signal from an input buffer unit in accordance with a control signal from the input buffer unit, and an address and data from the input buffer unit are temporarily stored according to decoding of the address decoder. Servo interface device for a wire cut electric discharge machine characterized in that it further comprises a register to be stored. The servo interface device of claim 1, wherein the timer unit comprises first and second timers that alternately load and output data when the interrupt signal is generated. 4. The servo interface device of claim 3, wherein the first and second timers are programmable timers.