KR0135987B1 - A controlling circuit of pin balance - Google Patents

Abstract

Disclosed is a pin balance control circuit that generates a parabola waveform using a DC voltage of a DAC to control pin balance, which is determined by a microcomputer and a microcomputer to determine a corresponding mode using a horizontal frequency and a vertical frequency. A DAC for outputting an analog DC voltage to a circuit portion requiring adjustment according to a predetermined mode, a pin balance controller for outputting a positive or negative parabola waveform at a vertical blank signal period by comparing the analog DC voltage output from the DAC with a reference voltage; It consists of an AFC detector that corrects the pin balance by putting the positive or negative parabola waveform output from the pin balance controller on the AFC waveform detected by the horizontal output pulse, according to the analog DC voltage of the DAC operating in conjunction with the microcomputer to determine the mode. Positive or negative parabola By generating waveforms, the pin balance in any direction can be corrected with a simple circuit configuration, increasing the reliability of the product while reducing the price.

Description

Pin balance control circuit

1 is a block diagram of a conventional pin balance control circuit.

2 is a diagram showing an example of a pin balance, (a) shows an example of a pin cushion, and (d) shows an example of a barrel.

3 is a block diagram of a pin balance control circuit according to the present invention.

4 is a detailed circuit diagram of the pin balance controller of FIG. 3.

* Description of the symbols for the main parts of the drawings *

100: Micom 200: DAC

300: pin balance control unit 400: automatic frequency detection unit

500: horizontal phase control unit 600: phase locked loop portion

700: horizontal drive unit 800: hand piece output unit

900: pin cushion control unit 950: size control unit

601: low pass filter R1 to R5: resistance

C1 to C4: Capacitor 301,303: Comparator

302,304: switching part

The present invention relates to a display device, and more particularly, to determine a mode by recognizing an input synchronization frequency using a microcomputer, and to direct-current (DAC) of a digital / analog converter (hereinafter referred to as DAC) according to a corresponding mode. The present invention relates to a pin balance control circuit that generates a parabola waveform for controlling pin balance by outputting a DC) voltage and corrects the pin balance.

1 is a block diagram showing a conventional pin balance control circuit.

Referring to FIG. 1, the horizontal driver 10 drives the horizontal output unit 20 by amplifying a horizontal deflection signal generated by the oscillation circuit.

In this case, since the size of the video image of the screen varies according to the input timing formats of various modes, the size controller 40 adjusts the supply energy of the horizontal deflection coil of the horizontal output unit 20 to a size suitable for the corresponding mode.

In addition, since the fluorescent surface of the CRT is not a spherical surface, the left and right surroundings of the CRT extend beyond the center portion, and the screen is distorted.

Therefore, the S-shaped correction unit 30 connects a capacitor in series with the deflection coil of the horizontal output unit 20 so that the resonance frequency of its capacitance and the coil inductance is about 1/3 to 1/4 of the scanning frequency. Select to obtain the appropriate calibration waveform in parabolic form.

In addition, the S-shaped correction unit 30 applies a parabola voltage to DC and supplies the horizontal output unit 30 to correct the linearity of the center portion of the outer (left and right) side of the screen.

Meanwhile, when pin balance as shown in FIG. 2A or 2B occurs, the pin balance controller 50 corrects the pin balance by using the parabola waveform generated by the S-shaped corrector 30.

In this case, since the parabola waveform output from the S-shaped correction unit 30 is a unidirectional negative waveform, only the pin balance in one direction such as (a) or (b) of FIG. 2 may be corrected. That is, there was a problem in that the second (a) and (b) can not be corrected at the same time.

In addition, in the conventional DAC operating in conjunction with the microcomputer analog screen value of the monitor various screen state, that is, horizontal position, side pin cushion as shown in Fig. 2 (C), barrel as shown in Fig. 2 (D), vertical center Control vertical size.

However, the pin balance was not adjusted in the DAC.

The present invention has been made to solve the above problems, and an object of the present invention is to generate a parabolic waveform for both positive and negative directions for controlling pin balance using an analog DC voltage of a DAC operated in conjunction with a microcomputer. It is a simple circuit configuration to provide a pin balance control circuit capable of correcting a pin balance in any direction.

A feature of the pin balance control circuit according to the present invention for achieving the above object is to recognize the input synchronization signal through a microcomputer to determine the corresponding mode, and to output the control signal to the circuit portion of the rear end according to the determined mode In the pin balance control circuit of the display apparatus; A digital / analog converter for converting a digital control signal output from the microcomputer to an analog signal, a pin balance controller for outputting a parabolic waveform at a vertical blank signal period by comparing the analog DC voltage output from the digital / analog converter with a reference voltage; Automatic frequency control detection unit for outputting the parabola waveform output from the pin balance control unit to the automatic frequency control waveform detected by the horizontal output pulse and the data to move the horizontal phase of the image to the left and right in accordance with the mode determined by the microcomputer A phase with a horizontal phase control unit for outputting a signal, a phase between a frequency and a comparison frequency provided from the automatic frequency control detection unit and the horizontal phase control unit, and outputting a pulse having a pulse width according to a phase difference to synchronize an output frequency with an input frequency. Phase to output It consists of a synchronous loop means (PLL) and horizontal deflection means for correcting the pin balance by controlling the current of the horizontal deflection coil after amplifying the output frequency of the phase synchronous loop means.

Hereinafter, a preferred embodiment of the pin balance control circuit according to the present invention will be described in detail with reference to the accompanying drawings.

3 is a block diagram of the pin balance control circuit according to the present invention, and FIG. 4 is a detailed circuit diagram of the pin balance control unit 300.

Referring to FIG. 3, when the horizontal synchronization signal (H-Sync) and the vertical synchronization signal (V-Sync) according to the mode are input to the microcomputer 100, the microcomputer 100 receives the horizontal and vertical synchronization signals (H-Sync). Mode is determined according to the polarity of V-Sync) and frequency differences of horizontal and vertical synchronization signals, and a control signal is output to the DAC 200 to control the state of the monitor according to the determined mode.

The DAC 200 converts the output of the microcomputer 100 into an analog value in order to adjust each state of the monitor in response to the determined mode, that is, the pin balance control unit 300 and the horizontal phase control unit 500. The pin cushion control unit 900 outputs an analog DC voltage.

At this time, the horizontal phase unit 500 adjusts the data output from the DAC 200 using a time constant circuit element, etc. in order to move the horizontal image of the CRT display screen to the left and right according to the determined mode, the phase locked loop. Output to negative (Phase Lock Loop; hereinafter referred to as PLL) 600.

The PLL 600 compares an input frequency with a phase of a comparison frequency output from a voltage controlled oscillator in the PLL 600 and outputs a pulse having a pulse width according to the phase difference to always synchronize the output frequency with the input frequency. The low pass filter 601 converts the output of the PLL 600 into DC and feeds it back to the voltage controlled oscillator of the PLL 600.

The horizontal driver 700 amplifies the output frequency of the PLL 600 and then operates the horizontal output unit 800 to perform horizontal deflection corresponding to the determined mode.

On the other hand, the pin cushion control unit 900 generates a Pabarbola waveform by using the analog DC voltage of the DAC 200, and by reducing the deflection current of the upper and lower sides of the screen by personal adjustment of the parabola waveform Correct distortion of the screen such as pin cushion or barrel as shown in FIG.

In addition, since the size of the video image of the screen varies according to the input timing formats of the various modes, the size control unit 950 controls the size suitable for the mode by adjusting the supply energy of the horizontal deflection coil of the handpiece output unit 800.

On the other hand, the pin balance control unit 300 generates a parabolic waveform in a pin balance direction using the analog DC voltage of the DAC 200 and then detects an automatic frequency control (hereinafter referred to as AFC). Output to unit 400.

That is, as shown in FIG. 4, the analog DC voltage of the DAC 200 is input to the inverting terminal (-) of the first comparator 301 through the buffer resistor R1.

In this case, the reference voltage is input to the non-inverting terminal (+) of the first comparator 301 by the resistors R2 and R3 that divide the power supply voltage B + to generate a reference voltage.

In addition, the capacitor C1 is connected between the inverting terminal (-) and the output terminal of the first comparator 301 to make the DC waveform of the DAC 200 into a sawtooth wave.

Accordingly, the first comparator 301 outputs a positive sawtooth wave when the output voltage of the DAC 200 input to the inverting terminal (-) is greater than the reference voltage input to the non-inverting terminal (+), and the output voltage is a reference voltage. If smaller, outputs a negative sawtooth wave.

At this time, the first switching unit 302 connected in parallel with the condenser C1 is switched by the vertical blank signal V-Blank to convert the period of the sawtooth wave output from the first comparator 301 into a period of the vertical blank signal. Match.

On the other hand, the sawtooth wave output from the first comparator 301 is input to the inverting terminal (-) of the first comparator 303 after the dc voltage is blocked by the capacitor (C2) and the resistor (R2).

In this case, the non-inverting terminal (+) of the second comparator 303 is provided with a reference voltage obtained by dividing the power supply voltage B + by the resistors R2 and R3.

Accordingly, the second comparator 303 outputs a positive parabola waveform when the positive sawtooth wave is output from the first comparator 301, and outputs a negative parabola waveform when the negative sawtooth wave is output.

Here, the second comparator 303 adjusts the charge and discharge time of the capacitor C4 connected between the inverting end (-) and the output end to determine the slope of the parabola waveform, and determines the slope of the parabola waveform by the vertical blank signal V-Blank. The period of the output waveform of the second comparator 303 is determined by the second switching unit 304 that is switched.

At this time, since the first and second switching units 302 and 304 are switched by the vertical blank signals V-Blank, the periods of the output waveforms of the first and second comparators 301 and 303 are vertical and horizontal blank signals V-Blank. Coincides with the period of.

The parabolic waveform output from the second comparator 303 is output to the AFC detector 400 after the DC voltage is cut off by the resistor R5 and the capacitor C4.

The AFC detection unit 400 corrects the pin balance by loading the parabola waveform output from the second comparator 303 in the vertical blank signal period on the AFC waveform detected by the horizontal output pulse to the PLL 600.

As such, the fill balance control unit 300 outputs a positive or negative parabola waveform according to the output of the DAC 200, so that the pin balance in both directions as shown in FIG. do.

As described above, according to the pin balance control circuit according to the present invention, by generating a positive or negative parabolic waveform in accordance with the analog DC voltage of the DAC operating in conjunction with the microcomputer to determine the mode by the horizontal and vertical synchronization frequency according to the mode The simple circuit configuration can correct the pin balance in any direction, reducing the price and increasing the reliability of the product.

Claims (2)

In the pin balance control circuit of a display device that recognizes an input synchronization signal through a microcomputer and determines a corresponding mode, and outputs an adjustment signal to a circuit part of the rear stage according to the determined mode, the digital control signal output from the microcomputer is converted into an analog signal. A digital balance controller, a pin balance controller for outputting a parabolic waveform at a vertical blank signal period by comparing the analog DC voltage output from the digital converter to a reference voltage, and a parabola waveform output from the pin balance controller; An automatic frequency control detector configured to output the automatic frequency control waveform detected by the output pulse, and output the data for shifting the horizontal phase of the image from side to side in accordance with the mode determined by the microcomputer; Control detector and horizontal A phase-locked loop unit (PLL) for repeatedly comparing the phases of the frequency and the comparison frequency provided from the phase controller and outputting a pulse having a pulse width according to the phase difference, and outputting the output frequency in synchronization with the input frequency; A pin balance control circuit of a display device, characterized in that it comprises a horizontal deflection means for correcting the pin balance by controlling the current in the horizontal deflection coil after amplifying the output frequency; The first comparator of claim 1, wherein the pin balance control unit compares an analog DC voltage of the digital to analog converter with a power supply voltage divided by a voltage divider, and outputs a positive or negative sawtooth wave, and an input terminal of the first comparator. Period of the sawtooth wave of the first comparator, connected between the first capacitor and the output terminal of the first comparator to determine the inclination of the sawtooth wave by the charge / discharge time, and the input and output terminals of the first comparator, and are switched by a vertical blank signal. A first switching unit for matching the period of the vertical blank signal to a second comparator for outputting a parabola waveform to the automatic frequency controller by comparing the output voltage of the first comparator with the power voltage divided by the voltage divider resistor; The parabolic waveform is connected between an input terminal and an output terminal of the second comparator by charge and discharge time. A second capacitor for determining a slope and a second switching unit connected between an input terminal and an output terminal of the second comparator and switched by a vertical blank signal to match a period of a parabola waveform of the second comparator with a period of a vertical blank signal. And a pin balance control circuit of the display device.