KR0135728B1 - Method for driving solid state imaging device - Google Patents

Abstract

The present invention provides a driving method which can reverse the signal output difference between lines in a two-line simultaneous read type solid-state imaging device having a field memory above and below a photosensitive area and outputting each field independently.

To this end, in the present invention, the vertical transfer directions of signal charges of the odd-numbered photosensitive pixel group and the even-numbered photosensitive pixel group in the vertical direction of the photosensitive region 1 are reversed for each VBL. The signal charges of the vertical odd pixel group and the vertical superior pixel group transmitted to the horizontal transmission paths 6 and 7 by the vertical transmission arc 3 are transmitted from the same detection detection circuit 8 or 9 to each field (ODD and then EVEN field). By alternately outputting, the influence of the output fluctuations between the charge detection circuits is eliminated.

Description

Driving Method of Solid State Imaging Device

1 is an explanatory diagram of a method of driving a solid state imaging device according to a first embodiment of the present invention.

2 is a schematic timing diagram of a solid state imaging device according to a first embodiment of the present invention.

3 is an explanatory diagram of a driving method of the solid state imaging device according to the second embodiment.

4 is a schematic timing diagram of a solid state imaging device according to a second embodiment.

5 is a schematic timing diagram of a solid state imaging device according to a third embodiment.

6 is a schematic timing diagram of a solid state imaging device according to a fourth embodiment.

7 is a schematic timing diagram of a solid state imaging device according to a fifth embodiment.

8 is a sectional view of the present invention and a conventional solid state imaging device.

9 is a sectional view of the present invention and a conventional solid state imaging device.

10 is a cross-sectional view of the present invention and a conventional solid state imaging device.

11 is an explanatory diagram of a driving method of a conventional solid state imaging device.

12 is a schematic timing diagram of a conventional solid state imaging device.

* Explanation of symbols for main parts of the drawings

1: photosensitive area 2: photosensitive pixel

3, 31, 32, 33: vertical transmission path 4: first storage area

5: 2nd accumulation area 6: 1st horizontal transmission path

7: 2nd horizontal transmission line 8: 1st charge detection circuit

9: second charge detection circuit 11, 111: first FS pulse

12, 121: 2FS pulse 13, 131: 1st field transfer pulse

14, 141: second field transfer pulse 15: cyclic transfer pulse

16: discharged transfer pulses 17, 171, 18: accumulated charge clear pulse

[Industrial use]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid state image pickup device, and more particularly, to a method of driving a solid state image pickup device having a field memory in contact with a photosensitive area and capable of simultaneously reading two lines.

[Traditional Technology and Problems]

Among solid-state imaging devices using charge transfer devices, CCD area sensors, for example, can achieve high resolution and are used in broadcast CCDs, high-definition public welfare CCDs, electronic still cameras, and the like. 8 is a plan view of a solid-state imaging device such as an area sensor capable of simultaneously reading two lines in a field memory in contact with a conventional photosensitive area used in the present invention. FIG. 11 shows an operation diagram of the conventional driving method for the solid wall apparatus shown in FIG. 8, and a schematic timing chart thereof is shown in FIG. In the photosensitive region 1 of this solid wall-shaped device, photosensitive pixels 2 for photoelectric conversion and accumulation of incident light are arranged two-dimensionally in the row direction and the column direction. A vertical transfer path 3 is provided between the vertical photosensitive pixel columns of the two-dimensionally arranged photosensitive pixel group. One transmission end of the vertical transmission path 3 is composed of two vertical photosensitive pixels.

Above and below the photosensitive region 1, a first accumulation region 4 and a second accumulation region 5 capable of storing signal charges for one field are provided, respectively. A plurality of vertical transmission paths 31 and 32 are disposed in the first storage area 4 and the second storage area 5, respectively, and are connected to the vertical transmission paths 3 of the photosensitive areas 1, respectively. . On the side opposite to the photosensitive area 1 of the first accumulation area 4 and the second accumulation area 5, there is a first horizontal transmission path 6 and a second horizontal transmission path 7, respectively. First and second charge detection circuits 8 and 9 are provided at one end. Here, the first storage region 4 is a cyclic transmission path in which the transmission stages are connected in a loop so that the arrangement order of the photosensitive pixels in the photosensitive region can be replaced.

Next, a transfer operation method of the solid state imaging device will be described. This solid-state imaging device can generally obtain signal information of a vertical telephone station in one field period. Since the vertical transfer paths 3 form two photosensitive pixel 1 transmission stages arranged vertically, in the vertical blanking VBL, first, in the vertical direction, for example, the first photosensitive pixel group (hereinafter referred to as the first pixel group). The first FS pulse 11 shown in FIG. 12 to the first accumulation region 4. Thereafter, the first field pulse 12 reads the signal charges from the uppermost photosensitive pixel group (hereinafter referred to as the second pixel group) in the vertical direction to the vertical transfer 3 in the vertical direction, so that the second field transfer pulse 14 is read. The second storage area 5 is transmitted to the second storage area 5 by. At this time, the signal charge of the first accumulation region 4 is cyclically transmitted by the pulse 915 so as to invert the order of the photosensitive pixels in the vertical direction. In addition, the signal charges of the first and second accumulation areas 4 and 5 are transferred to the horizontal transmission paths 6 and 7 by one transmission stage in synchronization with the horizontal scanning, and the same operation is performed in the next vertical blanking VBL. This is repeated. In addition, an outgoing transmission pulse 15 is applied in front of the first FS pulse 11 to remove false signals such as smear and dark current in the vertical transmission path 3.

In the above-described method of driving a solid-state imaging device, the radix and even photosensitive pixels in the vertical direction of the photosensitive area are always output from different detection circuits, so that the gain and the f characteristics of the detection circuit due to variations in processing shape or difference in design shape are determined. Unbalance is generated to generate an output difference between scan lines even in the same field or between fields.

[Purpose of invention]

SUMMARY OF THE INVENTION The present invention has been made in view of the above point, and in a two-line simultaneous readout solid-state imaging device having a field memory above and below a photosensitive area and outputting each field independently, the signal output difference between lines can be suppressed. It is an object of the present invention to provide a method of driving a solid state imaging device.

[Configuration of Invention]

According to the present invention, each of the vertical blanking group (VBL) of the photosensitive pixel group (hereinafter referred to as the vertical pixel group) in the vertical direction of the photosensitive region and the even-numbered photosensitive pixel group (hereinafter referred to as the vertical excellent pixel group) A method of driving a solid-state imaging device is characterized by inverting the vertical transfer direction of signal charges and outputting the signal charges of the vertical excellent pixel group from the same detection circuit to each field from the same detection circuit. In this driving method, the accumulated charge of the photosensitive pixel group in the photosensitive region is eliminated by the accumulated charge clear pulse.

That is, in the method for driving a solid-state imaging device according to the present invention, a photosensitive pixel for temporarily measuring signal charges generated by photoelectric conversion of incident light is two-dimensionally arranged in a row direction and a column direction to read out the signal charges in a column direction. A cyclic path in which a vertical transmission path for transmitting a signal is transmitted to the first photosensitive region provided between the photosensitive pixel rows in the row direction and the first ends of the plurality of vertical transmission paths provided in the photosensitive region, and the transmission terminal is connected in a loop shape. The signal charge is carried out on a side opposite to the photosensitive region of the first charge accumulation region, the first charge accumulation region having a transmission path, a second charge accumulation region having a transmission path provided at each second end of the vertical transmission path, and the photosensitive region of the first charge accumulation region. The first horizontal transmission path having a first charge detection circuit for transmitting the signal charge at one end thereof and converting the signal charge into an electrical signal, and the photosensitive area of the second charge accumulation area. A solid-state imaging device having a second horizontal transfer path having a second charge detection area for transmitting the signal charges in a row direction to one side and converting the signal charges into an electrical signal at one end thereof. After the signal charge of the first pixel group composed of vertically-oriented photosensitive pixels is transferred to the first charge accumulation region, the signal line of the second pixel group composed of photosensitive pixels in the vertically good row of the photosensitive region is transmitted. Transferring charges to the second charge accumulation region, transferring signal charges of the first pixel group to the second charge accumulation region, and transferring the second pixel group to the first charge accumulation region. Each field is alternately performed.

The second pixel group transmits signal charges to the second charge accumulation region after the signal charges of the first pixel group are transferred to the first charge accumulation region, and the signal of the second pixel group is transmitted. Transfer of charge to the second charge storage region and transfer of the first group of pixels to the second charge storage region may be performed alternately for each field.

The second charge storage region includes a transmission path to which a transmission end is connected in a loop phenomenon.

Further, the signal charge of the first pixel group is transmitted to the first charge accumulation region by a first read pulse, and then the signal charge of the second pixel group is transmitted to the second charge accumulation region by a second read pulse. Thereafter, applying an accumulated charge clear pulse to exclude at least one of the accumulated charges of the first and second pixel groups, and accumulating the signal charges of the second pixel group with the first read pulses. And transfer the first digestion group to the second charge accumulation region with the second read pulse, and then accumulate charge clear pulse to apply at least one of the accumulated charges of the first and second pixel groups. The operation of excluding may be alternately performed for each field.

The charge accumulation period from the application of the accumulated charge clear pulse to the first or second read pulse in the next field can be set equally in the first pixel group and the second pixel group.

It is also possible to apply the accumulated charge clear pulses excluding signal charges of the photosensitive pixel group in the photosensitive region to the semiconductor engine in which this solid-state imaging device is formed. Furthermore, the charged charge clearing pulses consist of first and second accumulated charge clearing pulses, the former is applied to the semiconductor engine in which the solid state imaging device is formed, and the latter is placed on either of the first and second pixel groups. Can be applied.

(Action)

In the present invention, the signal charges of the vertical odd pixel group and the vertical excellent pixel group can be output for each field from the same detection circuit by inverting the vertical transfer directions of the signal charges of the vertical odd pixel group and the vertical excellent pixel group. Further, by accumulating the 3FS pulse (accumulated charge clear pulse) and making the accumulation time of the vertical odd pixel group and the even pixel group equal, the photoelectric conversion output voltages output from the two detection circuits can be made equal.

(Example)

Hereinafter, embodiments of the present invention will be described in detail with reference to exemplary drawings.

First, the first embodiment will be described with reference to FIGS. 1, 2 and 8.

FIG. 8 is a plan view of a solid state imaging device which simultaneously reads two lines simultaneously with field memories above and below the photosensitive area, FIG. 1 is a plan view for explaining the operation thereof, and FIG. 2 is a schematic timing chart thereof. In the photosensitive region 1 shown in FIG. 8, a plurality of photosensitive pixels 2 are vertically and horizontally arranged to constitute a plurality of photosensitive pixel rows (hereinafter referred to as vertical pixel rows). A vertical transfer path 3 is formed between each photosensitive pixel column. The photosensitive area | region 1 is equipped with the pixel group which consists of the odd photosensitive pixel group (1st pixel group) of a perpendicular direction, and the best photosensitive pixel group (1st pixel group) of the same direction. The solid state imaging device having such a configuration is constructed at the timing shown in FIG. Composite Blanking (CBL) is a system timing that synchronizes TV scanning of this solid-state imaging device. Below, the representative pulse train applied to each area according to the timing is shown.

Like the first and second accumulation regions, the photosensitive region is usually driven by four-phase pulses V1, V2, V3, and V4. Representative pulses of the first and second pixel groups shown in FIG. 2 are V1 and V3, respectively. First, when the vertical blanking (VBL) of the ODD field, which is the first field, the false signal in the vertical transmission path is excluded by the output transmission pulse 16, and then the first pixel group (vertical machine) is started by the first FS pulse 11 at the start tl. The signal charge is read out from the group of hydrides and transmitted upward by the first field transfer pulse 13 to the first accumulation region 4. Thereafter, at time t2, the signal charge is read out from the second pixel group (vertical pixel group) by the second FS pulse 12, and is transmitted downward by the second field transfer pulse 14 to the second accumulation region 5. Is done. In the meantime, the signal charge in the first accumulation region 4 is cyclically transmitted so that the sequence of the photosensitive pixels can be reversed and output. At this time, the signal charges from the vertical odd pixel group are in the first accumulation region 94 and the signal charges of the vertical superior pixel group are in the second accumulation region 5. The signal charges in the first and second accumulation regions are transferred to the horizontal transfer paths 6 and 7 by the subsequent line shift operation, and are simultaneously output as electrical signals in time series from the respective charge detection circuits 8 and 9.

After the false signal in the vertical transmission path 3 is eliminated by the ejection transmission pulse 16 at VBL of the next EVEN field, the signal charge is read out from the vertical pixel group by the first FS pulse 11 at time tl1, The lower field transfer is performed by the first field transfer pulse 31 to the second accumulation area 5. Thereafter, at time tl2, signal charges are read out from the vertical superior pixel group by the second FS pulse 12, and the upper field is transferred upward by the second field transfer pulse 141 to the first accumulation region 4. Furthermore, the signal charges of the vertical pixel group are accumulated in the first accumulation region 4 and the signal charges of the vertical cardinal pixel group are accumulated in the second accumulation region 5. Thereafter, the signal charges of the first and second accumulation regions are transferred to the respective horizontal transmission paths 6 and 7 by line shift operation as described above, and are simultaneously transmitted as electrical signals in time series from the respective charge detection arcs 89. Is output. Therefore, signal charges of the vertical odd pixel group and the even pixel group are output for each field from each charge detection circuit. The operation of each of these fields is repeated alternately.

In this embodiment, since the second field transfer 141 and the cyclic transfer 15 are performed in the first accumulation area 4 of the EVEN field, the duration of the transmission becomes slightly longer. Therefore, in order to end the entire transmission in the limited VBL period, the outgoing transmission 16 irrelevant to the transmission of the signal charges is further accelerated to shorten the outgoing period. Here, although the outgoing transmission frequency is about 1.3 MHz, the field transmission frequency and the cyclic transmission frequency are about 0.5 MHz, of course, this value is not limited.

Next, a second embodiment will be described with reference to FIGS. 3 and 4. 3 is a sectional view of a solid state imaging device for explaining the driving method, and FIG. 4 is a schematic timing chart thereof. In the ODD field VBL, after the false signal in the vertical transmission path 3 is eliminated by the outgoing transmission pulse 16, the signal charge is read out from the vertical superior pixel group by the first FS pulse 111 at the time tl1, One field transfer pulse 13 transfers the upper portion to the first accumulation area 4. Thereafter, at time tl2, the signal charge is read out from the vertical odd pixel group by the second FS pulse 12, and the second field transfer pulse 14 transfers the signal charge downward to the second accumulation region 5. As shown in FIG. In the meantime, it is cyclically transmitted so that the reverse charge of the signal charges in the first accumulation region 4 can be reversely accumulated.

At this time, the signal charge of the vertical superior pixel group is accumulated in the first accumulation region 4 and the signal charge of the vertical odd pixel group is accumulated in the second accumulation region 5. Thereafter, as described above, the signal charges in the first and second accumulation regions are transferred to the respective subchannels 6 and 7 by the line shift operation, and are signaled in time series from the respective charge detection circuits 8 and 9. It is output simultaneously as a charge. Therefore, signal charges of the vertical odd pixel group and the vertical superior pixel group are output for each field from each charge detection circuit.

In this embodiment, the signal charges are transmitted to the first accumulation area 4 which performs cyclic transmission so that the ODD field and the EVEN field are the first field transmission so as to shorten the outgoing transmission period.

Next, a third embodiment will be described with reference to FIGS. 3 and 5. FIG. In the above-described embodiment, since the first FS pulse and the second FS pulse read out the signal charge by replacing the vertical odd pixel and the vertical superior pixel for each field, the signal charge accumulation period is the first field of the next field from the first FS pulse in the odd pixel. A period T1 of up to 2 FS pulses is set, and a period T2 from the second FS pulse to the first FS pulse of the next field in the even pixel. In the next field, the accumulation period of the cardinal pixels is T2, and the accumulation period of the even pixels is T1. In other words, the charge accumulation periods of the odd and even pixels differ from field to field, resulting in an output voltage difference of the photoelectric conversion characteristics of the two charge detection circuits. In this case, the gain correction after the charge detection circuit needs to be performed by an external circuit, and the circuit configuration of the system shape becomes complicated. For example, in the case where the field transmission frequencies 13 and 14 are driven at 900 Hz, the accumulation time difference between T1 and T2 is about 580 Hz, generating about 4% photoelectric conversion output voltage difference (see FIG. 4).

This unnecessary charge is discarded by the outgoing transmission 16 of the next EVEN field. From the charge detection circuits 8 and 9, two lines are independently output as time series electric signals in parallel with the line shift operation. After the false signal in the vertical transmission path 3 is eliminated by the ejection transmission pulse 16 at the VBL of the next EVEN field, the signal charge is read out from the vertical superior pixel by the first FS pulse 111, and the first field transmission is performed. (13), upward transmission is performed to the first accumulation region 4. Thereafter, the signal charge is read out from the vertical radix pixel by the second FS pulse 121, and the second field transfer pulse 14 transfers the signal charge downward to the second accumulation region 5. As shown in FIG. In the meantime, the cyclic transmission is performed so that the order of the signal charges in the first accumulation region 4 can be reversed. At this time, the signal accumulation of the vertical superior pixel is accumulated in the first accumulation region 4 and the signal charge of the vertical odd pixel is accumulated in the second accumulation region 5. After completion of the second field transfer, the accumulated charge clear pulse 171 reads out the charges (unnecessary charges) accumulated and photoelectrically converted into the vertical superior pixels. The charge read out by the accumulated charge clear pulse 171 in parallel with the transfer of the signal charges of the first and second accumulation regions 4 and 5 to the horizontal transfer paths 6 and 7 by the subsequent line shift operation, respectively. (Unnecessary charge) is also sequentially transferred to the second accumulation 5. This unnecessary charge is discarded by the outgoing transmission 16 of the next ODD field. From the charge detection circuits 8 and 9, two lines are independently output as time series electric signals.

As described above, the vertical radix pixel and the vertical superior pixel are output from each charge detection circuit for each field, but the accumulation time of the vertical radix pixel is the period T3 from the accumulated charge clear pulse to the second FS pulse and the first FS from the second FS pulse. While the period T4 until the pulse is repeated for each field, the accumulation time of the vertical superior pixel is defined as the period T4 from the second FS pulse to the first FS pulse and the period T3 from the accumulated charge clear pulse to the second FS pulse. Repeated for each field. In this way, in this embodiment, the accumulation times T3 and T4 are equalized so that the accumulation times of the vertical radix and the even pixel are made to coincide. As shown in Fig. 5, by setting the third FS pulse (accumulation clear pulse), the accumulation time of the vertical radii-sensitized pixels and the even-sensitized pixels can be made equal, and the photoelectric conversion output voltages output from the two detection circuits are made equal. It can be done. As a result, gain correction of the detection circuit output becomes unnecessary, thereby facilitating the system configuration.

Next, a fourth embodiment will be described with reference to FIG.

In this embodiment, the accumulated charge (unnecessary charge) is eliminated in the first and second photosensitive pixels by the accumulated charge clear pulse 17. The period T31 from the accumulated charge clear pulse 17 to the second FS pulse is equal to the period T41 from another accumulated charge clear pulse 171 to the first FS pulse so that the vertical radix and the even pixel accumulation time are equalized. Matching. If the relationship of T31 = T41 is maintained, sensitivity can be adjusted by arbitrarily setting the accumulation time.

Next, a fifth embodiment will be described with reference to FIG.

In the above-mentioned embodiment, the accumulated charge clear pulse 17 reads out unnecessary charges into the transfer path, whereas in the present embodiment, the accumulated charge clear pulse 18 is read out of an underflow pixel (OFD), i.e., solid state imaging. By applying the signal drop from the photosensitive pixel once to the semiconductor engine in which the device is formed, the accumulation time difference between the first FS pulse and the second FS pulse is reduced. In this case, the accumulation time of the vertical radix pixel is repeated for each field in the period T5 from the accumulated charge clear pulse 18 to the second FS pulse and from the accumulated charge clear pulse 18 to the first FS pulse. On the other hand, the accumulation time of the good photosensitive pixel is repeated for each field in the period T6 from the accumulated charge clear pulse 18 to the first FS pulse and the period T5 from the accumulated charge clear pulse 18 to the second FS pulse. In this example, the signal charge accumulation time can be arbitrarily explained.

In this embodiment, the signal difference between the two detection circuits cannot be zero (0), but the signal difference of the conventional example (T1, T2 in FIG. 4) can be set to 1/2. This signal difference can also be made small by increasing the field transmission frequency. Furthermore, the period (T51) from the accumulated charge clear pulse 17 to the second FS pulse by applying the accumulated charge clear pulse 17 to either the first or second pixel group after application of the accumulated charge clear pulse 18. Can be shortened, and by setting T51 = T6, the accumulation time of the first and second pixel groups can be matched.

The present invention can also be applied to a method for driving a solid-state imaging device having the structure shown in FIGS. 9 and 10. The solid-state imaging device of FIG. 9 differs from the previous embodiment in that no accumulation region under the photosensitive region is formed. In the photosensitive region 1, the photosensitive pixels 2 are two-dimensionally arranged in the row direction and the column direction. A vertical transfer path 3 is provided between each vertical pixel column constituted by the two-dimensionally arranged pixel group. On the photosensitive region 1, a first accumulation region 4 capable of storing signal charges for one field is provided. A plurality of vertical transmission paths 31 are arranged in the first storage area 4, and are connected to the vertical transmission paths 3 of the photosensitive area 1, respectively. In addition, there is a first horizontal transmission path 6 and a second horizontal transmission path 7 opposite the photosensitive area 1 of the first accumulation area 4 and below the photosensitive area 1. The first and second charge detection circuits 8 and 9 are provided in the chamber. Here, the first storage area 4 is a cyclic transmission path in which the transmitting ends are connected in a green shape so that the arrangement order of the photosensitive pixels in the photosensitive area can be replaced. Since the solid state imaging device is configured as described above, unlike the solid state imaging device shown in FIG. 8, it is unnecessary to apply a transfer pulse for transmitting signal charge to the second accumulation region. In this example, however, the accumulation time of the first and second pixel groups cannot be matched.

The solid state image pickup device of FIG. 10 has a feature that a cyclic transmission path is formed in any accumulation area. In this solid-state imaging device, in the photosensitive region 1, photosensitive pixels 2 for photoelectric conversion and accumulation of incident light are arranged two-dimensionally in the row direction and the column direction.

A vertical transfer path 3 is provided between the vertical photosensitive pixel columns of the pixel group. Above and below the photosensitive region 1, a first accumulation region 4 and a second accumulation region 5 capable of storing signal charges for one field are provided, respectively. A plurality of vertical transmission paths 31 and 33 are disposed in the first storage area 4 and the second storage area 5, respectively, and are connected to the vertical transmission path 3 of the photosensitive area 1, respectively. . Moreover, on the opposite side to the photosensitive area 1 of the 1st accumulation area 4 and the 2nd accumulation area 5, there exists a 1st vertical transmission path 6 and the 2nd horizontal transmission path 7, The first and second charge detection circuits 8 and 9 are provided in the chamber. The first and second storage areas 4 and 5 are cyclic transmission paths in which the transmitting end is connected in a loop so that the arrangement order of the photosensitive pixels in the photosensitive area can be replaced. In this cyclic transmission, transmission can be performed in either of the left and right directions, and cyclic transmission can be performed in the opposite directions. The cyclic transmission may not be performed in the cyclic transmission path. The cyclic transmission may be a right turn transmission or a left turn zone transmission, so that the most efficient transmission method can be selected. In this case, however, in order to match the accumulation time of the first and second pixel groups, it is necessary to omit the line shift pulse of the photosensitive region 1.

By the above driving method, since the signals of the vertical odd pixel and the vertical superior pixel are output for each field from the same charge detection circuit, the signals of the two fields are equalized in the same charge detection circuit. As a result, when one reproduction screen is formed by using the uniform signals of these telephone detection circuits, the signal shift between the scanning lines can be suppressed by eliminating the influence of the characteristic variation between the charge detection circuits. Further, after obtaining the resolution information, signal processing for adding and combining the output signals of two lines of the same field is performed, whereby a video signal having twice the dynamic range and high vertical resolution can be obtained.

The transfer operation of the solid state imaging device according to the present invention is performed based on the timing chart CBL shown in FIG. 2 as an example. In this timing chart, the vertical blanking (VBL) period and the horizontal blanking (HBL) period appear alternately, and during the VBL period, the transfer of signal charges from the photosensitive pixels of the photosensitive area to the vertical transfer path and the vertical transfer operation are performed. The transfer order is changed by click transfer. The signal charges can be horizontally transferred in the next HBL period and output to the outside. By repeating the vertical and horizontal transfers using the blanking period in this manner, the telephone station can be output to the outside independently in one field period. In addition, by performing vertical and horizontal transfers using the blanking period, it is possible to prevent the pulses controlling the transfer operation from being mixed into the output during the read periods of the signal charges.

In the above embodiment, the signal charges from the photosensitive pixels in the first row are first transmitted, and then the signal charges are transmitted from the photosensitive pixels in the even row, but the order may be reversed.

[Effects of the Invention]

According to the above-described configuration, since the signals of the vertical photosensitive pixels and the excellent photosensitive pixels are outputted from the same charge detection circuit to each field, one reproduction screen is generated using two field signals of the same charge detection circuit. By forming it, it is possible to suppress the influence of the characteristic variation between the charge detection circuits and to suppress the deviation between the scanning lines.

In addition, by accumulating the accumulation time of the vertical radii-sensitized pixels and the good-sensitized pixels by making charge accumulation clear pulses, the photoelectric conversion output voltages output from the two detection circuits can be equalized, and gain correction of the detection circuit output is unnecessary. System configuration becomes easy

Claims (7)

A photosensitive pixel that temporarily accumulates signal charges generated by photoelectric conversion of incident light is two-dimensionally arranged in a row direction and a column direction, and a vertical transmission path that reads the signal charges and transmits them in the column direction is disposed between the photosensitive pixels in the row direction. A first storage area having a photosensitive area provided at the first side, and a first transmission area provided at each of the first ends of the plurality of vertical transmission paths provided in the photosensitive area, wherein the transmission end is connected in a loop shape, the vertical transmission path A second accumulation region having a transmission path provided at each second end of the first storage region, the signal charge in the row direction on the side opposite to the photosensitive region of the first accumulation region, and converting the signal charge into an electrical signal at one end thereof; A first horizontal transfer path having a first charge detection circuit and a signal charge in the row direction on the opposite side to the photosensitive region of the first charge accumulation region; A solid-state imaging device having a second horizontal transfer path having a second charge detection circuit for converting signal charges into an electrical signal, wherein the first pixel group comprises a photosensitive pixel of a vertical row in each vertical direction of the photosensitive area. After the charge is transferred to the first accumulation region, the signal charge of the second pixel group composed of photosensitive pixels in the even row in the vertical direction of the photosensitive region is transferred to the second charge accumulation region. And transmitting the signal charges of the first pixel group to the second accumulation region and transmitting the second pixel group to the first accumulation region alternately for each field. A method of driving an imaging device. The method of claim 1, further comprising: transmitting signal charges of the first pixel group to the first accumulation region, and then transmitting signal charges of the second pixel group to the second accumulation region; And transmitting the signal charges to the first storage area and transferring the first group of pixels to the second storage area alternately for each field. The method of driving a solid state image pickup apparatus according to claim 1, wherein the second accumulation area has a transmission path in which a transmission end is connected in a loop shape. The signal storage device of claim 1, wherein the signal charge of the first pixel group is transmitted to the first accumulation region using a first read pulse, and the signal charge of the second pixel group is transferred to the second accumulation region using a second read pulse. After transmission, applying a clear pulse to accumulate charge, thereby excluding at least one accumulated charge of the first and second pixel groups, and converting the signal charge of the second pixel group to the first read pulse. Transfer to the first accumulation region, transfer the first pixel group to the second accumulation region with the second read pulse, and apply an accumulation charge clear pulse to accumulate at least one of the first and second pixel groups. A method of driving a solid-state imaging device, characterized in that the operation of excluding charges is performed alternately for each field. 5. The charge storage period from the first pixel group to the second read pulse in the next field after applying the accumulated charge clear pulse is set equally in the first pixel group and the second pixel group. A method of driving a solid state imaging device. 5. The method for driving a solid state imaging device according to claim 4, wherein the accumulated charge clearing pulses excluding signal charges of the photosensitive pixels in the photosensitive region are applied to a semiconductor engine in which the solid state imaging device is formed. The semiconductor device according to any one of claims 4 to 6, wherein the accumulated charge clear pulses are combined with the first and second accumulated charge clear pulses, and electrons are applied to the semiconductor substrate on which the solid state imaging device is formed. The latter method is applied to either of the first and second pixel groups.