KR0135037B1 - Method of flip chip bonding using si v-groove and method of packaging thereof - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flip-chip bonding method of various optical devices for generating, detecting, modulating, and distributing light, and to packaging optical devices and optical fibers flip-chip bonded by the method. In particular, the present invention relates to a flip-chip bonding method capable of minimizing a gap between a substrate and a chip by using a silicon V-groove, and a packaging method using the same.

The present invention provides a method of forming a predetermined V-groove in a silicon substrate, forming a metal pad for solder bumps in the V-groove of the substrate, and forming solder bumps on the metal pad. And inverting a predetermined chip including an insulating film, a metal pad, and an optical device with the substrate, and applying pressure to the chip while heating the solder bump to a temperature above the melting point and reflowing. Bonding and fixing the chip; and forming a separate V-groove to which the optical fiber is to be fixed on the substrate, and then aligning the optical fiber to the separate V-groove and fixing it with an epoxy.

Description

Flip-chip bonding method of optical communication device and package method using same

1 is a schematic cross-sectional view of an optical communication device flip-chip bonded by a conventional method.

2 is a process cross-sectional view showing a flip-chip bonding method of the present invention.

3 is a schematic cross-sectional view of an optical communication device packaged by the packaging method of the present invention.

* Explanation of symbols for main parts of the drawings

10 silicon substrate 12,22 insulating film

14: V-groove 16, 26: metal pad

18 solder bump 20 optical element chip

25: light waveguide 30: optical fiber

31: fiber core

[Technical Field]

The present invention relates to a flip-chip bonding method of various optical elements for generating, detecting, modulating, and distributing light, and to packaging optical elements and optical fibers flip-chip bonded by the method. In particular, the present invention relates to a flip-chip bonding method capable of minimizing a gap between a substrate and a chip by using a silicon V-groove and a packaging method using the same.

[Background of invention]

The technology of packaging optical fibers in various optical devices for connection with an external optical communication system is an essential technology for commercializing all communication optical devices.

This packaging technology has a decisive influence on the pricing of optical communication modules.

Recently, in order to solve problems such as high manufacturing cost and low yield of such packaging technology, a packaging technology for automatically sorting chips using a Si substrate has been studied.

Since the packaging technology using the Si substrate uses a semiconductor process, it is suitable for mass production and can reduce manufacturing costs, and can also manufacture optical modules having various functions by forming glass optical waveguides on the Si substrate itself. There is an advantage.

In addition, when packaging optical devices such as semiconductor lasers and optical switches and optical fibers, consideration should be given that alignment precision in three directions of X, Y, and Z should be about 1 μm or less in order to minimize connection loss.

In order to satisfy these requirements, a laser welding method of locally irradiating and welding with a laser has been used, but the manufacturing process is complicated and the unit price is not widely used.

On the contrary, the flip-chip bonding method, which has recently been attracting attention, has been proposed as a method for maintaining the precision while maintaining a relatively simple manufacturing process and low cost.

In a flip-chip bonding method using a conventional silicon substrate, as shown in FIG. 1, a metal pad 3 capable of absorbing bonding solder is deposited on a bonding region of a silicon substrate 1 and an optical device chip 2, After depositing the solder bumps 4 having a predetermined thickness or more on the silicon substrate 1 on which the metal pads 3 are deposited, the chips 2 are turned upside down so that the two pads 3 are aligned.

Subsequently, when the solder bumps 4 are heated to a temperature above the melting point and reflowed, the solder bumps 4 are self-aligned by the surface tension of the molten solder bumps 4.

That is, in the planar direction in which the solder bumps 4 are formed, they are self-aligned with precision within about 1 μm by the surface tension of the molten solder bumps 4 to allow alignment between the optical device and the optical fiber. Similar to the error level, sufficient melting is possible.

However, in the above-described flip-chip bonding method, the alignment with respect to the horizontal axis between the substrate 1 and the chip 2 may be 1 μm or less, while the gap between the substrate 1 and the chip 2 in the longitudinal direction may be different. The alignment is difficult because it is difficult to accurately adjust the height of the solder bumps 4 after the solder is hardened.

[Purpose of invention]

The present invention has been made to solve the above problems, the object is to use a Si V-groove (groove) to maintain the precision of 1㎛ or less in the longitudinal and transverse direction while maintaining a precision between the substrate and the chip 1㎛ or less The present invention provides a flip-chip bonding method and a packaging method using the same, in which the alignment error is minimized by close contact with precision.

[Summary of invention]

In order to achieve the above object, the flip-chip bonding method using the Si V-groove of the present invention comprises forming a predetermined V-groove in a substrate using an insulating film of a predetermined pattern on a silicon substrate as a mask, and Forming a metal pad for solder bumps in the V-groove of the substrate, forming a solder bump on the metal pad, and inverting a predetermined chip including an insulating film, a metal pad, and an optical device to align the substrate with the substrate. After the step, the solder bump is heated to a temperature above the melting point to reflow (pressure) in the state of applying a pressure to the chip, characterized in that consisting of the step of contacting and fixing the substrate and the chip. According to another aspect of the present invention, after forming a separate V-groove to which an optical fiber is fixed on the substrate by using the flip-chip bonding method, the central axis of the core of the optical fiber and the light receiving or emitting portion of the optical element formed on the chip A method of packaging an optical communication device in which an optical fiber is aligned with the V-groove so that a central axis is self-aligned and fixed using an epoxy is provided.

EXAMPLE

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2 (a)-(1) are process cross-sectional views showing a flip-chip bonding method using the Si V-groove of the present invention.

First, an insulating film having a predetermined thickness is deposited on the silicon substrate 10 based on FIG. 2 (a), and then the insulating film 12 is opened by opening the insulating film using a conventional photolithography process. To form.

The material of the insulating film 12 is not particularly limited, and SiO ₂ or SiNx is preferable.

Based on FIG. 2 (b), the Si substrate 10 is etched to a predetermined depth using the insulating film 12 of the predetermined pattern as a mask.

At this time, since the etching width, the etching angle and the etching depth directly affect the alignment error of the subsequent process, precise etching control is required.

Anisotropic etching is used to reveal the (111) plane of silicon for precise V-groove 14 formation. KOH solution is used as a preferred etching solution.

According to FIG. 2 (c), after the photoresist film PR is applied onto the entire surface of the substrate 10 including the insulating film 12 and the V-groove 14, the photoresist film PR is subjected to exposure and development processes. d) A photosensitive film pattern 6 is formed as shown in FIG.

Based on FIG. 2 (e), after depositing the metal 7 having a predetermined thickness, the photoresist pattern 6 and the metal other than the V-groove 14 are subjected to a lift-off process. (7) is removed to form a predetermined metal pad 16 into which the bonding solder can be adsorbed in the V-groove 14 as shown in FIG.

Next, as a process for forming solder bumps, as shown in FIG. 2 (g), the photoresist PR of the thick film is applied, followed by exposure and development, as shown in FIG. 2 (h). The pattern 8 for solder deposition is defined.

Subsequently, after the solder metal 9 is deposited on the entire surface of the substrate (FIG. 2 (i)), the thick film pattern 8 is removed by a lift-off process in an acetone solution, so that the solder bumps 18 are formed only on the metal pad 16. ) (Second (j) diagram).

Important matters to be considered in the process is that the volume of the deposited solder bump 18 should be smaller than the volume of the V-groove 14, the solder bump in the reflow (reflow) state through a subsequent process ( The height of 18 is a condition to be controlled to be larger than the depth of the V-groove (14).

The reason for the first condition is to prevent part of the solder from overflowing the silicon V-groove 14 and spreading between the substrate 10 and the chip when the solder bumps 18 are melted in a subsequent reflow process. The reason for the second condition is that the solder bumps 18 and the pad of the chip are bonded to each other during bonding to facilitate the planar alignment with respect to self alignment.

In addition, an electroplating method may be used instead of the conventional deposition method for forming the solder bumps 18.

The solder bumps 18 are usually formed on one side of the substrate 10 or a chip to be described later, but may be formed on both the substrate 10 and the chip as necessary.

The subsequent process is to align the silicon substrate 10 having the metal pad 16, the solder bumps 18, the insulating film 2, and the like and the optical communication chip 20 through the above process. In this case, as shown in FIG. 2 (k), various optical devices (not shown) having a predetermined insulating film 22, a metal pad 26, or an optical waveguide may have a separate process. Formed through.

The chip 20 to be bonded is turned upside down so that the metal pad 26 on the chip 20 and the solder bumps 18 of the Si substrate 10 are closely aligned to face each other.

Subsequently, a reflow process is performed in an oven of nitrogen or hydrogen atmosphere for uniform composition of the deposited solder.

At this time, when the solder is heated to a temperature above the melting point, as shown in FIG. 2 (k) due to the surface tension of the molten solder, the end of the reflowed solder bumps 18 is the metal pad on the chip 20 side. Adsorbed to 26.

In the state where the solder is melted through the above process and aligned in the horizontal direction, as shown in FIG. 2 (1), the chip 20 can be completely adsorbed onto the metal pad 26 of the chip 20. ) By applying a predetermined pressure in the vertical direction to close the substrate 10 and the chip 20, and cooling and fixing the solder bumps 18 to complete the flip-chip bonding process using the Si V-groove according to the present invention. do.

FIG. 3 is a cross-sectional view illustrating a method of packaging an optical fiber for connection with an external communication system to a flip-chip bonded optical device according to the present invention, and a separate V-groove for fixing the optical fiber on the substrate is shown. After forming, the optical fiber 30 is inserted into the V-groove and fixed using epoxy or the like.

At this time, the solder bump 18 so that the central side of the core 31 of the optical fiber 30 and the light receiving or light emitting portion formed in the chip 20, for example, the central axis of the optical waveguide 25 can be self-aligned. The alignment error can be minimized by adjusting the depth and width of the V-groove 14 of the Si substrate 10 and the V-groove to which the optical fiber 30 is fixed.

As described above, according to the flip-chip bonding method using the Si V-groove and the packaging method using the same according to the present invention, the alignment accuracy is 1 μm in all directions of the X, Y, and Z axes with a relatively simple process and low cost. By controlling below, the connection loss at the time of packaging an optical communication element can be minimized.

Claims (6)

Forming a predetermined V-groove in a substrate using an insulating film of a predetermined pattern on a silicon substrate as a mask, forming a metal pad for solder bumps in the V-groove of the substrate, and forming an upper portion of the metal pad Forming a solder bump, and arranging a predetermined chip including an insulating film, a metal pad, an optical element, and the like, with the substrate, and then heating the solder bump to a temperature above the melting point to reflow the chip. A flip-chip bonding method using a Si V-groove, comprising the steps of closely applying and fixing the substrate and the chip by applying pressure. The flip-flop of claim 1, wherein the solder bump is formed to have a volume smaller than that of the V-groove to prevent the solder bump from overflowing the silicon V-groove during reflow. -Chip bonding method. The Si V-groove according to claim 1, wherein the height of the reflowed solder bumps immediately before the contact is made larger than the depth of the V-groove to facilitate the planar alignment of the substrate and the chip. Flip-chip bonding method. Forming a predetermined V-groove in a substrate using an insulating film of a predetermined pattern on a silicon substrate as a mask, forming a metal pad for solder bumps in the V-groove of the substrate, and forming the metal pad Forming a solder bump on the upper surface, inverting a predetermined chip including an insulating film, a metal pad, and an optical device to align the substrate with the substrate, and then heating the solder bump to a temperature above the melting point and reflowing it. Using a flip-chip bonding method consisting of applying a pressure to a chip to closely adhere and fix the substrate and the chip, after forming a separate V-groove to fix the optical fiber on the substrate, the central axis of the core of the optical fiber And an optical communication device package in which an optical fiber is aligned with the separate V-groove so that the central axis of the light receiving or light emitting part formed on the chip is self-aligned, and fixed using epoxy. Way. The flip-chip bonding method of claim 4, wherein the solder bump is formed to have a volume smaller than that of the V-groove to prevent the solder bump from overflowing the silicon V-groove during reflow. How to package. The flip-chip bonding method of claim 4, wherein a height of the reflowed solder bump immediately before the contact is made larger than a depth of the V-groove to facilitate the planar alignment of the substrate and the chip. Packaging method used.