KR0130485B1 - Music selecting method and device for digital audio tape recording/reproducing apparatus - Google Patents

Abstract

Song selection method of high-speed for DAT controls a drum motor by directly using PDCK signal, and constantly controls a relative speed between a tape running speed and a drum motor rotation number in order to read a signal on a tape rotating at a high-speed. The song selection method of DAT includes the steps of: determining RF envelope signal and PLL load state, controlling a rotation number of a drum motor when a high-speed song selection state is determined, making the tape running speed and a head's relative speed be identical with a relative speed in a play operation; if a relative speed of a tape speed is not proper to that of a drum rotation number is not proper by a distortion, controlling a rotation number of a drum motor; maintaining a drum speed until RF envelope signal occurs if there is no RF envelope signal, and converting a mode to a PDCK control step or a hold control step if RF envelope signal occurs.

Description

DAT high speed music selection method and device

1 is a conventional high speed selection device circuit diagram.

2 is an explanatory diagram of a travel trajectory of the head.

3 is a flow chart of a conventional high-speed selection method

(a) is a flowchart at high speed.

(b) is a flow chart at high speed rewind.

4 is a high speed selection device circuit diagram according to the present invention.

5 is a main waveform diagram for explaining the operating state in FIG.

6 is a high speed selection method flow chart according to the present invention.

* Explanation of symbols for main parts of the drawings

1: RF envelope amplifier 2: RF presence detection unit

3: PLL lock determination part 4: control part

5: divider 6,7: switch

8: counter 9 ~ 11: filter

12 ~ 14: Buffer

The present invention relates to a high speed selection method and apparatus of DAT (Digital Audio Tape), and more particularly, to a high speed selection method and apparatus of DAT for accurately reading information on a tape running at high speed when changing the high speed selection speed. will be.

The prior art configuration includes an RF envelope detector 15 for detecting the envelope of the RF signal read by the head from the tape, an RF envelope amplifier 1 for amplifying the RF envelope signal, and the presence or absence of RF, as shown in FIG. The comparator 16 converts the RF envelope signal into a logic signal so that the determination unit 2 can determine the presence or absence of the RF signal, an RF envelope counter 17 for informing the controller 4 of the number of RF envelopes, and a drum motor ( Drum speed, offset and phaser PWM signals output by the drum FG counter 18 and the controller 4 to control the drum motor 16 to know the rotation speed of the 16). Drum motor drive unit 15 for controlling the drum motor 16 with the added control signal through the integration filter (9) (10) (11) and (12) (13) (14) for integrating the In this configuration, the high speed selection, which is a big advantage of DAT, is performed. Read the information on the songs of the birth rate and only the same tape can be a selection of music where you want it at a high speed.

That is, as shown in FIG. 2, the RF envelope is used when the head moves at a constant speed higher than 8.15 mm / sec. It is possible to calculate in advance by the following equation (1) (2) how many should be generated (in Fig. 2, a degree is RF envelope produced by head B at REW and b degree is RF envelope produced by head B at FF). there is,

R = 2000 × (1 × Vt / Vh + 1). … … … … … … … … … … … (One)

E = 2000 / R × 1/4. … … … … … … … … … … … … … … … (2)

(Where R is the drum speed, Vt is the tape speed at playback, Vh is the head speed at playback, and E is the number of envelopes)

Here, the number of envelopes calculated in advance is input to the control unit 4 of FIG. 1 to compare the output signal of the RF envelope counter 17 and the preset number of RF envelopes during high-speed selection, and output drum speed and offset PWM signals so that the number is the same. Then, the speed of the drum motor was added and subtracted so as to be equal to the relative speed at the time of reproduction.

At this time, Figure 3a is a drum control flow chart for the FF high-speed selection assuming a high speed selection speed 100 times, Figure 3b is a drum control flow chart for the REW high-speed selection.

However, in the conventional technical configuration, when the high speed selection speed is changed in the DAT, the number of RF envelopes must be calculated and input to the controller again, and an error occurs in the process of adjusting the relative speed by counting the number of RF envelopes. There was a problem that an error occurred when reading the song information.

Accordingly, the present invention is to control the drum motor by directly using the PDCK (Play Back Data Clock) signal (9.408MHZ) read from the head in order to eliminate the above-mentioned problems, the tape to read the signal on the tape running at high speed PDCK control that controls the relative speed between the running speed and the drum motor speed, and hunting control that adjusts the relative speed with the tape while increasing the speed of the drum motor when it is out of the PDCK control range. A drum control method and device for fast music selection comprising a hold control for holding a drum speed at a constant speed in the absence of an RF signal, which amplifies an RF envelope signal and changes a logic signal as shown in FIG. RF envelope amplification section 1 and RF presence detection section 2 for detecting the presence or absence of RF, count the number of parity (Parse Locked Loop) PLL (lock) A PLL read determination unit 3 for determining, a control unit 4 for controlling the respective components, a divider 5 for dividing the clock read out from the RF signal, a switch for selecting one of the divider 5 signal and the drum FG signal (6), a counter (8) for counting the drum FG signal (DFG), a switch (7) for selecting one of the output for the drum speed signal (9) and a signal for drum hunting, a filter (10) for the drum offset signal, and a drum pay It consists of a phase signal filter 11 and a buffer 11, 12, 14, the operation state, action, and effect of the above configuration is as follows.

In FIG. 4, the drum control configuration is divided into PDCK control, hunting control, and hold control. The conditions under which each control mode is selected are shown in Table 1 below.

(H is High and L is Low.)

At this time, the presence or absence of the RF signal is determined by the presence or absence of the RF signal during one rotation of the drum motor. The envelope of the RF signal read from the tape is detected, and the envelope amplification section 1 converts the signal into an amplification and logic signal. 2), the RF detector 2 sends an H (High) signal to the control unit 4 if there is an RF signal for a certain period of time (40.8 μsec), and the PL lock determination is performed from the signal processing IC to the PLL lock determination unit 3). When the number of parity in one rotation of the drum is inputted and the parity number is 15 pulses or more, it is determined as a PL lock state, and a signal of H is sent to the controller 4.

If one head correctly traces a track on the tape and reads the data correctly, the parity count is 144.

As such, the control unit 4 receiving the RF presence signal and the PLL lock signal selects one of the three control conditions (PDCK control, hunting control, and hold control) shown in Table 1 above. Works together.

That is, if the PDCK control mode is selected in Table 1 (when parity is 15 pulses or more in the section where the RF envelope is high in Fig. 5a), the drum traveling speed and the head relative speed match the relative speed during playback. The error detection of the relative speed by controlling the rotational speed of the motor is performed by dividing the PDCK signal extracted from the head output (9.408 MHz when normal) into 256 at the divider 5 so that the high speed selection operation selection signal C of the controller 4 can be obtained. The drum speed PWM signal d and the drum offset PWM signal e of the control unit 4 are inputted to the control unit 4 so that the PDCK signal is 9.408MHZ at each of the low pass filters 9 and 10. It is integrated and added through the buffers 12 and 13 to control the drum motor through the drum motor drive.

At this time, the offset PWM signal (e) serves to fine tune the drum speed by integrating the drum speed error.

Also, when the hunting control mode is selected in Table 1, if the relative speed between the tape speed and the drum speed does not match due to the disturbance during high speed selection (PLL UnLock → PLL Lock signal is Low), the drum motor will be matched to match the relative speed. The rotation speed is forcibly hunted by the drum brake selection signal e of the controller 4 and the drum brake control signal b, such as the rotation speed of the drum motor at the time of hunting (T) shown in FIG. Let's do it.

At this time, the rotation speed control of the drum motor counts the drum FG signal DFG at the drum FG counter 8 and inputs it to the controller 4, and the controller 4 hunts between 2000 rpm to 2300 rpm at FF and 700 rpm to 2000 rpm at REW. Let's do it.

In the hunting, the drum brake voltage is selected at the switch 7 by the drum brake selection signal a, and the brake is applied by the drum brake control signal b to hunt between the speeds described above.

In other words, after the drum drive control voltage is constant, the drum brake control signal (b) is repeatedly changed into high and low states, and thus the rotation direction of the drum motor is switched to obtain an effect of slowing down and speeding down the PLL lock point ( Point) can be found, and then switching to PDC K control.

In addition, if the hold control mode is selected in Table 1, if there is no RF envelope signal and there is no RF signal during high-speed selection, the PDCK control and the hunting control match the state speed between the tape speed and the drum rotation speed. In the absence of the RF signal, the drum speed is held at 3300 rpm in the FF state and 2000 rpm in the REW state and maintained until the RF signal appears. When the RF signal is displayed, it is switched to PDCK control or hold control.

That is, in the hold control, the controller 4, which receives the drum FG signal DFG from the drum FG counter 8, rotates the speed and offset PWM signal so that the drum can rotate at 3300 rpm and 2000 rpm at FF and REW. d) (e) is output to control the drum motor.

At this time, drum phase servo is not applied during high speed selection.

As described above, the high speed selection method and apparatus of the DAT according to the present invention has an effect of more accurately selecting an arbitrary tune in high speed selection using PDCK control, hunting control, and hold control.

Claims (2)

The PDCK control step of controlling the rotational speed of the drum motor so that the running speed of the tape and the relative speed of the head coincide with the relative speed at the time of regeneration when judging the presence of the RF envelope signal and the PLL lock state, and the distortion of the high speed selection. If the relative speed between the tape speed and the drum speed does not match, the hunting control step of matching the relative speed by controlling the drum motor speed, and the drum speed until the RF envelope signal is indicated when there is no RF envelope signal during high speed selection And a hold control step of switching to the PDCK control or hunting control step when the RF envelope signal is displayed. RF envelope amplification unit 1 for amplifying the RF envelope signal read from the tape into a logic signal, and RF presence detection unit for detecting the presence of the RF envelope signal from the RF envelope amplification unit 1 and outputting it to the control unit 4 (2), the PLL lock determination unit 3 which counts the number of parities in one drum rotation and determines whether or not the PLL lock is to be output to the control unit 4, and the high speed selection operation selection signal C from the control unit 4; Switch 6 for selecting the output of the PDCK divider 5 for switching the flyback data clock and outputting it to the controller 4, and counting the drum FG signal DFG to the controller 4; The output of the counter 7 and the output signal of the RF presence detection unit 2 and the PLL lock determination unit 3 during the high-speed selection, the control mode is selected, and the switching of the switch 7 and the drum brake control signal b are performed. ) And a control unit 4 for outputting the speed PWM signal d and the offset PWM signal e And a switch 7 which is switched by the brake selection signal a of the controller 4 to select the drum brake voltage and outputs it to the buffer 12, and a speed PWM signal d output from the controller 4; And a buffer (12) (13) for receiving the offset PWM signal (e) through the filter (9) (10) and output to the drum motor drive stage.

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