KR0119906B1 - Epitial growth - Google Patents
Epitial growthInfo
- Publication number
- KR0119906B1 KR0119906B1 KR1019930029092A KR930029092A KR0119906B1 KR 0119906 B1 KR0119906 B1 KR 0119906B1 KR 1019930029092 A KR1019930029092 A KR 1019930029092A KR 930029092 A KR930029092 A KR 930029092A KR 0119906 B1 KR0119906 B1 KR 0119906B1
- Authority
- KR
- South Korea
- Prior art keywords
- layer
- atom
- substrate
- forming
- epitaxial layer
- Prior art date
Links
- 238000000034 method Methods 0.000 claims abstract description 27
- 239000000758 substrate Substances 0.000 claims abstract description 20
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical group [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 15
- 239000004065 semiconductor Substances 0.000 claims abstract description 11
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 11
- 239000002052 molecular layer Substances 0.000 claims abstract description 10
- 238000003877 atomic layer epitaxy Methods 0.000 claims description 8
- 125000004435 hydrogen atom Chemical group [H]* 0.000 claims description 8
- 238000010894 electron beam technology Methods 0.000 claims description 6
- 239000010703 silicon Substances 0.000 claims description 6
- VEDJZFSRVVQBIL-UHFFFAOYSA-N trisilane Chemical compound [SiH3][SiH2][SiH3] VEDJZFSRVVQBIL-UHFFFAOYSA-N 0.000 claims description 5
- 238000000354 decomposition reaction Methods 0.000 claims 1
- 238000005530 etching Methods 0.000 abstract description 4
- 238000001179 sorption measurement Methods 0.000 abstract 1
- 239000007789 gas Substances 0.000 description 4
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 3
- 238000000407 epitaxy Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 229910000077 silane Inorganic materials 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 2
- 238000001459 lithography Methods 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical group [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- RBFQJDQYXXHULB-UHFFFAOYSA-N arsane Chemical compound [AsH3] RBFQJDQYXXHULB-UHFFFAOYSA-N 0.000 description 1
- 229910000070 arsenic hydride Inorganic materials 0.000 description 1
- 125000004429 atom Chemical group 0.000 description 1
- 229910052729 chemical element Inorganic materials 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000000593 degrading effect Effects 0.000 description 1
- UPWPDUACHOATKO-UHFFFAOYSA-K gallium trichloride Chemical compound Cl[Ga](Cl)Cl UPWPDUACHOATKO-UHFFFAOYSA-K 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000001451 molecular beam epitaxy Methods 0.000 description 1
- 239000002096 quantum dot Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
Abstract
Description
제1a도 내지 제1c도는 본 발명의 에피택셜층의 형성방법을 보여주는 공정도.1A to 1C are process drawings showing a method for forming an epitaxial layer of the present invention.
본 발명은 반도체장치의 제조방법에 관한 것으로서, 구체적으로는 반도체기판에 에피택셜층을 형성하는 방법에 관한 것이다. 반도체소자의 반도체기판상에 에피택셜층을 성장하는 방법으로서, MOCVD(metal organic chemical vapor depositon)법이나 MBE(molecular beam epitaxy)법이 많이 사용되고 있다.The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for forming an epitaxial layer on a semiconductor substrate. As a method of growing an epitaxial layer on a semiconductor substrate of a semiconductor device, a metal organic chemical vapor depositon (MOCVD) method and a molecular beam epitaxy (MBE) method are widely used.
그러나, 이러한 종래의 방법에 있어서, 양자선(quantum wire), 양자점(quantum dot)등의 초미세구조를 제조하기 위해서는 반드시 종래의 리소그라피(lithography)방법을 사용해야 한다. 즉, 마스크를 제작한 다음 이 마스크를 이용하여 소정의 에피택셜층을 선택적으로 성장하는 기술을 이용해야 하는 것이다.However, in such a conventional method, a conventional lithography method must be used in order to manufacture an ultrafine structure such as quantum wire, quantum dot, or the like. In other words, a technique of fabricating a mask and then selectively growing a predetermined epitaxial layer using the mask should be used.
이와 같이, 종래의 방법에서는 리소그라피방법을 사용하기 때문에 선폭에 대한 해상도(resolution)가 저하되어서 원자단위의 초미세구조를 갖는 에피택셜층의 제조가 어렵다.As described above, in the conventional method, since the lithography method is used, resolution of the line width is reduced, making it difficult to manufacture an epitaxial layer having an ultrafine structure in atomic units.
또한, 마스크를 사용하여 미세 패턴의 에피택셜층을 형성할 경우, 식각공정을 사용해야하기 때문에 형성된 미세구조의 표면에 결함이 발생되어 소자의 성능을 저하시키게 된다.In addition, when the epitaxial layer of the fine pattern is formed using a mask, an etching process must be used, so defects are generated on the surface of the formed microstructure, thereby degrading the performance of the device.
따라서, 상기 에피택셜층을 형성할 때, 가능한 식각공정을 사용하지 않고 또한 초미세선폭을 가지면서 원자층의 두께를 갖는 에피택셜층을 성장하는 방법이 이 기술분야에서 요구되어 왔다.Therefore, when forming the epitaxial layer, there has been a need in the art for a method of growing an epitaxial layer having an atomic layer thickness without using an etching process and having an ultra fine line width.
본 발명은 식각공정을 사용하지 않고 초미세의 선폭과 원자층의 두께를 갖는 에피택셜층의 형성방법을 제공하는데 그 목적이 있다.It is an object of the present invention to provide a method for forming an epitaxial layer having an ultrafine line width and an atomic layer thickness without using an etching process.
이하 본 발명의 실시예를 첨부도면에 의거하여 상세히 설명한다.Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
제1a도에서, 반도체기판상에 에피택셜층의 구성원소인 화학원소를 포함하는 분자가 화학 흡착되어 있는 공정을 보여주고 있다.FIG. 1A shows a process in which a molecule containing a chemical element that is a member of an epitaxial layer is chemisorbed on a semiconductor substrate.
이 실시예에서는 실리콘기판(10)상에 규소원자(Si)와 수소원자(H)를 포함하는 트라이-실란(tri-silane; Si3H8)분자층(20)이 원자층 에피택시(ALE; Atomic Laver Epitaxy)의 조건에서 한 분자층의 두께로 형성된다.In this embodiment, a tri-silane (Si 3 H 8) molecular layer 20 including silicon atoms (Si) and hydrogen atoms (H) on the silicon substrate 10 is formed by atomic layer epitaxy (ALE). Epitaxy) is formed in the thickness of one molecular layer.
따라서, 상기 기판의 표면이 수소원자로 보호되어 있는 것이다. 여기서, 상기 트라이-실란 분자는 기판(10)에 단분자로 화학 흡착되는 성질을 갖는다.Thus, the surface of the substrate is protected with hydrogen atoms. Here, the tri-silane molecule has a property of chemisorbing to the substrate 10 as a single molecule.
한편, 상술한 ALE는 기판을 특정 온도에서 특정 분자 기체에 노출시키면 분자가 1층씩 화학 흡착하여 디지털 방식으로 에피택시가 성장되는 방법이다. 이에 따라, 본 발명에서와 같이 반도체 기판이 실리콘(Si)인 경우는 트라이-실란이 ALE를 가능하게 하는 분자가 된다. 이에 부가하여, 기판이 갈륨비소(GaAs)인 경우는 트라이 메칠 갈륨, 3염화갈륨, 수소화 비소 등이 ALE를 가능하게 하는 분자가 된다.On the other hand, the ALE described above is a method in which epitaxy is grown digitally by chemically adsorbing molecules one by one when the substrate is exposed to a specific molecular gas at a specific temperature. Accordingly, as in the present invention, when the semiconductor substrate is silicon (Si), tri-silane becomes a molecule that enables ALE. In addition, when the substrate is gallium arsenide (GaAs), trimethyl gallium, gallium trichloride, arsenic hydride and the like become molecules that enable ALE.
이어, 제1b도에 도시되어 있는 바와 같이, STM의 팁(tip)에서 발생되는 전자빔에 의해 상기 트라이-실란 분자층(20)의 소정부분에 있는 실란분자가 규소와 수소원자로 분해된다.Subsequently, as shown in FIG. 1B, silane molecules in a predetermined portion of the tri-silane molecular layer 20 are decomposed into silicon and hydrogen atoms by an electron beam generated at the tip of the STM.
이때, 전자빔에 의해서 노출된 부분에서는 수소원자는 상기 기판의 표면으로부터 이탈되고 그리고 규소원자는 상기 기판표면에 흡착된다.At this time, in the portion exposed by the electron beam, hydrogen atoms are separated from the surface of the substrate and silicon atoms are adsorbed on the surface of the substrate.
이와 같이, 상기 기판이 실란에 노출된 후에 나머지 기체를 모두 제거하면, 결국 실란분자가 한 층으로 화학 흡착된다.As such, if the remaining gas is removed after the substrate is exposed to silane, the silane molecules are chemisorbed into one layer.
이때, 상기 전자빔이 주사된 부분은 결국 하나의 규소층이 기판상에 성장하게 된다.At this time, the portion where the electron beam is scanned eventually causes one silicon layer to grow on the substrate.
상기 전자빔의 주사공정과 분해된 기체의 제거공정을 반복하게 되면, 제1C도에 도시되어 있는 바와 같이, 상기 전자빔에 의해 주사된 부분에서는 결국 규소원자가 계속 성장하게 된다.When the scanning process of the electron beam and the removal of decomposed gas are repeated, silicon atoms continue to grow in the portion scanned by the electron beam as shown in FIG. 1C.
이와 같이 하여, 성장된 규소에피택시의 선폭은 STM의 원자해상력에 의존하게 되기 때문에 수 옹스트롬의 선폭으로 조절할 수 있고, 또한 에피택셜층의 두께가 ALE성장의 조건에 의존하기 때문에 기체를 도입하는 한 주기에 하나의 규소원자층이 성장될 수 있어서 규소원자층의 정수배로 조절될 수 있다.In this way, since the line width of the grown silicon epitaxy depends on the atomic resolution of the STM, it can be adjusted to the line width of several angstroms, and as long as the gas is introduced since the thickness of the epitaxial layer depends on the conditions of ALE growth. One silicon atom layer can be grown in a cycle so that it can be controlled by an integral multiple of the silicon atom layer.
따라서, 본 발명에 의하면, 상기 에피택셜층의 선폭의 넓이가 원자의 직경까지 되도록 에피택셜층을 형성할 수 있고, 또한 그 두께는 하나의 원자층까지 형성할 수 있다.Therefore, according to the present invention, the epitaxial layer can be formed so that the width of the line width of the epitaxial layer is up to the diameter of the atom, and the thickness can be formed up to one atomic layer.
Claims (4)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019930029092A KR0119906B1 (en) | 1993-12-22 | 1993-12-22 | Epitial growth |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019930029092A KR0119906B1 (en) | 1993-12-22 | 1993-12-22 | Epitial growth |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR950020987A KR950020987A (en) | 1995-07-26 |
| KR0119906B1 true KR0119906B1 (en) | 1997-10-17 |
Family
ID=19372148
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019930029092A KR0119906B1 (en) | 1993-12-22 | 1993-12-22 | Epitial growth |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR0119906B1 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100433622B1 (en) * | 2001-09-05 | 2004-05-31 | 한국전자통신연구원 | Method for manufacturing Si layer, Ge layer and Si-Ge layer using atomic epitaxy method |
-
1993
- 1993-12-22 KR KR1019930029092A patent/KR0119906B1/en not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| KR950020987A (en) | 1995-07-26 |
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