KR0119002Y1 - Video deemphasis switching circuit - Google Patents
Video deemphasis switching circuitInfo
- Publication number
- KR0119002Y1 KR0119002Y1 KR92011563U KR920011563U KR0119002Y1 KR 0119002 Y1 KR0119002 Y1 KR 0119002Y1 KR 92011563 U KR92011563 U KR 92011563U KR 920011563 U KR920011563 U KR 920011563U KR 0119002 Y1 KR0119002 Y1 KR 0119002Y1
- Authority
- KR
- South Korea
- Prior art keywords
- emphasis
- circuit
- signal
- switching
- video
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/14—Picture signal circuitry for video frequency region
- H04N5/20—Circuitry for controlling amplitude response
- H04N5/205—Circuitry for controlling amplitude response for correcting amplitude versus frequency characteristic
- H04N5/208—Circuitry for controlling amplitude response for correcting amplitude versus frequency characteristic for compensating for attenuation of high frequency components, e.g. crispening, aperture distortion correction
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/60—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03C—MODULATION
- H03C2200/00—Indexing scheme relating to details of modulators or modulation methods covered by H03C
- H03C2200/0004—Circuit elements of modulators
- H03C2200/0016—Pre-emphasis or de-emphasis circuits
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Television Signal Processing For Recording (AREA)
Abstract
신호증폭회로부(10)와 디엠파시스회로부(20)를 포함하는 비디오신호 디엠파시스/언 디엠파시스 스위칭 회로에, 상기 디엠파시스 회로부(20)의 그라운드패스가 디엠파시스 제어회로부(40)의 스위칭트랜지스터(Q2)에 의해 선택적으로 형성되게 하고 상기 스위칭트랜지스터(Q2)는 외부 스위칭전압신호(S)로 제어되게하여, 비디오신호의 디엠파시스/언 디엠파시스를 원격제어할 수 있도록 한다.In the video signal de-emphasis / un-de-emphasis switching circuit including the signal amplification circuit section 10 and the de-emphasis circuit section 20, the ground path of the de-emphasis circuit section 20 is a de-emphasis control circuit section 40. ) to be selectively formed by a switching transistor (Q 2) and the switching transistor (Q 2) of the to be controlled by external switching voltage signal (S), to remotely control the de-emphasis / unloading de-emphasis of the video signal To help.
Description
제 1 도는 종래의 회로도1 is a conventional circuit diagram
제 2 도는 본 고안의 회로도2 is a circuit diagram of the present invention
*도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
10 : 신호증폭회로부 20 : 디엠파시스회로부10: signal amplification circuit portion 20: DM Emphasis circuit portion
40 : 디엠파시스제어회로부 Q1, Q2: 트랜지스터40: DM Emphasis control circuit part Q 1 , Q 2 : Transistor
R1-R7: 저항 C1-C4: 콘덴서R 1 -R 7 : Resistor C 1 -C 4 : Capacitor
본 고안은 위성방송 수신기에서 비디오 신호의 디엠파시스와 언 디엠파시스(Undeemphasis) 조건을 전환하기 위한 비디오 디엠파시스 스위칭회로에 관한 것이다.The present invention relates to a video de-emphasis switching circuit for switching the de-emphasis and undeemphasis conditions of a video signal in a satellite broadcasting receiver.
FM 전송계에서 신호대 잡읍비를 개선하기 위해서 입력에서는 고역 주파수 성분을 강조하고 출력에서는 강조된 고역 부근 주파수를 보상하게 된다.To improve the signal-to-noise ratio in the FM transmitter, the input emphasizes the high frequency components and the output compensates for the highlighted high frequencies.
이를 엠파시스회로라 일컫고 있는데, 입력측에서 고역주파수 성분을 강조하는 회로를 프리엠파시스라고하고 또 출력측에서 프리엠파시스를 받은 신호를 본래의 신호로 복귀시키는 회로를 디엠파시스 회로라고 한다.This is called an emphasis circuit. A circuit that emphasizes high frequency components at the input side is called pre-emphasis, and a circuit that restores the preemphasis signal at the output side to the original signal is called a de-emphasis circuit.
여기에서, 비디오 신호처리시 출력단에서 디엠파시스를 줄것인가 주지 않을 것인가는 출력신호의 상태에 따라 선택하게 된다.Here, whether or not to reduce the deemphasis at the output stage during video signal processing is selected according to the state of the output signal.
제 1 도는 종래의 디엠파시스/언 디엠파시스 스위칭회로를 보이고 있다.FIG. 1 shows a conventional de-emphasis / un-de-emphasis switching circuit.
여기에서 참조되는 바와같이 기존의 회로는 증폭트랜지스터(Q1)와 바이어스저항(R1-R2)과 출력저항(R3)을 포함하는 신호증폭회로부(10)에서 커플링콘덴서(C3)를 통하여 입력되는 비디오 신호가 증폭된 후 스위치(30)에 의해 저항(R5)과 콘덴서(C4)를 거쳐 그대로 출력되거나 저항(R4) 및 콘덴서(C1, C2)로 구성된 디엠파시스회로부(20)에서 디엠파시스되어 출력되도록 구성하고 있다.Conventional circuit, as referenced herein, is the coupling capacitor from the amplifying transistor (Q 1) and a bias resistor (R 1 -R 2) and the signal amplifier circuit 10 including the output resistance (R 3) (C 3) After the amplified video signal is output through the resistor (R 5 ) and the capacitor (C 4 ) by the switch 30 as it is or the DM wave consisting of the resistor (R 4 ) and the capacitor (C 1 , C 2 ) It is configured to be deemphasized and output from the sheath circuit unit 20.
이러한 종래의 회로는 구성상의 간략화 잇점은 있으나 수동으로 디엠파시스/언디엠파시스를 절환해야하는 불편이 따르게되며 리모콘조작을 어렵게 만든다.This conventional circuit has the advantage of simplifying the configuration, but it is inconvenient to manually switch between the DMP / un-MP, and makes the remote control operation difficult.
본 고안은 외부의 리모콘제어신호등으로 간단하게 비디오신호의 디엠파시스/언디엠파시스를 결정할 수 있게되는 비디오 디엠파시스 스위칭회로를 제공하는데 목적이 있다.An object of the present invention is to provide a video de-emphasis switching circuit that can determine the de-emphasis / un-de-emphasis of the video signal simply by an external remote control signal.
이하 첨부한 도면에 기초하여 본 고안을 설명하면 다음과 같다.Hereinafter, the present invention will be described based on the accompanying drawings.
제 2 도는 본 고안의 회로구성도로써, 커플링 콘덴서(C3)를 통하여 입력되는 비디오 신호는 증폭트랜지스터(Q1), 바이어스저항(R1, R2), 출력저항(R3)을 포함하는 신호증폭회로부(10)에서 증폭된 후 저항(R5)과 커플링콘덴서(C4)를 거쳐 출력되게 구성하고, 상기 저항(R5)과 콘덴서(C4)의 접속저에는 저항(R4)과 콘덴서(C1, C2)를 포함하는 디엠파시스회로부(20)를 연결함과, 또한 상기 디엠파시스회로부(20)의 그라운딩회로는 디엠파시스 제어회로부(40)의 스위칭트랜지스터(Q2)에 의해 형성되게 구성하고, 상기 스위칭트랜지스터(Q2)의 베이스측에는 저항(R6, R7)을 거친 스위칭전압신호(S1)가 인가되게 구성한다.2 is a circuit diagram of the present invention, wherein a video signal input through a coupling capacitor C 3 includes an amplifying transistor Q 1 , a bias resistor R 1 , R 2 , and an output resistor R 3 . After being amplified by the signal amplification circuit section 10 and configured to be output through the resistor (R 5 ) and the coupling capacitor (C 4 ), the resistor (R) at the connection bottom of the resistor (R 5 ) and the capacitor (C 4 ) 4 ) and the de-emphasis circuit unit 20 including the condensers C 1 and C 2 , and the grounding circuit of the de-emphasis circuit unit 20 is a switching transistor of the de-emphasis control circuit unit 40. configured to be formed by (Q 2), which are configured so the switching transistor resistor (R 6, R 7) a rough voltage switching signal (S 1) of the base side (Q 2) is applied.
이와같이 구성된 본 고안의 작용 및 효과를 설명하면 다음과 같다.Referring to the operation and effects of the present invention configured as described above are as follows.
신호증폭회로부(10)의 증폭트랜지스터(Q1)가 저항(R1, R2)으로 분배되는 Vcc 전압으로 바이어스된 상태에서 커플링콘덴서(C3)를 통한 비디오신호가 입력되면, 이 신호는 증폭되어 상기 증폭트랜지스터(Q1)의 에미터출력단에 나타나게 된다.When the amplifying transistor Q 1 of the signal amplifying circuit unit 10 is biased to the Vcc voltage distributed to the resistors R 1 and R 2 , the video signal through the coupling capacitor C 3 is input, the signal is It is amplified and appears at the emitter output terminal of the amplifying transistor Q 1 .
이때, 디엠파시스 제어회로부(40)에 인가되는 스위칭전압신호(S1)가 0V이면 스위칭트랜지스터(Q2)는 오프이므로 디엠파시스회로부(20)는 그라운드에 대해 플로우팅 조건이되어, 상기 신호증폭회로부(10)의 비디오출력신호는 저항(R5)과 콘덴서(C4)를 거쳐 언 디엠파시스 상태로 그대로 출력된다.At this time, when the switching voltage signal S 1 applied to the deemphasis control circuit unit 40 is 0V, the switching transistor Q 2 is turned off, so the deemphasis circuit unit 20 becomes a floating condition with respect to the ground. The video output signal of the signal amplifying circuit unit 10 is output as it is through the resistor R 5 and the condenser C 4 in an unemphasis state.
그러나 디엠파시스 제어회로부(40)의 외부 스위칭전압신호(S1)가 예를 들어 12V로 입력되면 스위칭트랜지스터(Q2)는 온되어 디엠파시스회로부(20)의 그라운드 신호패스를 형성시켜주게되므로 디엠파시스 회로가 구성된다. 이때에는 신호증폭회로부(10)의 비디오출력이 상기 디엠파시스회로부(20)에서 디엠파시스되어 출력단에 나타나게 된다.However, when the external switching voltage signal S 1 of the DM Emphasis control circuit unit 40 is input at, for example, 12 V, the switching transistor Q 2 is turned on to form the ground signal path of the DM Emphasis circuit unit 20. Therefore, a deemphasis circuit is constructed. At this time, the video output of the signal amplification circuit unit 10 is deemphasized by the deemphasis circuit unit 20 and appears at the output terminal.
이와같이 동작하게 되는 본 고안은 리모콘등에 의해 외부에서간단히 발생시킬 수 있는 스위칭전압신호로써 디엠파시스회로부의 동작여부를 결정할 수 있어, 비디오신호의 디엠파시스/언 디엠파시스의 스위칭이 용이하게 된다.The present invention, which operates as described above, can determine whether the DM Emphasis circuit part is operated as a switching voltage signal that can be easily generated from the outside by a remote controller or the like, thereby making it possible to easily switch the DM Emphasis / Un-Demphasis of the video signal. .
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR92011563U KR0119002Y1 (en) | 1992-06-26 | 1992-06-26 | Video deemphasis switching circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR92011563U KR0119002Y1 (en) | 1992-06-26 | 1992-06-26 | Video deemphasis switching circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
KR940002285U KR940002285U (en) | 1994-01-03 |
KR0119002Y1 true KR0119002Y1 (en) | 1998-07-15 |
Family
ID=19335583
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR92011563U KR0119002Y1 (en) | 1992-06-26 | 1992-06-26 | Video deemphasis switching circuit |
Country Status (1)
Country | Link |
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KR (1) | KR0119002Y1 (en) |
-
1992
- 1992-06-26 KR KR92011563U patent/KR0119002Y1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
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KR940002285U (en) | 1994-01-03 |
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