JPWO2024154354A1 - - Google Patents

Info

Publication number
JPWO2024154354A1
JPWO2024154354A1 JP2024571592A JP2024571592A JPWO2024154354A1 JP WO2024154354 A1 JPWO2024154354 A1 JP WO2024154354A1 JP 2024571592 A JP2024571592 A JP 2024571592A JP 2024571592 A JP2024571592 A JP 2024571592A JP WO2024154354 A1 JPWO2024154354 A1 JP WO2024154354A1
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2024571592A
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPWO2024154354A1 publication Critical patent/JPWO2024154354A1/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00Superconducting devices
    • H10N60/80Constructional details
    • H10N60/81Containers; Mountings
    • H10N60/815Containers; Mountings for Josephson-effect devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/021Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00Superconducting devices
    • H10N60/01Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00Superconducting devices
    • H10N60/01Manufacture or treatment
    • H10N60/0912Manufacture or treatment of Josephson-effect devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00Superconducting devices
    • H10N60/80Constructional details
    • H10N60/805Constructional details for Josephson-effect devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N69/00Integrated devices, or assemblies of multiple devices, comprising at least one superconducting element covered by group H10N60/00
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63Vias, e.g. via plugs
    • H10W70/635Through-vias

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2024571592A 2023-01-20 2023-01-20 Pending JPWO2024154354A1 (https=)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2023/001769 WO2024154354A1 (ja) 2023-01-20 2023-01-20 デバイスおよびデバイスの製造方法

Publications (1)

Publication Number Publication Date
JPWO2024154354A1 true JPWO2024154354A1 (https=) 2024-07-25

Family

ID=91955781

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2024571592A Pending JPWO2024154354A1 (https=) 2023-01-20 2023-01-20

Country Status (4)

Country Link
US (1) US20250301921A1 (https=)
EP (1) EP4654808A4 (https=)
JP (1) JPWO2024154354A1 (https=)
WO (1) WO2024154354A1 (https=)

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10134972B2 (en) * 2015-07-23 2018-11-20 Massachusetts Institute Of Technology Qubit and coupler circuit structures and coupling techniques
US10242968B2 (en) * 2015-11-05 2019-03-26 Massachusetts Institute Of Technology Interconnect structure and semiconductor structures for assembly of cryogenic electronic packages
US11362257B2 (en) 2017-05-16 2022-06-14 National Institute Of Advanced Industrial Science And Technology Quantum bit device
US10263170B1 (en) * 2017-11-30 2019-04-16 International Business Machines Corporation Bumped resonator structure
US11088310B2 (en) 2019-04-29 2021-08-10 International Business Machines Corporation Through-silicon-via fabrication in planar quantum devices
WO2021245949A1 (ja) 2020-06-05 2021-12-09 日本電気株式会社 量子デバイス及び量子計算機
US20220199507A1 (en) 2020-12-22 2022-06-23 International Business Machines Corporation Multi-layered packaging for superconducting quantum circuits
JP7806395B2 (ja) * 2021-04-23 2026-01-27 日本電気株式会社 量子デバイス

Also Published As

Publication number Publication date
US20250301921A1 (en) 2025-09-25
WO2024154354A1 (ja) 2024-07-25
EP4654808A1 (en) 2025-11-26
EP4654808A4 (en) 2026-03-04

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Legal Events

Date Code Title Description
A621 Written request for application examination

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Effective date: 20250528