JPWO2024014473A1 - - Google Patents

Info

Publication number
JPWO2024014473A1
JPWO2024014473A1 JP2024533732A JP2024533732A JPWO2024014473A1 JP WO2024014473 A1 JPWO2024014473 A1 JP WO2024014473A1 JP 2024533732 A JP2024533732 A JP 2024533732A JP 2024533732 A JP2024533732 A JP 2024533732A JP WO2024014473 A1 JPWO2024014473 A1 JP WO2024014473A1
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2024533732A
Other languages
Japanese (ja)
Other versions
JPWO2024014473A5 (https=
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPWO2024014473A1 publication Critical patent/JPWO2024014473A1/ja
Publication of JPWO2024014473A5 publication Critical patent/JPWO2024014473A5/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C13/00Resistors not provided for elsewhere
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/45Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts
    • H10W20/48Insulating materials thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP2024533732A 2022-07-15 2023-07-12 Pending JPWO2024014473A1 (https=)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2022114107 2022-07-15
PCT/JP2023/025696 WO2024014473A1 (ja) 2022-07-15 2023-07-12 半導体装置

Publications (2)

Publication Number Publication Date
JPWO2024014473A1 true JPWO2024014473A1 (https=) 2024-01-18
JPWO2024014473A5 JPWO2024014473A5 (https=) 2025-03-26

Family

ID=89536746

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2024533732A Pending JPWO2024014473A1 (https=) 2022-07-15 2023-07-12

Country Status (2)

Country Link
JP (1) JPWO2024014473A1 (https=)
WO (1) WO2024014473A1 (https=)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002289609A (ja) * 2001-03-27 2002-10-04 Toshiba Corp 半導体装置及びその製造方法
US9502284B2 (en) * 2013-12-31 2016-11-22 Texas Instruments Incorporated Metal thin film resistor and process
WO2022149371A1 (ja) * 2021-01-08 2022-07-14 ローム株式会社 電子部品

Also Published As

Publication number Publication date
WO2024014473A1 (ja) 2024-01-18

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Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20241217