JPWO2023276107A1 - - Google Patents
Info
- Publication number
- JPWO2023276107A1 JPWO2023276107A1 JP2023531290A JP2023531290A JPWO2023276107A1 JP WO2023276107 A1 JPWO2023276107 A1 JP WO2023276107A1 JP 2023531290 A JP2023531290 A JP 2023531290A JP 2023531290 A JP2023531290 A JP 2023531290A JP WO2023276107 A1 JPWO2023276107 A1 JP WO2023276107A1
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Recrystallisation Techniques (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2021/024937 WO2023276107A1 (ja) | 2021-07-01 | 2021-07-01 | 半導体層の形成方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPWO2023276107A1 true JPWO2023276107A1 (de) | 2023-01-05 |
Family
ID=84691677
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2023531290A Pending JPWO2023276107A1 (de) | 2021-07-01 | 2021-07-01 |
Country Status (2)
Country | Link |
---|---|
JP (1) | JPWO2023276107A1 (de) |
WO (1) | WO2023276107A1 (de) |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2629637B1 (fr) * | 1988-04-05 | 1990-11-16 | Thomson Csf | Procede de realisation d'une alternance de couches de materiau semiconducteur monocristallin et de couches de materiau isolant |
JP2527016B2 (ja) * | 1988-11-11 | 1996-08-21 | 日本電気株式会社 | 半導体膜の製造方法 |
JPH02188912A (ja) * | 1989-01-17 | 1990-07-25 | Nec Corp | 3‐5族化合物半導体の選択成長方法 |
FR2689680B1 (fr) * | 1992-04-02 | 2001-08-10 | Thomson Csf | Procédé de réalisation de couches minces hétéroépitaxiales et de dispositifs électroniques. |
KR20130047813A (ko) * | 2011-10-31 | 2013-05-09 | 삼성전자주식회사 | Iii-v족 화합물 반도체층을 포함하는 반도체 소자 및 그 제조방법 |
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2021
- 2021-07-01 WO PCT/JP2021/024937 patent/WO2023276107A1/ja active Application Filing
- 2021-07-01 JP JP2023531290A patent/JPWO2023276107A1/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
WO2023276107A1 (ja) | 2023-01-05 |
Similar Documents
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20231208 |