JPWO2023223523A1 - - Google Patents
Info
- Publication number
- JPWO2023223523A1 JPWO2023223523A1 JP2024513696A JP2024513696A JPWO2023223523A1 JP WO2023223523 A1 JPWO2023223523 A1 JP WO2023223523A1 JP 2024513696 A JP2024513696 A JP 2024513696A JP 2024513696 A JP2024513696 A JP 2024513696A JP WO2023223523 A1 JPWO2023223523 A1 JP WO2023223523A1
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/08—Continuously compensating for, or preventing, undesired influence of physical parameters of noise
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
- H03M3/02—Delta modulation, i.e. one-bit differential modulation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/02—Transmitters
- H04B1/04—Circuits
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Transmitters (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/JP2022/020903 WO2023223523A1 (ja) | 2022-05-20 | 2022-05-20 | デルタシグマ変調回路、ディジタル送信回路、及び、ディジタル送信機 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPWO2023223523A1 true JPWO2023223523A1 (ja) | 2023-11-23 |
Family
ID=88835062
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2024513696A Pending JPWO2023223523A1 (ja) | 2022-05-20 | 2022-05-20 |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JPWO2023223523A1 (ja) |
| WO (1) | WO2023223523A1 (ja) |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102005012444B4 (de) * | 2005-03-17 | 2006-12-07 | Infineon Technologies Ag | Steuervorrichtung und Verfahren zur Verwürfelung der Zuordnung der Referenzen eines Quantisierers in einem Sigma-Delta-Analog-Digital-Umsetzer |
| KR101095640B1 (ko) * | 2007-04-18 | 2011-12-19 | 가부시키가이샤 어드밴티스트 | Ｄａ 변환기 및 ｄａ 변환방법 |
| JP5758434B2 (ja) * | 2013-05-08 | 2015-08-05 | 株式会社半導体理工学研究センター | Δσａ／ｄ変換装置 |
| JP6351871B2 (ja) * | 2015-11-17 | 2018-07-04 | 三菱電機株式会社 | ディジタル送信機 |
-
2022
- 2022-05-20 WO PCT/JP2022/020903 patent/WO2023223523A1/ja unknown
- 2022-05-20 JP JP2024513696A patent/JPWO2023223523A1/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| WO2023223523A1 (ja) | 2023-11-23 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20240229 |
|
| A871 | Explanation of circumstances concerning accelerated examination |
Free format text: JAPANESE INTERMEDIATE CODE: A871 Effective date: 20240229 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20240409 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20240531 |