JPWO2023166609A1 - - Google Patents
Info
- Publication number
- JPWO2023166609A1 JPWO2023166609A1 JP2024504086A JP2024504086A JPWO2023166609A1 JP WO2023166609 A1 JPWO2023166609 A1 JP WO2023166609A1 JP 2024504086 A JP2024504086 A JP 2024504086A JP 2024504086 A JP2024504086 A JP 2024504086A JP WO2023166609 A1 JPWO2023166609 A1 JP WO2023166609A1
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/32—Circuit design at the digital level
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Evolutionary Computation (AREA)
- Geometry (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2022/008868 WO2023166609A1 (en) | 2022-03-02 | 2022-03-02 | Device for assisting with digital circuit design, method for assisting with digital circuit design, and program for assisting with digital circuit design |
Publications (1)
Publication Number | Publication Date |
---|---|
JPWO2023166609A1 true JPWO2023166609A1 (en) | 2023-09-07 |
Family
ID=87883241
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2024504086A Pending JPWO2023166609A1 (en) | 2022-03-02 | 2022-03-02 |
Country Status (2)
Country | Link |
---|---|
JP (1) | JPWO2023166609A1 (en) |
WO (1) | WO2023166609A1 (en) |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001344298A (en) * | 2000-06-01 | 2001-12-14 | Toshiba Corp | Method and device for system design, and computer- readable recording medium with system design program stored therein |
JP5577619B2 (en) * | 2009-04-30 | 2014-08-27 | 富士通株式会社 | Logic circuit design device |
JP6731106B1 (en) * | 2019-12-27 | 2020-07-29 | 株式会社パルテック | Information processing system, information processing apparatus, method of using information processing apparatus, user terminal and program thereof |
-
2022
- 2022-03-02 WO PCT/JP2022/008868 patent/WO2023166609A1/en active Application Filing
- 2022-03-02 JP JP2024504086A patent/JPWO2023166609A1/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
WO2023166609A1 (en) | 2023-09-07 |
Similar Documents
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20240119 |