JPWO2023067667A1 - - Google Patents

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Publication number
JPWO2023067667A1
JPWO2023067667A1 JP2023553919A JP2023553919A JPWO2023067667A1 JP WO2023067667 A1 JPWO2023067667 A1 JP WO2023067667A1 JP 2023553919 A JP2023553919 A JP 2023553919A JP 2023553919 A JP2023553919 A JP 2023553919A JP WO2023067667 A1 JPWO2023067667 A1 JP WO2023067667A1
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2023553919A
Other languages
Japanese (ja)
Other versions
JP7568130B2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
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Publication of JPWO2023067667A1 publication Critical patent/JPWO2023067667A1/ja
Application granted granted Critical
Publication of JP7568130B2 publication Critical patent/JP7568130B2/ja
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Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
    • G06F9/30058—Conditional branch instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
    • G06F21/55—Detecting local intrusion or implementing counter-measures
    • G06F21/56—Computer malware detection or handling, e.g. anti-virus arrangements
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/321—Program or instruction counter, e.g. incrementing

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Hardware Design (AREA)
  • Health & Medical Sciences (AREA)
  • General Health & Medical Sciences (AREA)
  • Virology (AREA)
  • Debugging And Monitoring (AREA)
JP2023553919A 2021-10-18 2021-10-18 解析機能付与方法、解析機能付与装置及び解析機能付与プログラム Active JP7568130B2 (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2021/038501 WO2023067667A1 (ja) 2021-10-18 2021-10-18 解析機能付与方法、解析機能付与装置及び解析機能付与プログラム

Publications (2)

Publication Number Publication Date
JPWO2023067667A1 true JPWO2023067667A1 (https=) 2023-04-27
JP7568130B2 JP7568130B2 (ja) 2024-10-16

Family

ID=86058897

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2023553919A Active JP7568130B2 (ja) 2021-10-18 2021-10-18 解析機能付与方法、解析機能付与装置及び解析機能付与プログラム

Country Status (3)

Country Link
US (1) US20250231768A1 (https=)
JP (1) JP7568130B2 (https=)
WO (1) WO2023067667A1 (https=)

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US7930526B2 (en) * 2004-03-24 2011-04-19 Arm Limited Compare and branch mechanism
US8635437B2 (en) * 2009-02-12 2014-01-21 Via Technologies, Inc. Pipelined microprocessor with fast conditional branch instructions based on static exception state
US20170365237A1 (en) * 2010-06-17 2017-12-21 Thincl, Inc. Processing a Plurality of Threads of a Single Instruction Multiple Data Group
US8776026B2 (en) * 2010-10-01 2014-07-08 Ecole Polytechnique Federale De Lausanne System and method for in-vivo multi-path analysis of binary software
US9176737B2 (en) * 2011-02-07 2015-11-03 Arm Limited Controlling the execution of adjacent instructions that are dependent upon a same data condition
US20120260073A1 (en) * 2011-04-07 2012-10-11 Via Technologies, Inc. Emulation of execution mode banked registers
US8966324B2 (en) * 2012-06-15 2015-02-24 International Business Machines Corporation Transactional execution branch indications
US20130339680A1 (en) * 2012-06-15 2013-12-19 International Business Machines Corporation Nontransactional store instruction
US11163572B2 (en) * 2014-02-04 2021-11-02 Micron Technology, Inc. Memory systems and memory control methods
US9305167B2 (en) * 2014-05-21 2016-04-05 Bitdefender IPR Management Ltd. Hardware-enabled prevention of code reuse attacks
US9547494B2 (en) * 2014-05-30 2017-01-17 International Business Machines Corporation Absolute address branching in a fixed-width reduced instruction set computing architecture
US9563427B2 (en) * 2014-05-30 2017-02-07 International Business Machines Corporation Relative offset branching in a fixed-width reduced instruction set computing architecture
US10437998B2 (en) * 2015-10-26 2019-10-08 Mcafee, Llc Hardware heuristic-driven binary translation-based execution analysis for return-oriented programming malware detection
GB2548604B (en) * 2016-03-23 2018-03-21 Advanced Risc Mach Ltd Branch instruction
US20170277539A1 (en) * 2016-03-24 2017-09-28 Imagination Technologies Limited Exception handling in processor using branch delay slot instruction set architecture
US10657253B2 (en) * 2016-05-18 2020-05-19 The Governing Council Of The University Of Toronto System and method for determining correspondence and accountability between binary code and source code
US10409603B2 (en) * 2016-12-30 2019-09-10 Intel Corporation Processors, methods, systems, and instructions to check and store indications of whether memory addresses are in persistent memory
US10387152B2 (en) * 2017-07-06 2019-08-20 Arm Limited Selecting branch instruction execution paths based on previous branch path performance
EP3462308B1 (en) * 2017-09-29 2022-03-02 ARM Limited Transaction nesting depth testing instruction
US20190235873A1 (en) * 2018-01-30 2019-08-01 Samsung Electronics Co., Ltd. System and method of reducing computer processor power consumption using micro-btb verified edge feature
US20190265976A1 (en) * 2018-02-23 2019-08-29 Yuly Goryavskiy Additional Channel for Exchanging Useful Information
US10860716B2 (en) 2018-03-23 2020-12-08 Juniper Networks, Inc. Detecting malware concealed by delay loops of software programs
US10635445B2 (en) * 2018-05-29 2020-04-28 Arm Limited Handling modifications to permitted program counter ranges in a data processing apparatus
US11989292B2 (en) 2018-10-11 2024-05-21 Nippon Telegraph And Telephone Corporation Analysis function imparting device, analysis function imparting method, and recording medium
US10922081B2 (en) * 2018-10-19 2021-02-16 Oracle International Corporation Conditional branch frame barrier
US11169810B2 (en) * 2018-12-28 2021-11-09 Samsung Electronics Co., Ltd. Micro-operation cache using predictive allocation
US20230028595A1 (en) 2019-10-11 2023-01-26 Nippon Telegraph And Telephone Corporation Analysis function imparting device, analysis function imparting method, and analysis function imparting program
US12056494B2 (en) * 2021-04-23 2024-08-06 Nvidia Corporation Techniques for parallel execution
WO2023067668A1 (ja) * 2021-10-18 2023-04-27 日本電信電話株式会社 解析機能付与方法、解析機能付与装置及び解析機能付与プログラム
US20240411557A1 (en) * 2021-10-18 2024-12-12 Nippon Telegraph And Telephone Corporation Analysis function imparting method, analysis function imparting device, and analysis function imparting program

Also Published As

Publication number Publication date
WO2023067667A1 (ja) 2023-04-27
US20250231768A1 (en) 2025-07-17
JP7568130B2 (ja) 2024-10-16

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