JP7568130B2 - 解析機能付与方法、解析機能付与装置及び解析機能付与プログラム - Google Patents
解析機能付与方法、解析機能付与装置及び解析機能付与プログラム Download PDFInfo
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- JP7568130B2 JP7568130B2 JP2023553919A JP2023553919A JP7568130B2 JP 7568130 B2 JP7568130 B2 JP 7568130B2 JP 2023553919 A JP2023553919 A JP 2023553919A JP 2023553919 A JP2023553919 A JP 2023553919A JP 7568130 B2 JP7568130 B2 JP 7568130B2
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- instruction
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
- G06F9/30058—Conditional branch instructions
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
- G06F21/55—Detecting local intrusion or implementing counter-measures
- G06F21/56—Computer malware detection or handling, e.g. anti-virus arrangements
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
- G06F9/321—Program or instruction counter, e.g. incrementing
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- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Security & Cryptography (AREA)
- Computer Hardware Design (AREA)
- Health & Medical Sciences (AREA)
- General Health & Medical Sciences (AREA)
- Virology (AREA)
- Debugging And Monitoring (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/JP2021/038501 WO2023067667A1 (ja) | 2021-10-18 | 2021-10-18 | 解析機能付与方法、解析機能付与装置及び解析機能付与プログラム |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPWO2023067667A1 JPWO2023067667A1 (https=) | 2023-04-27 |
| JP7568130B2 true JP7568130B2 (ja) | 2024-10-16 |
Family
ID=86058897
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2023553919A Active JP7568130B2 (ja) | 2021-10-18 | 2021-10-18 | 解析機能付与方法、解析機能付与装置及び解析機能付与プログラム |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US20250231768A1 (https=) |
| JP (1) | JP7568130B2 (https=) |
| WO (1) | WO2023067667A1 (https=) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP3543883A1 (en) | 2018-03-23 | 2019-09-25 | Juniper Networks, Inc. | Detecting malware concealed by delay loops of software programs |
| WO2020075335A1 (ja) | 2018-10-11 | 2020-04-16 | 日本電信電話株式会社 | 解析機能付与装置、解析機能付与方法及び解析機能付与プログラム |
| WO2021070393A1 (ja) | 2019-10-11 | 2021-04-15 | 日本電信電話株式会社 | 解析機能付与装置、解析機能付与方法及び解析機能付与プログラム |
Family Cites Families (34)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5522053A (en) * | 1988-02-23 | 1996-05-28 | Mitsubishi Denki Kabushiki Kaisha | Branch target and next instruction address calculation in a pipeline processor |
| US5903718A (en) * | 1996-09-16 | 1999-05-11 | International Business Machines Corporation | Remote program monitor method and system using a system-under-test microcontroller for self-debug |
| EP1039375A1 (en) * | 1999-03-19 | 2000-09-27 | Motorola, Inc. | Method and apparatus for implementing zero overhead loops |
| US6889320B1 (en) * | 1999-12-30 | 2005-05-03 | Texas Instruments Incorporated | Microprocessor with an instruction immediately next to a branch instruction for adding a constant to a program counter |
| US7590542B2 (en) * | 2002-05-08 | 2009-09-15 | Douglas Carter Williams | Method of generating test scripts using a voice-capable markup language |
| US7426629B2 (en) * | 2002-12-12 | 2008-09-16 | Arm Limited | Processing activity masking in a data processing system |
| US20050055544A1 (en) * | 2003-07-30 | 2005-03-10 | International Business Machines Corporation | Central processing unit having a module for processing of function calls |
| US7930526B2 (en) * | 2004-03-24 | 2011-04-19 | Arm Limited | Compare and branch mechanism |
| US8635437B2 (en) * | 2009-02-12 | 2014-01-21 | Via Technologies, Inc. | Pipelined microprocessor with fast conditional branch instructions based on static exception state |
| US20170365237A1 (en) * | 2010-06-17 | 2017-12-21 | Thincl, Inc. | Processing a Plurality of Threads of a Single Instruction Multiple Data Group |
| US8776026B2 (en) * | 2010-10-01 | 2014-07-08 | Ecole Polytechnique Federale De Lausanne | System and method for in-vivo multi-path analysis of binary software |
| US9176737B2 (en) * | 2011-02-07 | 2015-11-03 | Arm Limited | Controlling the execution of adjacent instructions that are dependent upon a same data condition |
| US20120260073A1 (en) * | 2011-04-07 | 2012-10-11 | Via Technologies, Inc. | Emulation of execution mode banked registers |
| US8966324B2 (en) * | 2012-06-15 | 2015-02-24 | International Business Machines Corporation | Transactional execution branch indications |
| US20130339680A1 (en) * | 2012-06-15 | 2013-12-19 | International Business Machines Corporation | Nontransactional store instruction |
| US11163572B2 (en) * | 2014-02-04 | 2021-11-02 | Micron Technology, Inc. | Memory systems and memory control methods |
| US9305167B2 (en) * | 2014-05-21 | 2016-04-05 | Bitdefender IPR Management Ltd. | Hardware-enabled prevention of code reuse attacks |
| US9547494B2 (en) * | 2014-05-30 | 2017-01-17 | International Business Machines Corporation | Absolute address branching in a fixed-width reduced instruction set computing architecture |
| US9563427B2 (en) * | 2014-05-30 | 2017-02-07 | International Business Machines Corporation | Relative offset branching in a fixed-width reduced instruction set computing architecture |
| US10437998B2 (en) * | 2015-10-26 | 2019-10-08 | Mcafee, Llc | Hardware heuristic-driven binary translation-based execution analysis for return-oriented programming malware detection |
| GB2548604B (en) * | 2016-03-23 | 2018-03-21 | Advanced Risc Mach Ltd | Branch instruction |
| US20170277539A1 (en) * | 2016-03-24 | 2017-09-28 | Imagination Technologies Limited | Exception handling in processor using branch delay slot instruction set architecture |
| US10657253B2 (en) * | 2016-05-18 | 2020-05-19 | The Governing Council Of The University Of Toronto | System and method for determining correspondence and accountability between binary code and source code |
| US10409603B2 (en) * | 2016-12-30 | 2019-09-10 | Intel Corporation | Processors, methods, systems, and instructions to check and store indications of whether memory addresses are in persistent memory |
| US10387152B2 (en) * | 2017-07-06 | 2019-08-20 | Arm Limited | Selecting branch instruction execution paths based on previous branch path performance |
| EP3462308B1 (en) * | 2017-09-29 | 2022-03-02 | ARM Limited | Transaction nesting depth testing instruction |
| US20190235873A1 (en) * | 2018-01-30 | 2019-08-01 | Samsung Electronics Co., Ltd. | System and method of reducing computer processor power consumption using micro-btb verified edge feature |
| US20190265976A1 (en) * | 2018-02-23 | 2019-08-29 | Yuly Goryavskiy | Additional Channel for Exchanging Useful Information |
| US10635445B2 (en) * | 2018-05-29 | 2020-04-28 | Arm Limited | Handling modifications to permitted program counter ranges in a data processing apparatus |
| US10922081B2 (en) * | 2018-10-19 | 2021-02-16 | Oracle International Corporation | Conditional branch frame barrier |
| US11169810B2 (en) * | 2018-12-28 | 2021-11-09 | Samsung Electronics Co., Ltd. | Micro-operation cache using predictive allocation |
| US12056494B2 (en) * | 2021-04-23 | 2024-08-06 | Nvidia Corporation | Techniques for parallel execution |
| WO2023067668A1 (ja) * | 2021-10-18 | 2023-04-27 | 日本電信電話株式会社 | 解析機能付与方法、解析機能付与装置及び解析機能付与プログラム |
| US20240411557A1 (en) * | 2021-10-18 | 2024-12-12 | Nippon Telegraph And Telephone Corporation | Analysis function imparting method, analysis function imparting device, and analysis function imparting program |
-
2021
- 2021-10-18 JP JP2023553919A patent/JP7568130B2/ja active Active
- 2021-10-18 WO PCT/JP2021/038501 patent/WO2023067667A1/ja not_active Ceased
- 2021-10-18 US US18/701,944 patent/US20250231768A1/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP3543883A1 (en) | 2018-03-23 | 2019-09-25 | Juniper Networks, Inc. | Detecting malware concealed by delay loops of software programs |
| WO2020075335A1 (ja) | 2018-10-11 | 2020-04-16 | 日本電信電話株式会社 | 解析機能付与装置、解析機能付与方法及び解析機能付与プログラム |
| WO2021070393A1 (ja) | 2019-10-11 | 2021-04-15 | 日本電信電話株式会社 | 解析機能付与装置、解析機能付与方法及び解析機能付与プログラム |
Non-Patent Citations (1)
| Title |
|---|
| KOLBITSCH, Clemens et al.,The power of procrastination: detection and mitigation of execution-stalling malicious code,CCS '11,2011年10月17日,pages 285-296 |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2023067667A1 (ja) | 2023-04-27 |
| US20250231768A1 (en) | 2025-07-17 |
| JPWO2023067667A1 (https=) | 2023-04-27 |
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