JPWO2021182222A1 - - Google Patents

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Publication number
JPWO2021182222A1
JPWO2021182222A1 JP2022505966A JP2022505966A JPWO2021182222A1 JP WO2021182222 A1 JPWO2021182222 A1 JP WO2021182222A1 JP 2022505966 A JP2022505966 A JP 2022505966A JP 2022505966 A JP2022505966 A JP 2022505966A JP WO2021182222 A1 JPWO2021182222 A1 JP WO2021182222A1
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JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Application number
JP2022505966A
Other versions
JP7393519B2 (ja
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Publication of JPWO2021182222A1 publication Critical patent/JPWO2021182222A1/ja
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Publication of JP7393519B2 publication Critical patent/JP7393519B2/ja
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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/16—Matrix or vector computation, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Data Mining & Analysis (AREA)
  • Algebra (AREA)
  • Databases & Information Systems (AREA)
  • Advance Control (AREA)
JP2022505966A 2020-03-11 2021-03-03 演算装置及び演算方法 Active JP7393519B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2020042169 2020-03-11
JP2020042169 2020-03-11
PCT/JP2021/008131 WO2021182222A1 (ja) 2020-03-11 2021-03-03 演算装置及び演算方法

Publications (2)

Publication Number Publication Date
JPWO2021182222A1 true JPWO2021182222A1 (ja) 2021-09-16
JP7393519B2 JP7393519B2 (ja) 2023-12-06

Family

ID=77671646

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2022505966A Active JP7393519B2 (ja) 2020-03-11 2021-03-03 演算装置及び演算方法

Country Status (2)

Country Link
JP (1) JP7393519B2 (ja)
WO (1) WO2021182222A1 (ja)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11259290A (ja) * 1998-03-12 1999-09-24 Fujitsu Ltd マイクロプロセッサ、演算処理実行方法及び記憶媒体
JP2006040254A (ja) * 2004-06-21 2006-02-09 Sanyo Electric Co Ltd リコンフィギュラブル回路および処理装置
JP2007166535A (ja) * 2005-12-16 2007-06-28 Matsushita Electric Ind Co Ltd デジタルフィルタ
JP2016103240A (ja) * 2014-11-28 2016-06-02 キヤノン株式会社 データ処理装置とデータ処理方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11259290A (ja) * 1998-03-12 1999-09-24 Fujitsu Ltd マイクロプロセッサ、演算処理実行方法及び記憶媒体
JP2006040254A (ja) * 2004-06-21 2006-02-09 Sanyo Electric Co Ltd リコンフィギュラブル回路および処理装置
JP2007166535A (ja) * 2005-12-16 2007-06-28 Matsushita Electric Ind Co Ltd デジタルフィルタ
JP2016103240A (ja) * 2014-11-28 2016-06-02 キヤノン株式会社 データ処理装置とデータ処理方法

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
吉見 真聡 他: "ＦＰＧＡを用いた確率モデル生化学シミュレータ", 情報処理学会論文誌, vol. 第４８巻 Ｎｏ．ＳＩＧ３（ＡＣＳ１７）, JPN6021018749, 15 February 2007 (2007-02-15), pages 45 - 58, ISSN: 0005146225 *

Also Published As

Publication number Publication date
JP7393519B2 (ja) 2023-12-06
WO2021182222A1 (ja) 2021-09-16

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