JPWO2020201873A1 - - Google Patents

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Publication number
JPWO2020201873A1
JPWO2020201873A1 JP2021510575A JP2021510575A JPWO2020201873A1 JP WO2020201873 A1 JPWO2020201873 A1 JP WO2020201873A1 JP 2021510575 A JP2021510575 A JP 2021510575A JP 2021510575 A JP2021510575 A JP 2021510575A JP WO2020201873 A1 JPWO2020201873 A1 JP WO2020201873A1
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JP
Japan
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Application number
JP2021510575A
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Japanese (ja)
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JP7555906B2 (ja
JPWO2020201873A5 (enExample
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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6733—Multi-gate TFTs
    • H10D30/6734—Multi-gate TFTs having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/421—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
    • H10D86/423—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/441—Interconnections, e.g. scanning lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/481—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs integrated with passive devices, e.g. auxiliary capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D87/00—Integrated devices comprising both bulk components and either SOI or SOS components on the same substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/70—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components

Landscapes

  • Thin Film Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
JP2021510575A 2019-03-29 2020-03-19 半導体装置の作製方法 Active JP7555906B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2019066884 2019-03-29
JP2019066884 2019-03-29
PCT/IB2020/052490 WO2020201873A1 (ja) 2019-03-29 2020-03-19 半導体装置の作製方法

Publications (3)

Publication Number Publication Date
JPWO2020201873A1 true JPWO2020201873A1 (enExample) 2020-10-08
JPWO2020201873A5 JPWO2020201873A5 (enExample) 2023-03-28
JP7555906B2 JP7555906B2 (ja) 2024-09-25

Family

ID=72666573

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2021510575A Active JP7555906B2 (ja) 2019-03-29 2020-03-19 半導体装置の作製方法

Country Status (3)

Country Link
US (1) US12082390B2 (enExample)
JP (1) JP7555906B2 (enExample)
WO (1) WO2020201873A1 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20230053616A (ko) 2020-08-21 2023-04-21 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치의 제작 방법
WO2022049449A1 (ja) 2020-09-06 2022-03-10 株式会社半導体エネルギー研究所 半導体装置、容量素子、およびその作製方法
WO2022064303A1 (ja) 2020-09-22 2022-03-31 株式会社半導体エネルギー研究所 半導体装置、及び電子機器
TW202213766A (zh) * 2020-09-22 2022-04-01 日商半導體能源研究所股份有限公司 鐵電體器件及半導體裝置
JP7798787B2 (ja) 2020-11-20 2026-01-14 株式会社半導体エネルギー研究所 半導体装置
KR20260054987A (ko) * 2024-10-16 2026-04-23 엘지디스플레이 주식회사 박막 트랜지스터, 그 제조방법, 이를 포함하는 박막 트랜지스터 기판 및 이를 포함하는 표시장치

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012084857A (ja) * 2010-09-14 2012-04-26 Semiconductor Energy Lab Co Ltd 薄膜トランジスタ
JP2018107447A (ja) * 2016-12-27 2018-07-05 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法
JP2018121049A (ja) * 2016-12-23 2018-08-02 株式会社半導体エネルギー研究所 半導体装置、及び半導体装置の作製方法
WO2018178793A1 (ja) * 2017-03-29 2018-10-04 株式会社半導体エネルギー研究所 半導体装置、半導体装置の作製方法
JP2019024128A (ja) * 2013-05-20 2019-02-14 株式会社半導体エネルギー研究所 半導体装置

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012084857A (ja) * 2010-09-14 2012-04-26 Semiconductor Energy Lab Co Ltd 薄膜トランジスタ
JP2019024128A (ja) * 2013-05-20 2019-02-14 株式会社半導体エネルギー研究所 半導体装置
JP2018121049A (ja) * 2016-12-23 2018-08-02 株式会社半導体エネルギー研究所 半導体装置、及び半導体装置の作製方法
JP2018107447A (ja) * 2016-12-27 2018-07-05 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法
WO2018178793A1 (ja) * 2017-03-29 2018-10-04 株式会社半導体エネルギー研究所 半導体装置、半導体装置の作製方法

Also Published As

Publication number Publication date
JP7555906B2 (ja) 2024-09-25
US20220157817A1 (en) 2022-05-19
WO2020201873A1 (ja) 2020-10-08
US12082390B2 (en) 2024-09-03

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