JPWO2020028714A5

JPWO2020028714A5 -

Info

Publication number: JPWO2020028714A5
Application number: JP2021505657A
Authority: JP
Publication date: 2022-08-02
Anticipated expiration: 2039-08-01

Description

一例では、回路構成が提供される。そのような回路構成は、相互接続回路と、相互接続回路に結合されたメモリと、相互接続回路に結合された複数のプロセッサ回路と、複数のプロセッサ回路にそれぞれ結合された複数のキャッシュ回路と、相互接続回路に結合され、メモリのアドレスの第１のサブセットの個々のキャッシュラインによってスヌープ要求をフィルタリングするように構成された、第１のスヌープフィルタと、相互接続回路に結合され、メモリのアドレスの第２のサブセットのキャッシュラインのグループによってスヌープ要求をフィルタリングするように構成された、第２のスヌープフィルタとを含んでいてもよく、各グループは複数のキャッシュラインを包含する。 In one example, a circuit configuration is provided. Such circuitry includes: an interconnect circuit; a memory coupled to the interconnect circuit; a plurality of processor circuits coupled to the interconnect circuit; a plurality of cache circuits each coupled to the plurality of processor circuits; a first snoop filter coupled to the interconnect circuitry and configured to filter snoop requests by individual cache lines of a first subset of addresses in the memory; and a second snoop filter configured to filter snoop requests by a second subset of groups of cache lines, each group containing a plurality of cache lines.

Claims

A circuit configuration,
an interconnect circuit;
a memory coupled to the interconnect circuit;
a plurality of processor circuits coupled to the interconnect circuit;
a plurality of cache circuits respectively coupled to the plurality of processor circuits;
a first snoop filter coupled to the interconnect circuit and configured to filter snoop requests by individual cache lines of a first subset of addresses of the memory;
a second snoop filter coupled to said interconnect circuit and configured to filter snoop requests by groups of cache lines of a second subset of addresses of said memory, each group comprising a plurality of cache lines. A circuit configuration including

further comprising control circuitry coupled to the first snoop filter and the second snoop filter, the control circuitry controlling the group of cache lines filtered by the second snoop filter to the first snoop filter; 2. The circuit arrangement of claim 1, configured to reassign cache lines filtered by .

The control circuit is further configured to select the group of cache lines for reassignment to the first snoop filter based on temporal locality of references to the group of cache lines. 3. The circuit configuration according to claim 2.

the control circuit is further configured to select the group of cache lines for reassignment to the first snoop filter based on exclusive ownership of cache lines in the group of cache lines; 3. The circuit configuration according to claim 2.

The control circuit is further configured to select the group of cache lines for reassignment to the first snoop filter based on a determination of frequently accessed cache lines in the group of cache lines. 3. The circuit configuration of claim 2, wherein

The control circuit further
determining cache lines belonging to the group selected for reassignment;
3. The circuit arrangement of claim 2, configured to reassign said cache lines belonging to said group to said first snoop filter.

Claims 2-6, wherein the control circuit is further configured to reassign a first cache line from the first snoop filter to a first group filtered by the second snoop filter. The circuit configuration according to any one of .

The control circuit further
reassigning a first cache line from the first snoop filter to a first group filtered by the second snoop filter;
determining cache lines filtered by the first snoop filter that belong to the first group;
Aggregating the cache line states of the cache lines belonging to the first group into a group state;
storing the group state in association with the tag of the first group;
A circuit arrangement as claimed in any one of claims 2 to 6, arranged to remove the cache lines in the first group from the first snoop filter.

The control circuit further
reassigning a first cache line from the first snoop filter to a first group filtered by the second snoop filter;
responsive to the directory of the first snoop filter being full, directing the first cache line from the first snoop filter to the first group filtered by the second snoop filter; A circuit arrangement according to any one of claims 2 to 6, arranged for reassignment.

The control circuit further
reassigning a first cache line from the first snoop filter to a first group filtered by the second snoop filter;
selecting the first cache line to be reassigned from the first snoop filter to the first group filtered by the second snoop filter, wherein the first cache line has been least recently used; A circuit arrangement as claimed in any one of claims 2 to 6, arranged to select based on.

the first snoop filter includes a first memory configured for storage of multiple cache line tags for individual cache lines;
The second snoop filter includes a second memory configured for storing a plurality of group tags each associated with a group of cache lines, each group tag mapping to a plurality of cache lines. 7. The circuit configuration according to any one of items 1 to 6.

The control circuit further
determining an owner count for a first group of cache lines filtered by the second snoop filter;
the first cache line from the second snoop filter in response to the owner count of the first group being equal to one and the access count of the first group being greater than zero; 3. The circuit arrangement of claim 2, configured to reassign cache lines of groups of .

caching cache lines of memory in cache circuitry of multiple processors;
a first snoop filter filtering snoop requests by individual cache lines of a first subset of addresses of said memory;
a second snoop filter filtering snoop requests by groups of cache lines of a second subset of addresses of said memory, each group containing multiple cache lines.

14. The method of claim 13, further comprising control circuitry reassigning groups of cache lines filtered by the second snoop filter to cache lines filtered by the first snoop filter.

15. The method of any one of claims 13-14, further comprising reassigning a first cache line from said first snoop filter to a first group filtered by said second snoop filter. the method of.