JPWO2019123904A1 - Management device and power storage system - Google Patents

Abstract

In order to estimate with high accuracy the data indicating the states of the plurality of cells connected in series, the current detection system (20) detects the current flowing through the cells (E1-E6) connected in series. The voltage detection system (30) detects the respective voltages of the plurality of cells (E1-E6). The calculation unit (41) is data for managing the states of a plurality of cells based on the value of the current detected by the current detection system (20) and the value of the voltage detected by the voltage detection system (30). Is calculated. The total characteristics of at least one filter (22, 26) included in the current detection system (20) and the total characteristics of at least one filter (32, 36) included in the voltage detection system (30) are substantially the same. Is consistent with.

Description

The present invention relates to a management device for managing the state of a power storage module and a power storage system.

In recent years, hybrid vehicles (HVs), plug-in hybrid vehicles (PHVs), and electric vehicles (EVs) have become widespread. These cars are equipped with a secondary battery as a key device. Nickel-metal hydride batteries and lithium-ion batteries are mainly used as in-vehicle secondary batteries. It is expected that the spread of lithium-ion batteries with high energy density will accelerate in the future.

In an in-vehicle battery system (see, for example, Patent Document 1) that is repeatedly charged and discharged, the state of the battery such as the state of charge (SOC) and the deteriorated state (SOH) of the battery cell. Accurate detection of data is important from the viewpoint of ensuring vehicle cruising range and long-term use of battery cells. For example, an electric vehicle runs on the electric energy stored in a battery cell as a power source, and if the remaining capacity cannot be detected correctly, the planned mileage cannot be secured or the vehicle suddenly stops, which impairs convenience. Will be. In addition, it is important to accurately detect the deteriorated state of the battery cell in order to use the battery cell safely.

Japanese Unexamined Patent Publication No. 2017-32311

In order to detect the SOC and SOH of a cell with high accuracy, it is important to detect the current value and voltage value that are the basis of the calculation with high accuracy.

The present invention has been made in view of such a situation, and an object of the present invention is to provide a technique for estimating the state of a plurality of cells connected in series with high accuracy.

In order to solve the above problems, the management device of an embodiment of the present invention includes a current detection system that detects a current flowing through a plurality of cells connected in series, and a voltage detection system that detects a voltage of each of the plurality of cells. And a calculation unit that calculates data for managing the states of the plurality of cells based on the value of the current detected by the current detection system and the value of the voltage detected by the voltage detection system. Be prepared. The current detection system includes at least one independent filter. The voltage detection system includes at least one independent filter. The total characteristics of at least one filter included in the current detection system and the total characteristics of at least one filter included in the voltage detection system are substantially the same.

It should be noted that any combination of the above components and the conversion of the expression of the present invention between methods, devices, systems and the like are also effective as aspects of the present invention.

According to the present invention, data indicating the states of a plurality of cells connected in series can be estimated with high accuracy.

It is a figure which shows the structural example of the power storage system which concerns on embodiment of this invention. 2 (a)-(c) are diagrams for explaining a method of calculating SOC. It is the figure which simplified the current detection system and voltage detection system of FIG. It is a figure which shows the structural example of an analog filter. 5 (a)-(c) is a diagram showing a configuration example of a system including a plurality of filters. 6 (a)-(c) are diagrams showing the filter characteristics of the current detection system and the voltage detection system in the first embodiment before adjustment. 7 (a)-(c) are diagrams showing the adjusted filter characteristics of the current detection system and the voltage detection system in the first embodiment. 8 (a)-(c) are diagrams showing the filter characteristics of the current detection system and the voltage detection system before adjustment in the second embodiment. 9 (a)-(c) are diagrams showing the adjusted filter characteristics of the current detection system and the voltage detection system in the second embodiment.

FIG. 1 is a diagram showing a configuration example of a power storage system 1 according to an embodiment of the present invention. The power storage system 1 includes a power storage module 50 and a management device 10. The power storage module 50 includes a plurality of cells connected in series. As the cell, a lithium ion battery cell, a nickel hydrogen battery cell, a lead battery cell, an electric double layer capacitor cell, a lithium ion capacitor cell, or the like can be used. Hereinafter, in the present specification, an example in which a lithium ion battery cell (nominal voltage: 3.6-3.7 V) is used is assumed. FIG. 1 depicts an example of using an assembled battery in which six lithium ion battery cells (cells E1-E6) are connected in series.

The current detection element 21 is connected in series with the plurality of cells E1-E6. A shunt resistor or a Hall element can be used for the current detection element 21. The current detection element 21 outputs the current flowing through the plurality of cells E1-E6 as a voltage signal.

The management device 10 includes an analog filter 22 of the current detection system 20, an analog filter 32 of the voltage detection system 30, an ASIC (Application Specific Integrated Circuit) 33, and a microprocessor 40. The ASIC 33 includes a multiplexer 34 and an AD converter 35. The microprocessor 40 includes an AD converter 25 of the current detection system 20, a digital filter 26 of the current detection system 20, a digital filter 36 of the voltage detection system 30, and an arithmetic unit 41.

The current detection element 21, the analog filter 22, the AD converter 25 and the digital filter 26 constitute the current detection system 20, and the analog filter 32, the multiplexer 34, the AD converter 35 and the digital filter 36 form the voltage detection system 30.

The current value detected by the current detection element 21 is input to the analog filter 22. The analog filter 22 removes the high frequency component of the input current value and outputs it to the AD converter 25. The AD converter 25 converts the analog signal input from the analog filter 22 into a digital signal and outputs it to the digital filter 26. The digital filter 26 further removes the high frequency component of the current value defined by the digital signal and outputs it to the arithmetic unit 41.

The ASIC 33 is connected to each node of a plurality of cells E1-E6 connected in series by a plurality of voltage detection lines, and by detecting a voltage between two adjacent voltage detection lines, each cell E1-E6 Detect voltage. An analog filter 32 is inserted into the plurality of voltage detection lines between the plurality of cells E1-E6 and the ASIC 33. The analog filter 32 removes high-frequency components of each voltage value of the plurality of cells E1-E6 and outputs them to the ASIC 33. The multiplexer 34 in the ASIC 33 outputs the voltage values of the plurality of cells E1-E6 to the AD converter 35 in a predetermined order. The AD converter 35 converts the analog signal input from the multiplexer 34 into a digital signal.

The ASIC 33 and the microprocessor 40 are connected by digital communication via an insulating circuit such as a photocoupler. Since the ASIC 33 needs to detect the voltages of the plurality of cells E1-E6 which have been increased in voltage by the series connection, it is necessary to increase the voltage. On the other hand, the microprocessor 40 operates at a low voltage. Both need to be insulated to absorb this voltage difference. On the other hand, the current detection system 20 can be designed at low voltage, and the output of the analog filter 22 can be directly input to the microprocessor 40.

The microprocessor 40 receives from the ASIC 33 each voltage value of the plurality of cells E1-E6 defined by the digital signal. The digital filter 36 further removes the high frequency component of each voltage value defined by the digital signal and outputs it to the arithmetic unit 41.

The arithmetic unit 41 calculates the SOC and SOH of each cell E1-E6 based on the current values of the plurality of cells E1-E6 and the voltage values of the plurality of cells E1-E6. SOH is defined by the ratio of the current full charge capacity to the initial full charge capacity, and the lower the value (closer to 0%), the more the deterioration progresses.

Although not shown, the temperature of the plurality of cells E1-E6 is also input to the arithmetic unit 41 from the temperature detection system and is used for temperature compensation.

The arithmetic unit 41 can be configured by, for example, a CPU. The digital filter 26 of the current detection system 20 and the digital filter 36 of the voltage detection system 30 may be realized by a dedicated logic circuit or may be realized by digital arithmetic processing by the CPU.

Although the digital filter 36 of the voltage detection system 30 is provided in the microprocessor 40 in FIG. 1, it may be provided in the ASIC 33. In this case, the output of the digital filter 36 provided in the ASIC 33 is input to the arithmetic unit 41 of the microprocessor 40 by communication.

As shown in the following (Equation 1), the SOC of the battery is generally estimated by using the integrated value of the current applied to the battery.

However, the current sensor has an offset error, a hysteresis error, a linearity error, a temperature fluctuation error, and the like. In long-term use, the error is accumulated in the integrated current value, and it is difficult to continue to accurately estimate the SOC using only the integrated current value. Hereinafter, a general SOC and SOH detection method will be described.

2 (a)-(c) are diagrams for explaining a method of calculating SOC. FIG. 2A is a diagram showing an equivalent circuit of cell E1. FIG. 2B is a diagram showing an example of changes in the input current Ic and the output voltage Vc of the cell E1. FIG. 2C is a diagram showing an example of SOC-OCV characteristics of cell E1. However, FIGS. 2 (a)-(c) are simplified and do not necessarily show the chemical characteristics of the battery and the detailed equivalent circuit of the battery.

In FIG. 2A, Vocv is the open circuit voltage (OCV) of cell E1, Ri is the internal resistance of cell E1, Ic is the current input to cell E1, and Vc is the current input to cell E1. The voltage output from the terminals of the cell E1 at the timing is shown.

When a current flows through the cell E1, a voltage fluctuation occurs in the cell E1. When the input current at time t1 is Ic (t1), the output voltage at time t1 is Vc (t1), the input current at time t2 is Ic (t2), and the output voltage at time t2 is Vc (t2), Ic (t1). ) And Ic (t2) are ΔIc, and the difference between Vc (t1) and Vc (t2) is ΔVc, and the internal resistance Ri can be expressed by the following (Equation 2). Further, Vocv (t2) at time t2 can be expressed as follows (Equation 3).

By using the above (Equation 2) and (Equation 3), the open circuit voltage Vocv (t2) and the internal resistance Ri at time t2 can be calculated. The SOC of cell E1 can be estimated based on OCV. For example, the microprocessor 40 holds a LUT (Look Up Table) in memory that describes the SOC-OCV characteristics that define the relationship between the SOC and OCV of cell E1, and estimates the SOC from Vocv by referring to the LUT. be able to. The SOC estimated in this way may be corrected and used by using the above (Equation 1).

The SOH of cell E1 can be estimated by increasing the internal resistance Ri of cell E1. That is, it is possible to estimate the current SOH based on the SOH in the initial state and the increase in internal resistance ΔRi from the initial state.

電流検出系２０に具備されるデジタルフィルタ２６の特性（伝達関数）を

電圧検出系３０に具備されるアナログフィルタ３２の特性（伝達関数）を

電圧検出系３０に具備されるデジタルフィルタ３６の特性（伝達関数）を

とする。FIG. 3 is a simplified view of the current detection system 20 and the voltage detection system 30 of FIG.
The characteristics (transfer function) of the analog filter 22 provided in the current detection system 20

The characteristics (transfer function) of the digital filter 26 provided in the current detection system 20

The characteristics (transfer function) of the analog filter 32 provided in the voltage detection system 30

The characteristics (transfer function) of the digital filter 36 provided in the voltage detection system 30

And.

Further, the delay between the timing when the current is input to the cell E1 and the timing when the electric signal indicating the current value is input to the arithmetic unit 41 is set as tc, and the terminal of the cell E1 is formed by inputting the current to the cell E1. Let tv be the delay between the timing at which the voltage is output from between and the timing at which the electric signal indicating the voltage value is input to the arithmetic unit 41.

In the present embodiment, the current detection system 20 and the voltage detection system 30 can each include one or a plurality of independent filters. In the example shown in FIG. 3, the current detection system 20 and the voltage detection system 30 each include two filters. The two filters are composed of a first-stage analog filter 22/32 and a second-stage digital filter 26/36.

The type of filter does not matter. That is, it may be an analog type or a digital type. Further, in the case of FIG. 3, the analog filter 22/32 and the digital filter 26/36 can be regarded as independent of each other. This is because the filter characteristics of the analog filter 22/32 do not affect the filter characteristics of the digital filter 26/36.

For example, even when the two-stage RC filters are connected in series to form the analog filter 22/32, the two-stage RC filters can be treated as one analog filter because they are not independent of each other. This can be found by finding the transfer function of the analog filter.

The analog voltage signal converted into a voltage signal corresponding to the energizing current by the current detection element 21 is input to the analog filter 22 of the first stage, and the noise component is removed. The analog signal that has passed through the first-stage analog filter 22 is converted into digital data by the AD converter 25 and input to the second-stage digital filter 26. The digital filter 26 exerts its filtering ability by processing digital data discrete with a sampling period T as a signal. The output of the digital filter 26 is input to the arithmetic unit 41. In this way, the arithmetic unit 41 detects the signal output from the current detection element 21 at the timing when the current is applied to the cell E1. Let tc be the delay time between the timing when the current is applied to the cell E1 and the timing when the electric signal indicating the current value is input to the arithmetic unit 41.

The voltage between the terminals of cell E1 is input to the analog filter 32 of the first stage, and the noise component is removed. The analog signal that has passed through the first-stage analog filter 32 is converted into digital data by the AD converter 35 and input to the second-stage digital filter 36. The digital filter 36 exerts its filtering ability by processing digital data discretized in the sampling period T as a signal. The output of the digital filter 36 is input to the arithmetic unit 41. In this way, the arithmetic unit 41 detects the voltage signal between the terminals of the cell E1 that is output at the timing when the current is applied to the cell E1. Let tv be the delay time between the timing at which the voltage between terminals is output when the current is applied to the cell E1 and the timing at which the electric signal indicating the voltage value is input to the arithmetic unit 41.

In the present embodiment, the filter characteristics of the current detection system 20 and the filter characteristics of the voltage detection system 30 are substantially matched. The range considered to be substantially the same can be determined by the designer based on the required specifications and the like.

電圧検出系３０のフィルタ特性（伝達関数）を

Filter characteristics (transfer function) of the current detection system 20

Filter characteristics (transfer function) of the voltage detection system 30

位相を

とすると、伝達関数は下記（式４）に示すようにゲインと位相の積で表すことができる。図３の電流検出系２０の伝達関数は下記（式５）で、電圧検出系３０の伝達関数は下記（式６）でそれぞれ表すことができる。

Also gain

Phase

Then, the transfer function can be expressed by the product of gain and phase as shown in the following (Equation 4). The transfer function of the current detection system 20 in FIG. 3 can be expressed by the following (Equation 5), and the transfer function of the voltage detection system 30 can be expressed by the following (Equation 6).

In the present embodiment, in order to match the filter characteristics, the transfer function of the above (Equation 5) and the transfer function of the above (Equation 6) are substantially matched. That is, the gain function representing the frequency characteristic is matched in the transfer function. When expressing frequency characteristics, [dB] is often used as the unit. Therefore, the following (Equation 7) and (Equation 8) are rewritten into the following (Equation 9) and (Equation 10) in logarithmic notation.

Due to the logarithmic nature, the transfer function can be expressed as the sum of the gains of filters that are independent of each other, which is an effective and convenient method for substantially matching the filter characteristics.

In order to substantially match the above (Equation 5) and (Equation 6), the transfer function of the analog filter 22 of the current detection system 20 and the transfer function of the analog filter 32 of the voltage detection system 30 are substantially matched, and It is conceivable that the transfer function of the digital filter 26 of the current detection system 20 and the transfer function of the digital filter 36 of the voltage detection system 30 are substantially matched.

However, it is basically difficult to substantially match the analog filter 22 of the current detection system 20 and the analog filter 32 of the voltage detection system 30. It is basic to realize a current detection system 20 that detects a single current flowing through a plurality of cells E1-E6 and a voltage detection system 30 that detects each voltage of a plurality of cells E1-E6 with a circuit configuration having the same characteristics. Because it is difficult. The analog filter 32 of one cell of the voltage detection system 30 is affected by voltage fluctuations of another cell and the like.

Therefore, in order to substantially match the filter characteristics of the current detection system 20 as a whole with the filter characteristics of the voltage detection system 30 as a whole, the transfer function of the digital filter 26 of the current detection system 20 and / or the digital filter 36 of the voltage detection system 30 Adjust the transfer function. In the case of logarithmic notation as shown in (Equation 9) and (Equation 10) above, the frequency characteristics of a system having a plurality of independent filters can be expressed as the sum of the frequency characteristics of each filter. That is, the sum of the frequency characteristics of the analog filter 22 of the current detection system 20 and the frequency characteristics of the digital filter 26 and the sum of the frequency characteristics of the analog filter 32 of the voltage detection system 30 and the frequency characteristics of the digital filter 36 are substantially matched. Just do it.

Further, in the present embodiment, the delay tk of the current detection system 20 and the delay tv of the voltage detection system 30 are substantially matched. For example, the delay tk of the current detection system 20 and the delay tv of the voltage detection system 30 are estimated, and software programming of the microprocessor 40 is created so that the two match.

FIG. 4 is a diagram showing a configuration example of the analog filter 22/32. FIG. 4 shows an example in which the analog filter 22/32 is configured by an RC filter (low-pass filter) composed of a resistor R and a capacitor C. Hereinafter, the transfer function of the RC filter is derived from the circuit equation.

また系の電流変化は電荷量の変化であるため下記（式１２）が成り立つ。

したがって上記（式１１）は下記（式１３）に書き換えることができる。

上記（式１３）を、入力ｘ（ｔ）、出力ｙ（ｔ）をとる系と考えると、上記（式１３）を下記（式１４）に書き換えることができる。

上記（式１４）をラプラス変換すると下記（式１５）になる。

よって伝達関数Ｇ（ｓ）は下記（式１６）になる。

ｓ＝ｊωとすると、ＬＰＦの伝達関数Ｇ（ｊω）は下記（式１７）になる。

上記（式１７）を書き換えると下記（式１８）が導出される。

The following (Equation 11) holds from the circuit configuration of the RC circuit.

Further, since the change in the current of the system is the change in the amount of electric charge, the following (Equation 12) holds.

Therefore, the above (Equation 11) can be rewritten as the following (Equation 13).

Considering the above (Equation 13) as a system that takes an input x (t) and an output y (t), the above (Equation 13) can be rewritten as the following (Equation 14).

Laplace transform of the above (Equation 14) gives the following (Equation 15).

Therefore, the transfer function G (s) becomes the following (Equation 16).

If s = jω, the transfer function G (jω) of the LPF is as follows (Equation 17).

By rewriting the above (Equation 17), the following (Equation 18) is derived.

The transfer function of the analog filter 22/32 in FIG. 3 can be expressed by the following (Equation 19) from the above (Equation 4).

Therefore, the gain function of the analog filter 22/32 can be obtained by using the above (Equation 18). Specifically, a desired filter characteristic (frequency characteristic) can be obtained by adjusting the constants of the resistor R and the capacitor C. The above filter configuration is an example, and the filter configuration such as a two-stage RC filter or an active filter using an operational amplifier is not limited to the above.

Next, the digital filter will be described. Hereinafter, an example in which a first-order lag IIR (Infinite Impulse Response) filter (infinite impulse response filter) is used as the digital filter will be described.

Ｇ［ｚ］を伝達関数、Ｘ［ｚ］をｘ［ｎ］のＺ変換、Ｙ［ｚ］をｙ［ｎ］のＺ変換とすると、上記（式２０）は下記（式２１）に書き換えられ、伝達関数Ｇ［ｚ］は下記（式２２）で表される。

伝達関数の周波数応答を求めるため、ｚ＝ｅ^ｊωＴとすると、上記（式２２）は下記（式２３）に書き換えられる。

Ｔはサンプリング周期である。The difference equation of the first-order lag system when y [n] is an output signal and x [n] is an input signal is expressed by the following (Equation 20). a is a constant for determining the weight of the previous value and the current value.

Assuming that G [z] is a transfer function, X [z] is a Z-transform of x [n], and Y [z] is a Z-transform of y [n], the above (Equation 20) is rewritten as the following (Equation 21). , The transfer function G [z] is represented by the following (Equation 22).

In order to obtain the frequency response of the transfer function, if z = e ^jωT , the above (Equation 22) is rewritten as the following (Equation 23).

T is the sampling period.

オイラーの公式により、上記（式２３）は下記（式２５）に書き換えられる。

より、伝達関数の周波数応答は下記（式２６）となり、展開すると下記（式２７）になる。

In order to obtain the gain | G |, Euler's formula shown in the following (Equation 24) is used.

According to Euler's formula, the above (Equation 23) is rewritten as the following (Equation 25).

Therefore, the frequency response of the transfer function becomes the following (Equation 26), and when expanded, it becomes the following (Equation 27).

The transfer function of the digital filter 26/36 in FIG. 3 can be represented by the following (Equation 28) from the above (Equation 4).

Therefore, the gain function of the digital filter 26/36 can be obtained by using the above (Equation 27). Specifically, a desired filter characteristic (frequency characteristic) can be obtained by adjusting the constant a and the sampling period T. The above filter configuration is an example, and the filter configuration such as a secondary IIR filter and an FIR (Finite Impullse Response) filter (finite impulse response filter) is not limited to the above.

Next, the independence of the filter will be described.
5 (a)-(c) is a diagram showing a configuration example of a system including a plurality of filters. FIG. 5A shows a system in which the first filter F1 and the second filter F2 are connected in columns. The first filter F1 is a low-pass filter (LPF) composed of a first resistor R1 and a first capacitor C1. The second filter F2 is a low-pass filter (LPF) composed of a second resistor R2 and a second capacitor C2, and has the same configuration as the first filter F1. The first filter F1 and the second filter F2 are not independent, and the transfer function of the system shown in FIG. 5A can be represented by the product of the gain G1 of the first filter F1 and the gain G2 of the second filter F2. Can not.

In FIG. 5B, the voltage follower OP1 is inserted between the first filter F1 and the second filter F2 in FIG. 5A. The voltage follower OP1 is composed of an operational amplifier. The operational amplifier shall operate ideally. The voltage follower OP1 is an element having a high input impedance and a gain of 1, cuts off the current input from the first filter F1, and outputs the voltage input from the first filter F1 to the second filter F2. The transfer function of the system shown in FIG. 5B can be represented by the product of the gain G1 of the first filter F1 and the gain G2 of the second filter F2.

FIG. 5C is the same as the circuit configuration shown in FIG. The transfer function of the system shown in FIG. 5C can be represented by the product of the gain G1 of the analog filter 22/32 and the gain G2 of the digital filter 26/36.

When considering a system composed of two filters in this way, it can be said that when the input signal IN is directly applied to the filter in the subsequent stage, the filter in the previous stage and the filter in the latter stage are not independent. On the contrary, when the input signal IN is not directly applied to the filter in the subsequent stage, it can be said that the filter in the previous stage and the filter in the subsequent stage are independent.

Hereinafter, a specific example in which the filter characteristics of the current detection system 20 and the filter characteristics of the voltage detection system 30 are substantially matched will be described. In the following example, a primary RC filter (LPF) is used for the analog filter 22/32 of the current detection system 20 and the voltage detection system 30, and 1 is used for the digital filter 26/36 of the current detection system 20 and the voltage detection system 30. Assume a configuration that uses the following IIR filter. It is assumed that the RC filter in the first stage and the IIR filter in the second stage are independent of each other. Specific Example 1 shows an example in which the constants of the resistor R and the capacitor C of the analog filter 22/32 are different, and Specific Example 2 shows a case where the sampling period of the digital filter 26/36 is different.

6 (a)-(c) are diagrams showing the filter characteristics of the current detection system 20 and the voltage detection system 30 before adjustment in the first embodiment. FIG. 6A shows the filter characteristics of the analog filter 22/32, FIG. 6B shows the filter characteristics of the digital filter 26/36, and FIG. 6C shows the entire current detection system 20 and the voltage detection system 30. The overall filter characteristics are shown.

7 (a)-(c) are diagrams showing the adjusted filter characteristics of the current detection system 20 and the voltage detection system 30 in the first embodiment. FIG. 7A shows the filter characteristics of the analog filter 22/32, FIG. 7B shows the filter characteristics of the digital filter 26/36, and FIG. 7C shows the entire current detection system 20 and the voltage detection system 30. The overall filter characteristics are shown.

As shown in FIG. 6A, the filter characteristics of the analog filter 22 of the current detection system 20 and the filter characteristics of the analog filter 32 of the voltage detection system 30 do not match. In Specific Example 1, the resistance R constant of the analog filter 22 (RC filter) of the current detection system 20 is set to 56 [kΩ], the constant of the capacitor C is set to 0.33 [μF], and the analog filter of the voltage detection system 30 is set. The constant of the resistor R of the 32 (RC filter) is set to 33 [kΩ], and the constant of the capacitor C is set to 0.10 [μF].

As shown in FIG. 6B, the filter characteristics of the digital filter 26 of the current detection system 20 and the filter characteristics of the digital filter 36 of the voltage detection system 30 are substantially the same. In Specific Example 1, the sampling period T of the digital filter 26 (IIR filter) of the current detection system 20 is set to 1 [ms], and the constant a is set to 0.75. Similarly, in the digital filter 36 (IIR filter) of the voltage detection system 30, the sampling period T is set to 1 [ms] and the constant a is set to 0.75.

As shown in FIG. 6 (c), the filter characteristics of the entire current detection system 20 based on the filter characteristics of FIGS. 6 (a) and 6 (b) and the filter characteristics of the entire voltage detection system 30 do not match. With such filter characteristics, it is difficult to detect the cell state with high accuracy.

Next, in the management device 10 including the current detection system 20 and the voltage detection system 30 designed in this way, a method of substantially matching the filter characteristics of the entire current detection system 20 and the filter characteristics of the entire voltage detection system 30 is provided. explain. In Specific Example 1, the value of the constant a of the digital filter 36 (IIR filter) of the voltage detection system 30 is adjusted so that the filter characteristics of the entire current detection system 20 and the filter characteristics of the entire voltage detection system 30 are substantially matched. ..

As shown in FIG. 7A, the filter characteristics of the analog filter 22 of the current detection system 20 and the filter characteristics of the analog filter 32 of the voltage detection system 30 are the same as the filter characteristics before adjustment shown in FIG. 6A. Is.

In Specific Example 1, the constant a of the digital filter 36 (IIR filter) of the voltage detection system 30 is changed from 0.75 to 0.95. As shown in FIG. 7B, due to the change of the constant a, the filter characteristics of the digital filter 26 of the current detection system 20 and the filter characteristics of the digital filter 36 of the voltage detection system 30 do not match.

As shown in FIG. 7C, after the constant a of the digital filter 36 (IIR filter) of the voltage detection system 30 is changed, the filter characteristics of the current detection system 20 as a whole and the filter characteristics of the voltage detection system 30 as a whole are substantially the same. Matches. Even if the individual filter characteristics that are independent in this way do not match, the state of the cell can be detected with high accuracy by matching the filter characteristics of the entire system that combines them.

8 (a)-(c) are diagrams showing the filter characteristics of the current detection system 20 and the voltage detection system 30 before adjustment in the second embodiment. FIG. 8A shows the filter characteristics of the analog filter 22/32, FIG. 8B shows the filter characteristics of the digital filter 26/36, and FIG. 8C shows the entire current detection system 20 and the voltage detection system 30. The overall filter characteristics are shown.

9 (a)-(c) are diagrams showing the adjusted filter characteristics of the current detection system 20 and the voltage detection system 30 in the second embodiment. 9 (a) shows the filter characteristics of the analog filter 22/32, FIG. 9 (b) shows the filter characteristics of the digital filter 26/36, and FIG. 9 (c) shows the entire current detection system 20 and the voltage detection system 30. The overall filter characteristics are shown.

As shown in FIG. 8A, the filter characteristics of the analog filter 22 of the current detection system 20 and the filter characteristics of the analog filter 32 of the voltage detection system 30 are substantially the same. In Specific Example 2, the constant of the resistance R of the analog filter 22 (RC filter) of the current detection system 20 is set to 33 [kΩ], and the constant of the capacitor C is set to 0.10 [μF]. Similarly, in the analog filter 32 (RC filter) of the voltage detection system 30, the constant of the resistor R is set to 33 [kΩ], and the constant of the capacitor C is set to 0.10 [μF].

As shown in FIG. 8B, the filter characteristics of the digital filter 36 of the current detection system 20 and the filter characteristics of the digital filter 36 of the voltage detection system 30 do not match. In Specific Example 2, the sampling period T of the digital filter 26 (IIR filter) of the current detection system 20 is set to 1 [ms], the constant a is set to 0.75, and the digital filter 36 (IIR filter) of the voltage detection system 30 is set to 0.75. The sampling period T is set to 10 [ms] and the constant a is set to 0.75.

As shown in FIG. 8 (c), the filter characteristics of the entire current detection system 20, which is premised on the filter characteristics of FIGS. 8 (a) and 8 (b), and the filter characteristics of the entire voltage detection system 30 do not match. With such filter characteristics, it is difficult to detect the cell state with high accuracy.

Next, in the management device 10 including the current detection system 20 and the voltage detection system 30 designed in this way, a method of substantially matching the filter characteristics of the entire current detection system 20 and the filter characteristics of the entire voltage detection system 30 is provided. explain. In Specific Example 2, the constant of the capacitor C of the analog filter 22 (RC filter) of the voltage detection system 30 is adjusted so that the filter characteristics of the entire current detection system 20 and the filter characteristics of the entire voltage detection system 30 are substantially matched. ..

In Specific Example 2, the constant of the capacitor C of the analog filter 32 (RC filter) of the voltage detection system 30 is changed from 0.1 [μF] to 0.01 [μF]. As shown in FIG. 9A, the filter characteristics of the analog filter 22 of the current detection system 20 and the filter characteristics of the analog filter 32 of the voltage detection system 30 do not match due to the change of the constant of the capacitor C.

As shown in FIG. 9B, the filter characteristics of the digital filter 26 of the current detection system 20 and the filter characteristics of the digital filter 36 of the voltage detection system 30 are the same as the filter characteristics before adjustment shown in FIG. 8B. Is.

As shown in FIG. 9C, after the constant a of the digital filter 36 (IIR filter) of the voltage detection system 30 is changed, the filter characteristics of the current detection system 20 as a whole and the filter characteristics of the voltage detection system 30 as a whole become substantial. Matches. In FIG. 9C, the filter characteristics substantially match at frequencies of 1/2 or less of the sampling frequency of the current detection system 20, and the filter characteristics do not match at frequencies of 1/2 or more of the sampling frequency. The range of 1/2 or more of the sampling frequency is the range in which the folding characteristic of sampling appears, and is not considered from the sampling theorem. Even if the individual filter characteristics that are independent in this way do not match, the state of the cell can be detected with high accuracy by matching the filter characteristics of the entire system that combines them.

In Specific Example 1, in a circuit configuration in which the constants of the capacitors C of the analog filter 22/32 are different, the filter characteristics of the entire current detection system 20 and the entire voltage detection system 30 are adjusted by adjusting the value of the constant a of the digital filter 26/36. An example of substantially matching the filter characteristics of is described. In Specific Example 2, in a design in which the sampling period T of the digital filter 26/36 is different, the filter characteristics of the entire current detection system 20 and the filter of the entire voltage detection system 30 are adjusted by adjusting the constant of the capacitor C of the analog filter 22/32. An example of substantially matching the characteristics has been described.

The present embodiment is not limited to these examples, and in order to substantially match the filter characteristics of the entire current detection system 20 and the filter characteristics of the entire voltage detection system 30, the constant of the resistor R, the constant of the capacitor C, At least one parameter of the sampling period T and the constant a can be adjusted. The designer adjusts each parameter so that the transfer function of the current detection system 20 and the transfer function of the voltage detection system 30 substantially match. At that time, a plurality of parameters may be adjusted instead of one parameter as in Specific Examples 1 and 2. The range of each parameter is limited by hardware resources.

As described above, according to the present embodiment, it is possible to improve the detection accuracy of the current value and each voltage value of a plurality of cells connected in series. Therefore, it is possible to estimate with high accuracy data indicating the state of cells such as SOC and SOH of each cell.

If the current signal and voltage signal detected when the charging or discharging current is energized are signals containing noise components, it becomes difficult to accurately grasp the state of the cell. This is because when an attempt is made to detect the cell state with a signal containing noise, the arithmetic unit 41 may perform an erroneous calculation and the cell state may not be calculated accurately. Therefore, by removing the noise component with a filter, the state of the cell can be detected accurately. At that time, the fact that the filter characteristics of the current detection system 20 and the filter characteristics of the voltage detection system 30 are substantially the same greatly contributes to the improvement of the detection accuracy.

Conventionally, development has been made in which the filter characteristics of the analog filters 22/32 and the digital filters 26/36 of the current detection system 20 and the voltage detection system 30 are substantially matched. On the other hand, in the present embodiment, flexible and highly accurate filter adjustment can be realized by substantially matching the filter characteristics of the entire current detection system 20 and the filter characteristics of the entire voltage detection system 30. In the present embodiment, even when one detection system is provided with an analog filter and a digital filter and another detection system is provided with only a digital filter, the filter characteristics of the respective detection systems are substantially matched. Is possible.

For example, when the current detection system 20 and the voltage detection system 30 are developed independently, the analog filters constituting the respective detection systems may not match. Also, if each is an independent sensor unit, different sampling cycles may be used. When such sensors are combined and systematized, it is necessary to redevelop the sensors themselves in order to match the filter characteristics of a plurality of detection systems, which requires a great deal of labor. On the other hand, in the present embodiment, the filter characteristics of the plurality of detection systems can be easily and substantially matched.

The present invention has been described above based on the embodiments. Embodiments are examples, and it is understood by those skilled in the art that various modifications are possible for each of these components and combinations of each processing process, and that such modifications are also within the scope of the present invention. ..

In the above-described embodiment, an example in which the power storage system 1 is used as an in-vehicle power supply system has been described, but it can also be used for other purposes. For example, the power storage system 1 according to the present embodiment can be applied to a stationary power storage system for backup / peak shift. It can also be applied to a power supply system for portable terminal devices such as notebook PCs, tablets, and smartphones.

In addition, the embodiment may be specified by the following items.

[Item 1]
A current detection system (20) that detects the current flowing through a plurality of cells (E1-E6) connected in series, and a current detection system (20).
A voltage detection system (30) that detects the voltage of each of the plurality of cells (E1-E6), and
For managing the state of the plurality of cells (E1-E6) based on the value of the current detected by the current detection system (20) and the value of the voltage detected by the voltage detection system (30). A calculation unit (41) for calculating data is provided.
The current detection system (20) includes at least one independent filter (22, 26).
The voltage detection system (30) includes at least one independent filter (32, 36).
The total characteristics of at least one filter (22, 26) included in the current detection system (20) and the total characteristics of at least one filter (32, 36) included in the voltage detection system (30) are A management device (10) characterized in that they are substantially identical.
According to this, the current value and each voltage value of a plurality of cells (E1-E6) can be detected with high accuracy, and the data for managing the state of the plurality of cells (E1-E6) can be detected with high accuracy. Can be estimated.
[Item 2]
The current detection system (20) includes an analog filter (22), an A / D converter (25), and a digital filter (26).
The voltage detection system (30) includes an analog filter (32), an A / D converter (35), and a digital filter (36).
The total characteristics of the analog filter (22) and the digital filter (26) included in the current detection system (20), and the total characteristics of the analog filter (32) and the digital filter (36) included in the voltage detection system (30). The management device (10) according to item 1, wherein the characteristics of the above are substantially the same.
According to this, it is not necessary to substantially match the filter characteristics between the analog filters (22/26) and the digital filters (32/36), and the design flexibility is improved.
[Item 3]
When the characteristics of the analog filter (22) included in the current detection system (20) and the characteristics of the analog filter (32) included in the voltage detection system (30) do not substantially match, the current detection system By adjusting at least one of the characteristics of the digital filter (26) included in (20) and the characteristics of the digital filter (36) included in the voltage detection system (30), the current detection system (20) can be used. The total characteristics of the included analog filter (22) and digital filter (26) are substantially the same as the total characteristics of the analog filter (32) and digital filter (36) included in the voltage detection system (30). The management device (10) according to item 2, wherein the control device is to be used.
According to this, the difference in filter characteristics due to the difference in the element components, voltage, environment, etc. of the analog filter (22) included in the current detection system (20) and the analog filter (32) included in the voltage detection system (30). Can be absorbed by a digital filter (32/36).
[Item 4]
The delay time by the current detection system (20) when detecting the current flowing through the plurality of cells (E1-E6) and outputting the current value to the calculation unit (41), and the plurality of cells (E1-E6). 1), wherein the delay time by the voltage detection system (30) when detecting each voltage of) and outputting the voltage value to the calculation unit (41) is substantially the same. The management device (10) according to any one of 3.
According to this, it is possible to improve the detection accuracy of the current value and each voltage value of the plurality of cells (E1-E6).
[Item 5]
A power storage module (50) in which a plurality of cells (E1-E6) are connected in series, and
The management device (10) according to any one of items 1 to 4 for managing the power storage module (50).
A power storage system (1).
According to this, the current value and each voltage value of a plurality of cells (E1-E6) can be detected with high accuracy, and the data for managing the state of the plurality of cells (E1-E6) can be detected with high accuracy. Can be estimated.

1 power storage system, 10 management device, 20 current detection system, 21 current detection element, 22 analog filter, 25 AD converter, 26 digital filter, 30 voltage detection system, 32 analog filter, 33 ASIC, 34 multiplexer, 35 AD converter , 36 Digital filter, 40 Microprocessor, 41 Arithmetic, 50 Power storage module, E1-E6 cell, F1 1st filter, F2 2nd filter, R resistance, R1 1st resistance, R2 2nd resistance, C capacitor, C1 1st 1 capacitor, C2 2nd capacitor, OP1 voltage follower.

Claims (5)

A current detection system that detects the current flowing through multiple cells connected in series,
A voltage detection system that detects the voltage of each of the plurality of cells,
It is provided with a current value detected by the current detection system and a calculation unit that calculates data for managing the states of the plurality of cells based on the voltage value detected by the voltage detection system.
The current detection system includes at least one independent filter.
The voltage detection system includes at least one independent filter.
A management device, characterized in that the total characteristics of at least one filter included in the current detection system and the total characteristics of at least one filter included in the voltage detection system are substantially the same. The current detection system includes an analog filter, an A / D converter, and a digital filter.
The voltage detection system includes an analog filter, an A / D converter, and a digital filter.
The claim is characterized in that the total characteristics of the analog filter and the digital filter included in the current detection system and the total characteristics of the analog filter and the digital filter included in the voltage detection system are substantially the same. The management device according to 1. When the characteristics of the analog filter included in the current detection system and the characteristics of the analog filter included in the voltage detection system do not substantially match, the characteristics of the digital filter included in the current detection system and the voltage detection By adjusting at least one of the characteristics of the digital filter included in the system, the total characteristics of the analog filter and the digital filter included in the current detection system and the total characteristics of the analog filter and the digital filter included in the voltage detection system are adjusted. The management device according to claim 2, wherein the characteristics of the above are substantially the same. The delay time by the current detection system when detecting the current flowing through the plurality of cells and outputting the current value to the calculation unit, and the voltage value by detecting the voltage of each of the plurality of cells to the calculation unit. The management device according to any one of claims 1 to 3, wherein the delay time due to the voltage detection system at the time of output is substantially the same. A power storage module in which multiple cells are connected in series,
The management device according to any one of claims 1 to 4, which manages the power storage module, and
A power storage system characterized by being equipped with.

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