JPWO2019013054A1 - Gate drive circuit capable of high-speed switching - Google Patents

Abstract

A gate drive circuit (1) for driving a gate of a power switching element (PS) includes an inductor (L1) and a first switch provided between one end of the inductor (L1) and a power supply potential (VDD). (Q1), a second switch (Q2) provided between the other end of the inductor (L1) and the ground potential, and a first connection node (C1) between the first switch (Q1) and the inductor (L1). A first diode (D1) having a cathode connected to the second diode, and a second diode (D2) having an anode connected to a second connection node (C2) between the second switch (Q2) and the inductor (L1). , The anode of the first diode (D1) is connected to the cathode of the second diode (D2), and the gate is the third connection between the anode of the first diode (D1) and the cathode of the second diode (D2). It is connected to the node (C3).

Description

  The present invention relates to a gate drive circuit capable of switching a power switching element at high speed.

  In the field of power energy application, the pulse high power technology has a large position, and many drive / control circuits have been proposed for controlling power energy by driving voltage-driving power semiconductor switching elements such as FETs and IGBTs. As such a drive / control circuit, an on-drive circuit for applying an on-voltage to the gate of the power semiconductor switching element and an off-drive circuit for applying an off-voltage are provided to turn on the power semiconductor switching element. -The one that controls the off state is generally used.

  In these drive / control circuits, in order to increase power efficiency, to prevent damage to the power semiconductor switching element, and to prevent adverse effects on target equipment and peripheral equipment, switching of the power semiconductor switching element is performed. It is desired to reduce electromagnetic noise that sometimes occurs. As one of the methods, a method is known in which a gate resistor is connected to the gate of the power semiconductor switching element to finely adjust the gate current flowing in the power semiconductor switching element during the period required for turn-on or turn-off (for example, , Non-Patent Document 1).

Non-Patent Document 1 describes the circuit shown in FIG. In FIG. 10, a gate drive circuit 10 including two switches Q11 and Q12 connected in series drives a gate of a power switching element PS composed of a SiC-MOSFET. A gate resistance R _G is connected to the gate of the power switching element PS, and the gate current is adjusted by on / off control of the switches Q11 and Q12. Here, since the power switching element PS has an internal resistance of the gate and an internal capacitance Ciss generated between the gate and the source, switching is rate-controlled by these. For example, when a SiC-MOSFET manufactured by ROHM Co., Ltd. (model name: SCT2450KE) is used as the power switching element PS, the internal resistance is 25Ω and the internal capacitance is 463 pF. Therefore, it takes about 35 ns to charge the gate voltage of the power switching element PS by 95%.

  Further, the switching operation of the power switching element PS is a charging / discharging process of the internal capacitance Ciss in terms of an electric circuit. Therefore, when the gate resistance Rg is reduced, the current of the gate current is increased and the time required for secondary discharge of the internal capacitance Ciss of the gate is shortened, so that the switching loss is reduced but the switching noise is increased. On the contrary, if the gate resistance Rg is increased, switching noise is reduced but switching loss is increased.

  In order to solve this problem, by setting the gate resistance to a low resistance value, the source / drain voltage is driven so as to rise rapidly (high-speed switching), and when the source / drain voltage reaches a predetermined value. A driving method for switching the gate resistance to a high resistance value has been proposed. However, the switching period of the voltage-driven power semiconductor switching device used as the device to be driven is usually several 100 ns or less, and the resistance value must be switched in good timing within an extremely short switching period. Therefore, it must be configured using a high-speed element for changing the gate resistance value and a high-precision sensor for detecting a high voltage, which not only makes the device complicated and expensive, but also There is a problem that control is difficult because there is no margin in control timing, and it is difficult to eliminate the trade-off relationship between switching noise reduction and switching loss reduction.

  On the other hand, in Non-Patent Document 2, the ON operation of the switching element is accelerated by using an inductor in the gate drive circuit. Non-Patent Document 2 describes the circuit shown in FIG. In FIG. 11, a gate driving circuit 20 including switches Q21 and Q22 connected in series and an inductor L21 provided between the switches Q21 and Q22 drives a gate of a power switching element PS configured by a SiC-MOSFET. To do. In the gate drive circuit 20, by turning on the switches Q21 and Q22 before switching, energy of the magnetic field is stored in the inductor L1, and then the gate is charged by the current from the inductor L1. As a result, a constant current is supplied to the gate regardless of the internal resistance of the gate, so that the ON operation of the power switching element PS can be speeded up.

  However, in Non-Patent Document 2, it is not possible to speed up the off operation of the power switching element PS. Further, when the energy of the magnetic field is excessively stored in the inductor L21, there is a problem that the gate of the power switching element PS is destroyed.

Bo Wang, 6 others, "An Efficient High-Frequency Drive Circuit for GaN Power HFETs", IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, 2009, Vol.45, No.2, p.843-853 Philip Anthony, 2 others, "High-Speed Resonant Gate Driver With Controlled Peak Gate Voltage for Silicon Carbide MOSFETs", IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, 2014, Vol.50, No.1, p.573-583

  An object of the present invention is to solve the above-mentioned problems, and to provide a gate drive circuit having a simple circuit configuration, which achieves high-speed on / off drive of a power switching element of a power circuit and high reliability. To do.

  A gate drive circuit according to the present invention is a gate drive circuit for driving a gate of a power switching element of a power circuit, the first drive switch being provided between an inductor and one end of the inductor and a power supply potential. A second switch provided between the other end of the inductor and a reference potential lower than the power supply potential; and a first diode having a cathode connected to a first connection node between the first switch and the inductor. A second diode whose anode is connected to a second connection node between the second switch and the inductor, and a control circuit for controlling conduction / non-conduction of the first switch and the second switch, An anode of the first diode and a cathode of the second diode are connected to each other, and the gate has an anode of the first diode and the second diode. Characterized in that it is connected to the third connection node between the cathode of the diode.

  In the gate drive circuit according to the present invention, the control circuit controls the first switch and the second switch to be in a non-conducting state and a conducting state, respectively, when the power switching element is in an off state, and the control circuit controls the power switching element. When the device is turned on, both the first switch and the second switch are controlled to be in a conductive state, and after a predetermined time, the second switch is controlled to be in a non-conductive state.

  In the gate drive circuit according to the present invention, the control circuit controls the first switch and the second switch to be in a conductive state and a non-conductive state, respectively, when the power switching element is in an ON state, and the power switching element When turning off, the first switch and the second switch are both controlled to be in a conductive state, and after a predetermined time, the first switch is controlled to be in a non-conductive state.

  In the gate drive circuit according to the present invention, the reference potential may be a ground potential.

  According to the present invention, it is possible to provide a gate drive circuit having a simple circuit configuration, which achieves both high speed on / off drive of a power switching element of a power circuit and high reliability.

It is a circuit diagram showing composition of a switching element for electric power and a gate drive circuit concerning an embodiment of the present invention. FIG. 2 is a circuit diagram for explaining on / off control of a power switching element by the gate drive circuit shown in FIG. 1. FIG. 2 is a circuit diagram for explaining on / off control of a power switching element by the gate drive circuit shown in FIG. 1. FIG. 2 is a circuit diagram for explaining on / off control of a power switching element by the gate drive circuit shown in FIG. 1. FIG. 6 is a circuit diagram showing a circuit configuration for performing a double pulse test in the example of the present invention. It is a graph for explaining the definitions of the on time and the off time of the power switching element. It is a graph which shows the result of the double pulse test in the Example of this invention, (a) is a waveform of the gate-source voltage of a power switching element, (b) is the drain-source voltage of a power switching element. And (c) is the waveform of the drain current of the power switching element. It is the graph which showed the change of switching time when changing the drain current of the electric power switching element in the example of the present invention. It is a simulation result of the response characteristic of the power switching element by the gate drive circuit of this invention and the conventional gate drive circuit, (a) of the switching characteristic at the time of the gate-source voltage of a power switching element at the time of off and on. 6B is a simulation result, and FIG. 6B is a simulation result of switching characteristics when the drain-source voltage of the power switching element is off and on. It is a circuit diagram which shows the structure of the conventional gate drive circuit. It is a circuit diagram which shows the structure of the other conventional gate drive circuit.

  Embodiments according to the present invention will be described below with reference to the drawings.

  FIG. 1 is a circuit diagram showing the configurations of a power switching element PS and a gate drive circuit 1 according to this embodiment. The power switching element PS is composed of a SiC-MOSFET whose source is grounded.

  The gate drive circuit 1 is a circuit for driving the gate of the power switching element PS which is a driven element, and includes an inductor L1, a first switch Q1, a second switch Q2, a first diode D1, and a first diode D1. Two diodes D2 and a control circuit 2 are provided. In practice, elements such as MOSFETs and bipolar transistors can be used as the first switch Q1 and the second switch Q2. Here, in order to make the explanation easy to understand, it is expressed as a mere switch.

  The inductor L1 has an inductance of a preset size, and the inductance is, for example, 50 to 150 nH.

  The first switch Q1 is provided between one end of the inductor L1 and the power supply potential VDD (DC 18 V in this embodiment). The second switch Q2 is provided between the other end of the inductor L1 and a reference potential (ground potential in this embodiment) lower than the power supply potential VDD. That is, the first switch Q1, the inductor L1, and the second switch Q2 are connected in series in this order between the power supply potential VDD and the ground potential.

  The cathode of the first diode D1 is connected to the first connection node C1 between the first switch Q1 and the inductor L1, and the second diode D2 has the anode of the second connection node C2 between the second switch Q2 and the inductor L1. It is connected to the. Furthermore, the anode of the first diode D1 and the cathode of the second diode D2 are connected, and the gate of the power switching element PS has a third connection node between the anode of the first diode D1 and the cathode of the second diode D2. It is connected to C3.

  That is, the first diode D1 is provided in the forward direction from the gate of the power switching element PS toward the first connection node C1 between the first switch Q1 and the inductor L1. In addition, the second diode D2 is provided in the forward direction from the second connection node C2 between the second switch Q2 and the inductor L1 toward the gate of the power switching element PS.

  The first switch Q1 and the second switch Q2 are not particularly limited as long as they are elements that can switch conduction / non-conduction of current, and can be configured by, for example, MOSFETs or bipolar transistors as described above. The control circuit 2 can control the conduction / non-conduction of the first switch Q1 and the second switch Q2 by outputting a control signal to the control terminals of the first switch Q1 and the second switch Q2. This makes it possible to apply the on-voltage and the off-voltage to the gate of the power switching element PS to control the on / off of the power switching element PS. The on / off control of the power switching element PS will be described with reference to FIGS.

  When the power switching element PS is in the off state, the control circuit 2 controls the first switch Q1 and the second switch Q2 to be in the non-conducting state and the conducting state, respectively, as shown in FIG. It is fixed at ground potential.

  When the power switching element PS is turned on, as shown in FIG. 3, the control circuit 2 controls both the first switch Q1 and the second switch Q2 to be in a conductive state so that a current flows through the inductor L1. Stores magnetic field energy. After a predetermined time (for example, 10 ns), as shown in FIG. 4, the control circuit 2 controls the second switch Q2 to be in a non-conducting state so that the inductor L1 causes the gate of the power switching element PS to pass through the second diode D2. Supply current. As a result, the power switching element PS is turned on in a short time regardless of the internal resistance of the gate, and the gate of the power switching element PS is fixed to the power supply potential VDD of the gate drive circuit 1.

  Here, the voltage of the gate terminal of the power switching element PS does not exceed the value obtained by adding the forward voltage of the first diode D1 to the power supply potential VDD of the gate drive circuit 1 for a long time. As described above, since the gate drive circuit 1 has the function of the protection circuit, the gate of the power switching element PS is destroyed even if the energy of the magnetic field is excessively stored in the inductor L1 at the time of turn-on. Can be prevented.

  At the time of turning off the power switching element PS, as shown in FIG. 3, the control circuit 2 controls both the first switch Q1 and the second switch Q2 to be in a conductive state so that a current flows through the inductor L1. Stores magnetic field energy. After a predetermined time (for example, 10 ns), as shown in FIG. 2, the control circuit 2 controls the first switch Q1 to be in a non-conducting state so that the inductor L1 causes the gate of the power switching element PS to pass through the first diode D1. Draw current. As a result, the power switching element PS is turned off in a short time regardless of the internal resistance of the gate, and the gate of the power switching element PS is fixed to the ground potential.

  Here, the voltage of the gate terminal of the power switching element PS does not fall below the value obtained by subtracting the forward voltage of the second diode D2 from the ground potential for a long time, and the energy of the magnetic field is excessive in the inductor L1 at the time of turn-off. It is possible to prevent the gate of the power switching element PS from being destroyed even when it is accumulated in the power storage element PS. Further, when the power switching element PS is turned on and turned off, the direction of the current flowing through the inductor L1 is the same, and the reversal of the current direction accompanying the reversal of the magnetic field does not occur.

  As described above, the gate drive circuit 1 according to the present embodiment can not only speed up the ON operation of the power switching element PS of the power circuit but also speed up the OFF operation thereof. As a result, the settable range of the duty ratio can be expanded, the control range of power can be expanded, and the accuracy of control power can be improved as compared with the conventional gate drive circuit. In addition, even when the energy of the magnetic field is excessively stored in the inductor L1, the first diode D1 and the second diode D2 do not apply an excessive voltage to the gate terminal of the power switching element PS. It is possible to prevent the gate of the switching element PS from being destroyed and reduce electromagnetic noise. Further, in the gate drive circuit 1, it is possible to downsize the passive element, and particularly by forming the inductor L1 on the printed board, it is possible to easily realize the downsizing and weight saving of the power conversion circuit. Therefore, with a simple circuit configuration, it is possible to provide a gate drive circuit that achieves both high speed switching operation of the power switching element PS and high reliability.

  Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the spirit of the invention.

  Although the power switching element PS is the SiC-MOSFET in the above-described embodiment, the power switching element PS is not limited to this and may be a power switching element such as a GaN-MOSFET or a Si-MOSFET.

  Further, in the above embodiment, the first diode D1 and the second diode D2 are PN junction diodes, but the present invention is not limited to this, and may be Schottky barrier diodes, for example.

  Examples of the present invention will be described below. In the following examples, constituent elements having the same functions as those in the above embodiment are designated by the same reference numerals.

  In this example, the gate drive circuit 1 described in the above embodiment and the conventional gate drive circuit 101 were manufactured, and the switching time was evaluated by a double pulse test. Specifically, as shown in FIG. 5, the gate drive circuit 1 and the gate drive circuit 101 are connected via a changeover switch SW to a main circuit 3 of a double pulse test in which a power switching element PS of a power circuit is incorporated. ..

  In FIG. 5, the conventional gate drive circuit 101 is connected to the gate of the power switching element PS. The conventional gate drive circuit 101 is composed of a control circuit 102 that supplies a current to the gate of the power switching element PS.

  In this example, as the power switching element PS, a SiC-MOSFET manufactured by ROHM Co., Ltd. (model name: SCT2450KE) was used.

  Regarding the gate drive circuit 1, the first switch Q1 and the second switch Q2 are a P-type MOSFET and an N-type MOSFET, respectively, and in this embodiment, a p / n MOSFET (type name: FDS8958A) manufactured by Fairchild Semiconductor Co., Ltd. is used. Using. Each of the first diode D1 and the second diode is composed of two diodes connected in parallel. In this embodiment, a rectifier (model name: MURD620CT) manufactured by ON Semiconductor Co. was used. The inductor L1 has an inductance of 79 nH. As the control circuit 2 of the gate drive circuit 1, a driver IC (model name: SI8235) manufactured by Silicon Laboratories was used.

  Similarly to the control circuit 2 of the gate drive circuit 1, the control circuit 102 of the conventional gate drive circuit 101 also uses a driver IC (model name: SI8235) manufactured by Mouser Electronics.

  The main circuit 3 is mainly composed of a diode-connected switching element (SiC-MOSFET (model name: SCT2450KE) manufactured by ROHM Co., Ltd.), an inductor (145 μH), a capacitive element (100 μF), and a DC power supply (120 V).

  In order to reduce noise, the gate drive circuit 1 of this embodiment, the conventional gate drive circuit 101 and the main circuit 3 were mounted on the same substrate.

  In the double pulse test, first, the conventional gate drive circuit 101 is connected to the gate of the power switching element PS, a pulse (width of 7.4 μs) is input from the control circuit 102 shown in FIG. 5, and the inductor of the main circuit 3 and The switching element PS was driven on / off with a current of 5 A flowing in the switching element PS (between the drain and the source). Subsequently, the gate drive circuit 1 of the present embodiment is connected to the gate of the power switching element PS, and the conduction / non-conduction of the first switch Q1 and the second switch Q2 is controlled as shown in FIGS. The power switching element PS was driven on / off. In this way, the switching characteristics of the power switching element PS by the gate drive circuit 101 and the gate drive circuit 1 were measured.

Specifically, the waveforms of the gate-source voltage V _GS , the drain-source voltage V _DS , and the drain current I _D when the power switching element PS was driven on / off were measured. Then, based on these waveforms, the switching time t _off when the power switching element PS is _off and the switching time t _on when the power switching element PS is _on are evaluated. In this embodiment, as shown in FIG. 6, the switching time t _off during off, the gate - from the time the source voltage V _GS falls to 90% of the on-drain - source voltage V _DS is at the OFF time It was defined as the time until the point when 90% was reached. Further, the switching time t _on the ON-state, the gate - time to time the source voltage V _DS fell stood 10% of the off - from the time the source voltage V _GS rises to 10% of the time on the drain Was defined.

FIG. 7 is a graph showing switching characteristics of the power switching element PS by the gate drive circuit 1 and the gate drive circuit 101. 7, (a) is a waveform of the gate-source voltage V _GS of the power switching element PS, (b) is a waveform of the drain-source voltage V _DS of the power switching element PS, (c) ) Is a waveform of the drain current I _D of the power switching element PS. 7A to 7C, the broken line is a waveform when the conventional gate drive circuit 101 is connected to the gate of the power switching element PS, and the solid line is the gate drive circuit 1 of the present invention when the power switching element PS is used. The characteristics when connected to the gate of PS are shown.

From FIG. 7, the off time _{t off} when connected to the gate of the conventional gate drive circuit 101 to the power switching element PS is 18 ns, the on-time _{t on} was 31.2Ns. On the other hand, the off time _{t off} when the gate drive circuit 1 connected to the gate of the power switching element PS of the present invention is 15 ns, the on-time _{t on} was 20.2Ns. Therefore, it can be seen that the gate drive circuit 1 of the present invention can realize higher speed in both the off operation and the on operation of the power switching element PS, as compared with the conventional gate drive circuit 101.

In FIG. 7A, the gate-source voltage V _GS temporarily greatly exceeds the power supply potential (18 V), but is converged to the power supply voltage by the diode D1. Similarly, the gate-source voltage V _GS is temporarily below the ground potential (0 V), but is converged to the ground potential by the diode D2. Normally, the gate of the power switching element PS is not destroyed even if a voltage that greatly exceeds the power supply potential or a voltage that greatly falls below the ground potential is applied for about 300 ns, so that reliability is not affected.

FIG. 8 is a graph showing changes in switching time (on time t _on and off time t _off ) when the drain current I _D of the power switching element PS in this example is changed. In FIG. 8, the off time t _off of the power switching element PS becomes shorter as the drain current I _D increases, and the on time t _on becomes longer as the drain current I _D increases. Regardless of the magnitude of the drain current I _D , the gate drive circuit 1 of the present invention can be used in both the ON operation and the OFF operation more than when the conventional gate drive circuit 101 is connected to the gate of the power switching element PS. It can be seen that higher speed can be realized when the gate is connected to the power switching element PS. Specifically, when the conventional gate drive circuit 101 was connected to the gate of the power switching element PS, the average off time was 32 ns and the average on time was 25 ns. On the other hand, when the gate drive circuit 1 of the present invention was connected to the gate of the power switching element PS, the average off time was 26 ns and the average on time was 18 ns. That is, with the gate drive circuit 1 of the present invention, it was possible to realize a speedup of 20% for the off time and 30% for the on time as compared with the conventional gate drive circuit 101.

FIG. 9 is a simulation result of the response characteristics of the power switching element PS by the gate drive circuit 1 of the present invention and the conventional gate drive circuit 101. Specifically, the response characteristics were transiently analyzed by Agilent ADS. The analysis time was 20 μs, and the maximum time step size was 1 ns. In FIG. 9, (a) is a simulation result of the switching characteristics when the gate-source voltage V _GS of the power switching element PS is off and when it is on, and (b) is a drain-source voltage of the power switching element PS. It is a simulation result of the switching characteristic when the voltage V _DS is off and on. 9A and 9B, the broken line is a waveform obtained by simulation when the conventional gate drive circuit 101 is connected to the gate of the power switching element PS, and the solid line shows the gate drive circuit 1 of the present invention for power. It is a waveform by simulation when it is connected to the gate of the switching element PS.

9 that the off time _{t off} when connected to the gate of the conventional gate drive circuit 101 to the power switching element PS is 59.9Ns, on-time _{t on} was 33.5Ns. On the other hand, the off time _{t off} when the gate drive circuit 1 connected to the gate of the power switching element PS in this embodiment 47.8Ns, on-time _{t on} was 23.0Ns. Therefore, the simulation result also shows that the gate drive circuit 1 of the present embodiment can achieve higher speed in both the off operation and the on operation of the power switching element PS as compared with the conventional gate drive circuit 101. ..

  A gate drive circuit capable of high-speed switching for a power circuit of the present invention is used in power fields such as power generation and power transmission, industrial fields such as rotating machines, fans and pumps, power supply devices such as communication system factories, electric railway fields, automobile fields, It can be applied to a wide range of power electronics such as home appliances.

1 gate drive circuit 2 control circuit C1 first connection node C2 second connection node C3 third connection node D1 first diode D2 second diode L1 inductor PS power switching element Q1 first switch Q2 second switch

Claims (4)

A gate drive circuit for driving a gate of a power switching element of a power circuit,
An inductor,
A first switch provided between one end of the inductor and a power supply potential;
A second switch provided between the other end of the inductor and a reference potential lower than the power supply potential;
A first diode whose cathode is connected to a first connection node between the first switch and the inductor;
A second diode whose anode is connected to a second connection node between the second switch and the inductor;
A control circuit for controlling conduction / non-conduction of the first switch and the second switch;
Equipped with
The anode of the first diode and the cathode of the second diode are connected,
The gate drive circuit is characterized in that the gate is connected to a third connection node between the anode of the first diode and the cathode of the second diode. The control circuit is
In the off state of the power switching element,
Controlling the first switch and the second switch to a non-conductive state and a conductive state, respectively.
When the power switching element is turned on,
2. The gate drive circuit according to claim 1, wherein both the first switch and the second switch are controlled to be in a conductive state, and after a predetermined time, the second switch is controlled to be in a non-conductive state. The control circuit is
In the ON state of the power switching element,
Controlling the first switch and the second switch into a conductive state and a non-conductive state, respectively,
When the power switching element is turned off,
The gate drive circuit according to claim 1 or 2, wherein both the first switch and the second switch are controlled to be in a conductive state, and after a predetermined time, the first switch is controlled to be in a non-conductive state. ..   The gate drive circuit according to claim 1, wherein the reference potential is a ground potential.

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