JPWO2017026207A1 - Capacitor mounted film - Google Patents

Abstract

The present invention is a capacitor-mounted film in which a capacitor is disposed on a carrier sheet, wherein the capacitor includes a conductive porous substrate, a dielectric layer positioned on the conductive porous substrate, and a dielectric layer A capacitor-mounted film, characterized by being a capacitor having an upper electrode located on the capacitor.

Description

  The present invention relates to a capacitor-mounted film.

  In recent years, with the mounting of electronic devices at a high density, a capacitor having a smaller size and a higher capacitance has been demanded. In addition, in order to suppress high-frequency ripple noise that accompanies an increase in the power supply operating frequency of electronic devices, a capacitor having a lower equivalent series resistance (ESR) is required. Accordingly, there is an increasing demand for a small capacitor having a large capacitance and a low ESR. A chip-type solid electrolytic capacitor described in Patent Document 1 is known as a capacitor having such a low ESR and a small size and a high capacity.

  In Patent Document 1, an oxide film is formed on the surface of an anode made of a valve metal and a conductive polymer is used on the cathode side, thereby achieving high capacitance and low ESR. However, the capacitor of Patent Document 1 having such a configuration has a polarity, and a short circuit may occur in a circuit to which a reverse voltage is applied. It is difficult to obtain a capacitor having no polarity while achieving both a small high capacitance and low ESR.

JP 2005-57105 A

  As a result of studying a nonpolar capacitor while achieving both a small high capacitance and low ESR, the present inventor has found that a conductive porous substrate, a dielectric layer positioned on the conductive porous substrate, and a dielectric Attention was focused on a capacitor having an upper electrode located on the layer. In such a capacitor, since the conductive substrate has a porous portion, it has a very large surface area, and a high capacitance can be obtained. Moreover, since such a capacitor does not have a combination of an oxide film and a solid electrolyte layer, it has no polarity.

  However, the above capacitor has a problem that the dielectric layer is liable to cause brittle fracture when stress is applied. Since the capacitor of Patent Document 1 has a self-healing function of the dielectric layer, even if a crack occurs in the dielectric layer, it does not lead to a short circuit between the electrodes. Since a capacitor having a dielectric layer located on a porous porous substrate and an upper electrode located on the dielectric layer does not have a self-healing function of the dielectric layer, the occurrence of cracks is short-circuited between the electrodes. Is likely to cause. In addition to such problems, the above capacitor can be very small, so it is very difficult to transport and handle on the board.

  An object of the present invention is a product that facilitates handling of a capacitor comprising a conductive porous substrate, a dielectric layer located on the conductive porous substrate, and an upper electrode located on the dielectric layer. Is to provide.

  As a result of intensive studies to solve the above problems, the present inventor has mounted the above capacitor on a carrier sheet and handled it as a capacitor mounting film, thereby reducing the stress applied to the capacitor during transportation and suppressing the occurrence of cracks. Found that you can. Furthermore, by placing the capacitor on the carrier sheet at the time of mounting on a substrate or the like, the capacitor mounting film can be used as it is for wafer level package technology, so the stress applied during mounting is reduced, It has been found that the manufacturing process is simplified.

According to the gist of the present invention, a capacitor-mounted film in which a capacitor is disposed on a carrier sheet,
At least one of the capacitors is a capacitor having a conductive porous substrate, a dielectric layer located on the conductive porous substrate, and an upper electrode located on the dielectric layer. A capacitor-mounted film is provided.

  Capacitor having a conductive porous substrate, a dielectric layer positioned on the conductive porous substrate, and an upper electrode positioned on the dielectric layer is mounted on a carrier sheet, and a capacitor mounting film As a result, the stress applied to the capacitor during transportation and mounting can be reduced, and the generation of cracks can be suppressed. Further, the capacitor-mounted film of the present invention can be used as it is in the wafer level package technology, and the manufacturing process can be simplified.

FIG. 1 is a schematic plan view of a capacitor-mounted film 1 in one embodiment of the present invention. FIG. 2 is a schematic sectional view taken along line xx of the capacitor-mounted film 1 shown in FIG. FIG. 3 is a schematic sectional view of the capacitor 51 used in the present invention. FIG. 4 is a diagram schematically showing an enlarged view of the high porosity portion of the capacitor 51 of FIG. FIG. 5 is a schematic sectional view of a capacitor 71 used in the present invention. FIG. 6 is a diagram schematically showing an enlarged view of the high porosity portion of the capacitor 71 of FIG. FIG. 7 is a schematic cross-sectional view showing one embodiment of a capacitor mounted on the capacitor mounting film of the present invention. FIG. 8 is a schematic plan view of the capacitor of FIG. FIG. 9 is a schematic cross-sectional view showing another aspect of the capacitor mounted on the capacitor mounting film of the present invention. FIG. 10 is a schematic plan view of the capacitor of FIG. FIG. 11 is a schematic sectional view of a capacitor-mounted film of the present invention on which the capacitor of FIG. 9 is mounted. 12A to 12C are schematic cross-sectional views showing aspects of a capacitor built-in substrate mounted on the capacitor mounting film of the present invention. FIG. 13 is a schematic plan view of a capacitor-mounted film according to one embodiment of the present invention. FIG. 14 is a schematic plan view of a capacitor-mounted film according to another embodiment of the present invention. FIG. 15 is a schematic plan view of a capacitor-mounted film according to another aspect of the present invention. FIGS. 16A to 16F are views for explaining fan-out wafer level packaging using the capacitor-mounted film of the present invention.

  Hereinafter, the capacitor mounting film of the present invention will be described in detail with reference to the drawings. However, the shape and arrangement of each component of the capacitor-mounted film of the present embodiment are not limited to the illustrated example.

  In the capacitor-mounted film of the present invention, a plurality of capacitors are arranged on the carrier sheet.

  A schematic plan view of a capacitor-mounted film 1 according to one embodiment of the present invention is shown in FIG. 1, and a schematic cross-sectional view is shown in FIG. As shown in FIGS. 1 and 2, the capacitor-mounted film 1 used in the present embodiment schematically includes a carrier sheet 2 and a capacitor 3. The capacitor 3 is disposed on the carrier sheet 2 and fixed.

  The material, shape, size, and the like of the carrier sheet 2 are not particularly limited, but are preferably a film shape.

  The material constituting the carrier sheet 2 is preferably a resin, more preferably a heat-resistant resin, and specific examples include polyimide and polyethylene terephthalate (PET).

  The thickness of a carrier sheet can be suitably selected according to a use, for example, is 1 micrometer or more and 2.0 mm or less, Preferably it is 10 micrometers or more and 200 micrometers or less, for example, 20 micrometers or more and 80 micrometers or less.

  The carrier sheet may consist of one layer or a plurality of layers. In one embodiment, the carrier sheet may be one in which an adhesive layer is formed on a sheet as a support.

  Although the adhesive which comprises the said adhesion layer is not specifically limited, For example, a urethane type adhesive, a rubber-type adhesive, an acrylic adhesive, a silicone type adhesive etc. are preferable. Later, a temperature-sensitive adhesive material (for example, Intellimer (registered trademark) tape) is preferably used to facilitate peeling of the capacitor and the like from the carrier sheet.

  The capacitor 3 is not particularly limited, and various types of capacitors can be used.

  In a preferred embodiment, the capacitor is a capacitor comprising a conductive porous substrate, a dielectric layer located on the conductive porous substrate, and an upper electrode located on the dielectric layer. Such a capacitor is advantageous in that the substrate has a large surface area and a large capacitance can be obtained.

  In one aspect, the capacitor may be the capacitor 51 shown in FIGS. 3 shows a schematic cross-sectional view of capacitor 51 (however, for simplicity, dielectric layer 55 and upper electrode 56 are not shown), and FIG. 4 is an enlarged view of a high porosity portion of capacitor 51. This is shown schematically. As shown in FIGS. 3 and 4, the capacitor 51 has a substantially rectangular parallelepiped shape. Schematically, the capacitor 51 includes a conductive porous substrate 54 having a high porosity portion 52 in the central portion and a low porosity portion 53 in a side surface portion, and a dielectric formed thereon. A layer 55; an upper electrode 56 formed on the dielectric layer 55; a wiring electrode 57 formed on the upper electrode 56 so as to be electrically connected to the upper electrode 56; and an upper electrode 56 formed thereon. And a protective layer 58. A first capacitor electrode 59 and a second capacitor electrode 60 are provided on the side surface of the conductive porous substrate 54 so as to face each other. The first capacitor electrode 59 is electrically connected to the conductive porous substrate 54, and the second capacitor electrode 60 is electrically connected to the upper electrode 56 via the wiring electrode 57. The upper electrode 56 and the high porosity portion 52 of the conductive porous substrate 54 face each other through the dielectric layer 55. When the conductive porous substrate 54 and the upper electrode 56 are energized through the first capacitor electrode 59 and the second capacitor electrode 60, respectively, charges can be accumulated in the dielectric layer 55.

  Such a capacitor can have a porous portion (high porosity portion) on both main surfaces of the conductive porous substrate as shown in FIG. 4, so that a larger capacitance can be obtained. In addition, since two electrodes can exist on the same plane, both the electrodes can be arranged in contact with the surface of the carrier sheet 2, which is advantageous when the capacitor-mounted film of the present invention is used for a wafer level package. It is.

  In another aspect, the capacitor may be the capacitor 71 shown in FIGS. FIG. 5 is a schematic cross-sectional view of the capacitor 71 (for the sake of simplicity, the pores are not shown), and FIG. 6 schematically shows an enlarged view of the high porosity portion of the capacitor 71. As shown in FIGS. 5 and 6, the capacitor 71 has a substantially rectangular parallelepiped shape. In general, the capacitor 71 has a conductive porous substrate 74 and a dielectric formed on the conductive porous substrate 74. It has a layer 75 and an upper electrode 76 formed on the dielectric layer 75. The conductive porous substrate 74 has a high porosity portion 72 having a relatively high porosity and a low porosity portion 73 having a relatively low porosity on one main surface side. The high porosity portion 72 is located at the center of the first main surface (main surface on the upper side of the drawing) of the conductive porous substrate 74, and the low porosity portion 73 is located around it. That is, the low porosity portion 73 surrounds the high porosity portion 72. The high porosity portion 72 has a porous structure, that is, a porous portion. The conductive porous substrate 74 has a support portion 77 on the other main surface (second main surface; main surface on the lower side of the drawing). That is, the high porosity portion 72 and the low porosity portion 73 constitute the first main surface of the conductive porous substrate 74, and the support portion 77 constitutes the second main surface of the conductive porous substrate 74. In FIG. 5, the first main surface is the upper surface of the conductive porous substrate 74, and the second main surface is the lower surface of the conductive porous substrate 74. An insulating portion 82 exists between the dielectric layer 75 and the upper electrode 76 at the end portion of the capacitor 71. The capacitor 71 includes a first capacitor electrode 79 on the upper electrode 76 and a second capacitor electrode 80 on the main surface of the conductive porous substrate 74 on the support portion 77 side. In the capacitor 71, the first capacitor electrode 79 and the upper electrode 76 are electrically connected, and the second capacitor electrode 80 is electrically connected to the second main surface of the conductive porous substrate 74. The upper electrode 76 and the high porosity portion 72 of the conductive porous substrate 74 face each other through the dielectric layer 75, and when the upper electrode 76 and the conductive porous substrate 74 are energized, the dielectric layer 75 is charged. Can be accumulated.

  Since such a capacitor has a porous portion (high porosity portion) only on one main surface of the conductive porous substrate as shown in FIG. 6, it is advantageous from the viewpoint of reducing the height.

  If the said electroconductive porous base material has a porous structure and the surface is electroconductive, the material and structure will not be limited. For example, examples of the conductive porous substrate include a porous metal substrate, a substrate in which a conductive layer is formed on the surface of a porous silica material, a porous carbon material, or a porous ceramic sintered body. . In a preferred embodiment, the conductive porous substrate is a porous metal substrate.

  Examples of the metal constituting the porous metal substrate include metals such as aluminum, tantalum, nickel, copper, titanium, niobium and iron, and alloys such as stainless steel and duralumin. Preferably, the porous metal substrate is an aluminum porous substrate.

  The conductive porous substrate has a high porosity portion (that is, a porous portion), and may further have a low porosity portion and a support portion.

  In the present specification, the “porosity” refers to the proportion of voids in the conductive porous substrate. The porosity can be measured as follows. The voids in the porous portion can be finally filled with a dielectric layer and an upper electrode in the process of manufacturing a capacitor. However, the “porosity” does not take into account the material filled in this way. In addition, the filled portion is also calculated as a void.

First, the porous metal substrate is processed by FIB (Focused Ion Beam) microsampling method into a thin sample having a thickness of 60 nm or less. A predetermined region (3 μm × 3 μm) of the thin sample is measured by STEM (Scanning Transmission Electron Microscope) -EDS (Energy dispersive X-ray spectrometry) mapping analysis. Within the mapping measurement field of view, the area where the metal of the porous metal substrate exists is determined. And the porosity can be calculated from the following equation. This measurement is performed at three arbitrary locations, and the average value of the measured values is taken as the porosity.
Porosity (%) = ((measurement area−area where metal of base material exists) / measurement area) × 100

  In the present specification, the “high porosity portion” means a portion having a higher porosity than the support portion and the low porosity portion of the conductive porous substrate.

  The high porosity portion has a porous structure. The high porosity portion having a porous structure increases the specific surface area of the conductive porous substrate and increases the capacitance of the capacitor.

  The porosity of the high porosity part is preferably 20% or more, more preferably 30% or more, and even more preferably 35% or more, from the viewpoint of increasing the specific surface area and increasing the capacitance of the capacitor. obtain. Moreover, from a viewpoint of ensuring mechanical strength, 90% or less is preferable and 80% or less is more preferable.

  The high porosity portion is not particularly limited, but preferably has a surface expansion ratio of 30 to 10,000 times, more preferably 50 to 5,000 times, for example 200 to 600 times. Here, the area expansion ratio means a surface area per unit projected area. The surface area per unit projected area can be determined from the amount of nitrogen adsorbed at the liquid nitrogen temperature using a BET specific surface area measuring device.

The area expansion ratio can also be obtained by the following method. STEM (scanning transmission electron microscope) image of the cross section (cross section obtained by cutting in the thickness direction) of the above sample is taken over the entire thickness (height) T direction with a width X (if it cannot be taken at once, Multiple images may be connected). The total path length L (total length of the pore surface) of the pore surface of the obtained cross section of width X height T is measured. Here, the total path length of the pore surface in the regular quadrangular prism region with the cross section having the width X height T as one side surface and the porous substrate surface as one bottom surface is LX. Further, the bottom area of the square prism becomes X ^2. Therefore, the area expansion ratio can be obtained as LX / X ² = L / X.

  In this specification, the “low porosity portion” means a portion having a lower porosity than the high porosity portion. Preferably, the porosity of the low porosity portion is lower than the porosity of the high porosity portion and is equal to or greater than the porosity of the support portion.

  The porosity of the low porosity portion is preferably 20% or less, more preferably 10% or less. Further, the low porosity portion may have a porosity of 0%. That is, the low porosity portion may or may not have a porous structure. The lower the porosity of the low porosity portion, the better the mechanical strength of the capacitor.

  Note that the low porosity portion is not an essential component in the present invention and may not exist.

  In the present invention, the position of the high porosity portion and the low porosity portion of the conductive porous substrate, the number of installed portions, the size, the shape, the ratio of the two, etc. are not particularly limited. For example, one main surface of the conductive porous substrate may consist of only a high porosity portion. Further, the capacitance of the capacitor can be controlled by adjusting the ratio of the high porosity portion and the low porosity portion.

  The thickness of the high porosity portion is not particularly limited and can be appropriately selected according to the purpose. For example, the thickness is 3 μm or more, preferably 10 μm or more, preferably 1000 μm or less, more preferably 300 μm or less, and still more preferably. It may be 50 μm or less.

  The porosity of the support portion of the conductive porous base material is preferably smaller in order to exhibit the function as a support, specifically 10% or less, and there is substantially no void. More preferred.

  The thickness of the support part is not particularly limited, but is preferably 1 μm or more, for example, 3 μm or more, 5 μm or more, or 10 μm or more in order to increase the mechanical strength of the capacitor. Further, from the viewpoint of reducing the height of the capacitor, the thickness is preferably 100 μm or less, and may be, for example, 50 μm or less or 30 μm or less.

  The thickness of the conductive porous substrate is not particularly limited and can be appropriately selected according to the purpose. For example, the thickness is 5 μm or more, preferably 10 μm or more, for example, 1000 μm or less, preferably 100 μm or less, more preferably 70 μm. Hereinafter, it may be 50 μm or less.

  The method for producing the conductive porous substrate is not particularly limited. For example, a conductive porous substrate is treated with an appropriate metal material by a method of forming a porous structure, a method of crushing (filling) the porous structure, a method of removing a porous structure portion, or a combination of these. Can be manufactured.

  The metal material for producing the conductive porous substrate is a porous metal material (for example, etched foil), a metal material having no porous structure (for example, metal foil), or a material combining these materials. obtain. The method of combining is not particularly limited, and examples thereof include a method of bonding by welding, pressure bonding, or a conductive adhesive.

  The method for forming the porous structure is not particularly limited, but preferably includes an etching treatment such as direct current or alternating current etching treatment.

The method for crushing (filling) the porous structure is not particularly limited. For example, a method of crushing the hole by melting a metal by laser irradiation or the like, or a method of crushing the hole by compressing by mold processing or press processing can be given. It is done. The laser is not particularly limited, and examples thereof include CO ₂ laser, YAG laser, excimer laser, and all solid-state pulse laser such as femtosecond laser, picosecond laser, and nanosecond laser. All-solid pulse lasers such as femtosecond lasers, picosecond lasers, and nanosecond lasers are preferred because the shape and porosity can be controlled more precisely.

  The method for removing the porous structure portion is not particularly limited, and examples thereof include dicer processing and laser ablation processing.

  In one method, the conductive porous substrate is produced by preparing a porous metal material and crushing (filling) the holes corresponding to the support portion and the low porosity portion of the porous metal substrate. Can do.

  The support portion and the low porosity portion need not be formed at the same time, and may be formed separately. For example, the portion corresponding to the support portion of the porous metal substrate is first processed to form the support portion, and then the portion corresponding to the low porosity portion is processed to form the low porosity portion. Good.

  In another method, the conductive porous substrate is manufactured by processing a portion corresponding to a high porosity portion of a metal substrate (for example, metal foil) having no porous structure to form a porous structure. Can do.

  In yet another method, the conductive porous base material having no low porosity portion is to crush the holes corresponding to the support portion of the porous metal material, and then remove the locations corresponding to the low porosity portion. Can be manufactured.

  In the capacitor used in the present invention, a dielectric layer is formed on the high porosity portion.

The material for forming the dielectric layer is not particularly limited as long as it is insulative, but preferably, AlO _x (for example, Al ₂ O ₃ ), SiO _x (for example, SiO ₂ ), AlTiO _x , SiTiO _x , HfO. _{x, TaO x, ZrO x,} HfSiO x, ZrSiO x, TiZrO x, TiZrWO x, TiO x, SrTiO x, PbTiO x, BaTiO x, BaSrTiO x, BaCaTiO x, metal oxides such as SiAlO _x; AlN _x, SiN metal nitrides such as _x and AlScN _x ; or metal oxynitrides such as AlO _x N _y , SiO _x N _y , HfSiO _x N _y , and SiC _x O _y Nz, and AlO _x , SiO _x , and SiO _x N _y and HfSiO _x are preferred. Note that the above formula merely represents the structure of the material and does not limit the composition. That is, x, y, and z attached to O and N may be any value greater than 0, and the abundance ratio of each element including a metal element is arbitrary.

  Although the thickness of a dielectric material layer is not specifically limited, For example, 5 nm or more and 100 nm or less are preferable, and 10 nm or more and 50 nm or less are more preferable. By setting the thickness of the dielectric layer to 5 nm or more, it is possible to improve the insulation and to reduce the leakage current. Further, by setting the thickness of the dielectric layer to 100 nm or less, it is possible to obtain a larger capacitance.

  The dielectric layer is preferably formed by a vapor phase method such as a vacuum vapor deposition method, a chemical vapor deposition (CVD) method, a sputtering method, an atomic layer deposition (ALD) method, or a pulsed laser deposition (PLD). It is formed by the Pulsed Laser Deposition) method or the like. The ALD method is more preferable because a more uniform and dense film can be formed in the fine pores of the porous member.

  In one embodiment (for example, in the capacitor 71), an insulating portion 82 is provided at the end of the dielectric layer. By installing the insulating portion, it is possible to prevent a short circuit (short circuit) between the upper electrode and the conductive porous base material installed thereon.

  In the capacitor 71, the insulating portion is present on the entire low porosity portion, but is not limited thereto, and may be present only in a part of the low porosity portion. Over the high porosity part.

  Further, in the capacitor 71, the insulating portion is located between the dielectric layer and the upper electrode, but is not limited thereto. The insulation part should just be located between a conductive porous base material and an upper electrode, for example, may be located between the low porosity part and a dielectric material layer.

  The material for forming the insulating portion is not particularly limited as long as it is insulative, but a resin having heat resistance is preferable when an atomic layer deposition method is used later. As the insulating material forming the insulating portion, various glass materials, ceramic materials, polyimide resins, and fluorine resins are preferable.

  The thickness of the insulating part is not particularly limited, but it may be 1 μm or more from the viewpoint of more reliably preventing end face discharge and short-circuiting between the electrodes when individualizing each part. For example, it may be 5 μm or more or 10 μm or more. Further, from the viewpoint of reducing the height of the capacitor, the thickness is preferably 100 μm or less, and may be, for example, 50 μm or less or 20 μm or less.

  In addition, in the capacitor | condenser used for this invention, an insulation part is not an essential element and does not need to exist.

  An upper electrode is formed on the dielectric layer.

  The material constituting the upper electrode is not particularly limited as long as it is conductive, but Ni, Cu, Al, W, Ti, Ag, Au, Pt, Zn, Sn, Pb, Fe, Cr, Mo, Ru, Pd , Ta and alloys thereof such as CuNi, AuNi, AuSn, and metal nitrides such as TiN, TiAlN, TiON, TiAlON, and TaN, metal oxynitrides, conductive polymers (eg, PEDOT (poly (3,4- Ethylenedioxythiophene)), polypyrrole, polyaniline) and the like, and TiN and TiON are preferred.

  Although the thickness of an upper electrode is not specifically limited, For example, 3 nm or more is preferable and 10 nm or more is more preferable. By setting the thickness of the upper electrode to 3 nm or more, the resistance of the upper electrode itself can be reduced.

  The upper electrode may be formed by an ALD method. By using the ALD method, the capacitance of the capacitor can be increased. Alternatively, the dielectric layer can be coated to substantially fill the pores of the porous metal substrate, chemical vapor deposition (CVD) method, plating, bias sputtering, Sol-Gel method, conductivity The upper electrode may be formed by a method such as polymer filling. Preferably, a conductive film is formed on the dielectric layer by the ALD method, and the upper electrode is formed by filling the pores with a conductive material, preferably a substance having a lower electrical resistance, by another method. May be. With such a configuration, a higher capacity density and a lower equivalent series resistance (ESR) can be obtained efficiently.

  In addition, after forming the upper electrode, if the upper electrode does not have sufficient conductivity as a capacitor electrode, the surface of the upper electrode is additionally added to the surface of the upper electrode by a method such as sputtering, vapor deposition, or plating. A lead electrode layer made of, for example, may be formed.

  In one aspect, the first capacitor electrode may be formed so as to be electrically connected to the upper electrode, and the second capacitor electrode may be formed so as to be electrically connected to the conductive porous substrate.

  Although the material which comprises the said capacitor electrode is not specifically limited, For example, metals and alloys, such as Au, Pb, Pd, Ag, Sn, Ni, Cu, and a conductive polymer are mentioned. The method of forming the first capacitor electrode is not particularly limited, and for example, CVD method, electrolytic plating, electroless plating, vapor deposition, sputtering, baking of conductive paste, etc. can be used, and electrolytic plating, electroless plating, vapor deposition, Sputtering is preferred.

  The capacitor electrode is not particularly limited in installation location, size, etc., and can be installed in any shape and size only on a part of each surface. The first capacitor electrode and the second capacitor electrode are not essential elements and may not exist. In this case, the upper electrode may function as the first capacitor electrode, and the conductive base material may function as the second capacitor. That is, the upper electrode and the conductive porous substrate may function as a pair of electrodes. In this case, the upper electrode may function as an anode, and the conductive porous substrate may function as a cathode. Alternatively, the upper electrode may function as a cathode and the conductive porous substrate may function as an anode.

  The capacitor 51 and the capacitor 71 described above have a substantially rectangular parallelepiped shape, but the capacitor used in the present invention is not limited to this. The capacitor can have any shape, and for example, the planar shape may be a circle, an ellipse, or a square with rounded corners.

  In addition, the capacitor used in the present invention can be variously modified.

  For example, a layer for improving adhesion between layers or a buffer layer for preventing diffusion of components between the layers may be provided between the layers. Moreover, you may have a protective layer in the side surface etc. of a capacitor | condenser.

  In one aspect, the mounted capacitor may have a wiring electrode. For example, as shown in FIGS. 7 and 8, a wiring electrode 23 may be provided on one capacitor electrode 22 of the capacitor 21. Further, as described in FIGS. 9 and 10, the electrode of the capacitor 25 may be extended to serve as the wiring electrode 26.

  In a preferred embodiment, a part of the wiring electrode is present on the same plane as another capacitor electrode. By providing such wiring electrodes, it is possible to draw both electrodes on the carrier sheet even if the capacitor has a structure having the electrodes on both main surfaces (see FIG. 11). Can be suitably used.

  In one embodiment, the capacitor 3 is arranged such that at least one electrode is in contact with the surface of the carrier sheet 2. With this arrangement, the capacitor-mounted film of the present invention can be used for a wafer level package.

  The number of capacitors 3 mounted on the carrier sheet 2 is not particularly limited, and may be one or more, but is preferably two or more, for example, 10 or more, 20 or more, 50 That can be the case.

  The method for fixing the capacitor to the carrier sheet is not particularly limited, but a method that can easily peel the capacitor from the carrier sheet later is preferable. For example, the above-mentioned pressure sensitive adhesive, such as urethane pressure sensitive adhesive, rubber pressure sensitive adhesive, acrylic pressure sensitive adhesive, silicone pressure sensitive adhesive, among others, temperature sensitive pressure sensitive adhesive (for example, Intellimer (registered trademark) tape). The method used is preferred. When the resin layer is formed by a compression mold or a transfer mold, it is preferable to have heat resistance, and after the resin layer is formed, the carrier sheet is preferably easily peeled off from the resin layer and various parts. Further, in the compression mold or transfer mold, a film may be used to prevent the resin from wrapping around the substrate or the lead frame, but the film of the present invention can also serve as the film.

  In one aspect, the capacitor may be mounted on the carrier sheet as a capacitor built-in film or substrate in which a plurality of capacitors are built.

  The film or substrate with a built-in capacitor is not particularly limited, and films having various forms can be used. For example, the capacitor 31 is built in the substrate 32 as shown in FIGS. Further, the built-in substrate 34 in which the wiring 33 is embedded and drawn out on both main surfaces, the built-in substrate 35 drawn only on one main surface, or the built-in substrate 36 in which the electrode of the capacitor is exposed can be used.

  The arrangement of the capacitors 3 mounted on the carrier sheet 2 can be appropriately set according to the purpose and is not particularly limited, but is preferably arranged at a position corresponding to a desired circuit configuration.

  On the carrier sheet 2, in addition to the capacitor 3, other electronic components such as inductors, semiconductor components, wirings, etc., and a film or substrate incorporating the electronic components can be mounted. These electronic components are preferably arranged at positions corresponding to a desired circuit configuration.

  In one aspect, various electronic components can be mounted such that a plurality of sections on which electronic components are mounted in a predetermined pattern are formed. For example, as shown in FIG. 13, in addition to the capacitor 3, the inductor 4 and the semiconductor component 5 may be arranged in a predetermined pattern. Further, as shown in FIG. 14, the built-in substrate 7 may be further arranged in a predetermined pattern. Further, as shown in FIG. 15, the built-in substrate 8 and the semiconductor component 5 in which the capacitor 3 is built may be arranged in a predetermined pattern. By mounting in this way, the capacitor mounting film of the present invention can be used more suitably as, for example, one component in the manufacture of a wafer level package.

  The capacitor mounted on the capacitor mounting film of the present invention is less susceptible to brittle fracture because the stress applied to the capacitor is suppressed. Such an effect is more remarkable in a capacitor using a conductive porous substrate, particularly in a thin capacitor. Further, the capacitor-mounted film of the present invention is suitably used in a fan-out wafer level package.

  For example, the capacitor-mounted film of the present invention is used for fan-out wafer level packaging as follows.

  First, the capacitor mounting film 11 of the present invention in which the capacitors 13 are arranged in a predetermined pattern on the carrier sheet 12 is prepared (FIG. 16A). Next, another electronic component such as a semiconductor component 14 is disposed on the carrier sheet 12 (FIG. 16B), and a compression mold or a transfer mold or a liquid resin dispenser is applied on the capacitor 13 and the semiconductor component 14. Then, the resin layer 15 is formed by screen printing or the like (FIG. 16C). Next, the carrier sheet 12 is removed to expose the bottoms of the capacitor 13 and the semiconductor component 14 (FIG. 16D), and the wiring layer 16 electrically connected to the exposed electrode portions is formed (FIG. 16E). )). Finally, it can be separated into individual pieces to produce a package (FIG. 16F).

  The capacitor-mounted film of the present invention is easy to handle and can be used for manufacturing various electronic devices or electronic components. The capacitor-mounted film of the present invention, particularly in wafer level packaging, can be suitably used.

1 ... Capacitor mounted film; 2 ... Carrier sheet; 3 ... Capacitor;
4 ... Inductor; 5 ... Semiconductor component; 7 ... Built-in substrate; 8 ... Built-in substrate;
11 ... Capacitor-mounted film; 12 ... Carrier sheet;
13: Capacitor; 14 ... Semiconductor component; 15 ... Resin layer; 16 ... Wiring layer;
21 ... Capacitor; 22 ... Capacitor electrode; 23 ... Wiring electrode;
25 ... Capacitor; 26 ... Wiring electrode;
31 ... Capacitor; 32 ... Substrate; 33 ... Wiring; 34 ... Built-in substrate;
35 ... Built-in substrate; 36 ... Built-in substrate;
51: Capacitor; 52 ... High porosity portion; 53 ... Low porosity portion;
54 ... conductive porous substrate; 55 ... dielectric layer; 56 ... top electrode;
57 ... wiring electrode; 58 ... protective layer; 59 ... first capacitor electrode;
60 ... second capacitor electrode;
71: capacitor; 72 ... high porosity portion; 73 ... low porosity portion;
74 ... conductive porous substrate; 75 ... dielectric layer; 76 ... upper electrode;
77 ... support part; 79 ... first capacitor electrode;
80 ... second capacitor electrode; 82 ... insulating portion

Claims (4)

A capacitor-mounted film in which capacitors are placed on a carrier sheet,
At least one of the capacitors is a capacitor having a conductive porous substrate, a dielectric layer located on the conductive porous substrate, and an upper electrode located on the dielectric layer. Capacitor-equipped film.   2. The capacitor-mounted film according to claim 1, wherein the conductive porous substrate of the capacitor has a porous portion only on one main surface.   The capacitor mounting film according to claim 1 or 2, wherein the dielectric layer and / or the upper electrode of the capacitor is formed by an atomic layer deposition method.   The said capacitor | condenser has an electrode for wiring, The capacitor | condenser mounting film of any one of Claims 1-3 characterized by the above-mentioned.

Images