JPWO2014038180A1 - Power supply and management device - Google Patents

Abstract

Suppresses the breakdown voltage during assembly and maintenance of the power supply at low cost. In the power supply device (500), a plurality of battery cells are connected in series. A plurality of cell management ICs are cascade-connected. The terminals of the plurality of battery cells and the terminals of the plurality of cell management ICs are connected via the battery side connector and the IC side connector. Non-insulated communication is performed between cell management ICs sharing the IC-side connector. The cell management ICs that do not share the IC-side connector are insulated and communicated.

Description

  The present invention relates to a power supply device equipped with an assembled battery in which a plurality of battery cells are connected in series, and a management device for managing the plurality of battery cells.

  In recent years, hybrid vehicles (HV), plug-in hybrid vehicles (PHV), and electric vehicles (EV) have become widespread. These cars are equipped with secondary batteries as key devices. Nickel metal hydride batteries and lithium ion batteries are mainly used as in-vehicle secondary batteries. In the future, the spread of lithium ion batteries with high energy density is expected to accelerate.

  Lithium-ion batteries require close strict voltage management than other types of batteries because the regular use area and the use prohibition area are close to each other. When using an assembled battery in which a plurality of lithium ion battery cells are connected in series, a voltage detection circuit for detecting the voltage of each battery cell is provided. The detected voltage of each battery cell is used for charge / discharge control, cell voltage equalization control, and the like.

  Since an in-vehicle secondary battery requires a high output voltage, it is often used by connecting a plurality of assembled batteries in series. In this case, there may be used a configuration in which a plurality of IC chips each mounted with a voltage detection circuit are connected in cascade with a plurality of assembled batteries.

JP 2012-10563 A

  When a power supply device is assembled by connecting a plurality of assembled batteries and a plurality of cascade-connected IC chips, depending on the connection order of the assembled batteries and the IC chips, a voltage exceeding the withstand voltage may be applied to a specific IC chip. is there. This overvoltage can also occur during maintenance of the power supply device. This overvoltage can be suppressed if the IC chip is designed to have a high withstand voltage, but this leads to an increase in cost.

  The present invention has been made in view of such circumstances, and an object of the present invention is to provide a technique that suppresses overvoltage resistance at the time of assembly and maintenance of a power supply device at low cost.

  In order to solve the above-described problem, a power supply device according to an aspect of the present invention includes a series battery group in which a plurality of battery cells are connected in series, and a plurality of battery cells included in the series battery group. A plurality of cell management ICs (Integrated Circuits) for managing each of the plurality of battery cells, and m × n (n is a natural number) of the plurality of battery cells, and each of the m × n battery cells. A battery-side connector including a plurality of terminals, and an IC-side connector provided for each of the n cell management ICs and including the respective terminals of the n cell management ICs. The power supply voltage and the ground voltage of the cell management IC are supplied from both ends of the m battery cells being managed, and the cell management ICs are cascade-connected and share the IC-side connector. Are non-insulated, and the cell management ICs that do not share the IC-side connector are insulated.

  Another embodiment of the present invention is also a power supply device. This apparatus is configured to manage a series battery group in which a plurality of battery cells are connected in series and a plurality of battery cells included in the series battery group for each m (m is an integer of 2 or more). An IC (Integrated Circuit), a battery-side connector provided for each m × n (n is a natural number) of the plurality of battery cells, each including a terminal of the m × n battery cells, and the plurality of cell management IC-side connectors provided for every n ICs and including respective terminals of the n cell management ICs. The power supply voltage and the ground voltage of the cell management IC are supplied from both ends of the m battery cells being managed, and the cell management ICs are cascade-connected and share the IC-side connector. The cell management ICs that are not isolatedly communicated and do not share the IC-side connector include a place where insulation communication is performed and a place where non-insulation communication is performed.

  Yet another embodiment of the present invention is a management device. This device is a management device for managing a series battery group in which a plurality of battery cells are connected in series, and each of the plurality of battery cells included in the series battery group (m is an integer of 2 or more). A plurality of cell management ICs (Integrated Circuits) for managing the battery, and a battery-side connector provided for each m × n (n is a natural number) of the plurality of battery cells, and including respective terminals of the m × n battery cells Each of the plurality of cell management ICs, and an IC-side connector including each terminal of the n cell management ICs. The power supply voltage and the ground voltage of the cell management IC are supplied from both ends of the m battery cells being managed, and the cell management ICs are cascade-connected and share the IC-side connector. Are non-insulated, and the cell management ICs that do not share the IC-side connector are insulated.

  Yet another embodiment of the present invention is also a management device. This device is a management device for managing a series battery group in which a plurality of battery cells are connected in series, and each of the plurality of battery cells included in the series battery group (m is an integer of 2 or more). A plurality of cell management ICs (Integrated Circuits) for managing the battery, and a battery-side connector provided for each m × n (n is a natural number) of the plurality of battery cells, and including respective terminals of the m × n battery cells Each of the plurality of cell management ICs, and an IC-side connector including each terminal of the n cell management ICs. The power supply voltage and the ground voltage of the cell management IC are supplied from both ends of the m battery cells being managed, and the cell management ICs are cascade-connected and share the IC-side connector. The cell management ICs that are not isolatedly communicated and do not share the IC-side connector include a place where insulation communication is performed and a place where non-insulation communication is performed.

  According to the present invention, it is possible to suppress overpressure resistance during assembly and maintenance of the power supply device at low cost.

It is a figure which shows the structure of the power supply device which concerns on a comparative example. It is a figure which shows the mode at the time of the assembly of the power supply device which concerns on a comparative example. It is a figure which shows the structure of the power supply device which concerns on Embodiment 1 of this invention. It is a figure which shows the structure of the power supply device which concerns on Embodiment 2 of this invention.

  FIG. 1 is a diagram illustrating a configuration of a power supply device 500 according to a comparative example. The power supply device 500 includes a battery unit 200 and a management unit 100. The battery unit 200 includes a series battery group 20 in which a plurality of lithium ion battery cells (hereinafter simply referred to as battery cells) are connected in series. The series battery group 20 is formed by a plurality of assembled batteries connected in series. Each assembled battery is formed by a plurality of battery cells connected in series.

  A harness connector is provided for each assembled battery. The electrodes of the plurality of battery cells forming the assembled battery and the plurality of terminals included in the harness connector are connected by wiring. The plurality of terminals included in the harness connector serve as output terminals of the plurality of battery cells forming the assembled battery.

  The management unit 100 includes a plurality of ASICs (Application Specific Integrated Circuits) connected in cascade. At least one ASIC is provided for each assembled battery. The ASIC is a dedicated custom IC for managing a plurality of battery cells included in the assembled battery. The ASIC has at least a function of detecting voltages at both ends of each of the plurality of battery cells included in the assembled battery. The ASIC includes a plurality of input terminals for detecting voltages at both ends of the plurality of battery cells.

  A board connector is provided for each at least one ASIC that manages one assembled battery. The plurality of input terminals provided in the at least one ASIC and the plurality of terminals of the board connector are connected by wiring. The plurality of terminals included in the board connector are input terminals of the at least one ASIC.

  When the assembled battery is formed of x (x is an integer of 2 or more) battery cells, one harness connector includes at least (x + 1) voltage output terminals. When one assembled battery is managed by n (n is a natural number) ASICs, the number m (m is an integer of 2 or more) of management cells of one ASIC is x / n. One harness connector includes at least (m + 1) voltage input terminals.

  The power supply voltage and ground voltage of the ASIC are supplied from both ends of the m battery cells being managed. That is, the ASIC operates with the highest voltage of the series battery group formed by the m battery cells being managed as the power supply voltage and the lowest voltage as the ground voltage. The ground terminal of a certain ASIC is connected to the power supply terminal of an adjacent ASIC.

  Adjacent ASICs are connected by a communication line and can communicate with each other. At least one of the plurality of ASICs is connected to the control circuit. The control circuit acquires the voltage value of each battery cell from a plurality of ASICs, and performs battery control such as cell voltage equalization control with reference to the voltage value.

  Hereinafter, in this specification, the voltage of each battery cell is 4V, the number x of battery cells forming one unit assembled battery is 12, the number of assembled batteries forming the whole series battery group 20 is 6, Assume an example in which the number n of ASICs that manage a unit assembled battery is two, and the number of cells m managed by one ASIC is six. That is, assume an example where x = 12, m = 6, and n = 2. In this example, the voltage of each assembled battery is about 50V, and the voltage of the whole series battery group 20 is about 300V.

  In FIG. 1, the first ASIC (1) and the second ASIC (2) are mounted on one substrate. This board includes a first board connector 41. The first assembled battery 21 and the substrate are mounted on one cell stack. At that time, the first harness connector 31 and the first board connector 41 are connected. The first assembled battery 21 may be formed by connecting two assembled batteries in series. In the above-described example, two unit batteries formed by six battery cells may be connected to form a new unit assembled battery formed by twelve battery cells.

  In FIG. 1, only the wiring for supplying the ASIC power supply voltage and ground voltage is drawn from the assembled battery to the ASIC. In FIG. 1, since one assembled battery is managed by two ASICs, there is one intermediate power supply line. When managed by one ASIC, there are no intermediate power lines, and when managed by three ASICs, there are two intermediate power lines.

  The first assembled battery 21 includes a plurality (12 in the above example) of battery cells 211 to 21x. The highest voltage of the plurality of battery cells 211 to 21x is supplied to the power supply terminal of the first ASIC (1), and the intermediate voltage is supplied to the ground terminal of the first ASIC (1) and the power supply terminal of the second ASIC (2), The lowest voltage is supplied to the ground terminal of the second ASIC (2).

  In principle, the first ASIC (1) only needs to have a withstand voltage design corresponding to the voltage V1a that is half the voltage V1 across the plurality of battery cells 211 to 21x. In the above example, it is sufficient to have a breakdown voltage with a margin added to about 25V. Similarly, in principle, the second ASIC (2) only needs to have a withstand voltage design corresponding to the voltage V1b that is half of the voltage V1 across the plurality of battery cells 211 to 21x.

  However, when connecting the first harness connector 31 and the first board connector 41, the terminals of the first harness connector 31 and the terminals of the first board connector 41 are not necessarily ideally in contact with each other at the same time. If the terminal contact of the intermediate power line is delayed from the terminal contact of the power line of the first ASIC (1) and the terminal contact of the ground line of the second ASIC (2), it is formed by the first ASIC (1) and the second ASIC (2). A state in which the voltage V1 across the battery cells 211 to 21x is applied to the series circuit is instantaneously generated.

  The impedance of the ASIC varies from one semiconductor wafer to another, and there is variation depending on the process even if the ASIC is generated from the same wafer. Therefore, it is not always the case that the voltage is divided cleanly by the number of series like the resistance voltage division. That is, 1/2 · V1 is not necessarily applied to each of the first ASIC (1) and the second ASIC (2). For example, it may occur that 1/4 · V1 is applied to the first ASIC (1) and 3/4 · V1 is applied to the second ASIC (2). In this case, the second ASIC (2) is over withstand voltage.

  As a countermeasure, each ASIC is designed to have a withstand voltage corresponding to the voltage across the x (= m × n) battery cells included in the unit assembled battery. In the above-described example, the breakdown voltage is designed so that a margin is added to about 50V. If each withstand voltage of the first ASIC (1) and the second ASIC (2) is designed to correspond to the voltage V1 across the battery cells 211 to 21x, the voltage dividing ratio of the first ASIC (1) and the second ASIC (2) No matter what the value is, it is possible to avoid overvoltage resistance.

  On the other hand, the assembled battery is normally assembled with a low charging rate. Therefore, in the above configuration, the value of the charging rate at the time of assembly can be taken into consideration. That is, since the voltage of the unit assembled battery is low when the charging rate is low, the withstand voltage of the ASIC during assembly may be configured to be lower than the total voltage of the unit assembled battery. For example, when assembling the assembled battery in a state where the charging rate is 30%, the withstand voltage of the ASIC is set so as to withstand the voltage sum of the unit assembled battery in the state where the charging rate is 30%. According to such a configuration, considering that the harness is connected in a state where the charging rate is low, the withstand voltage of the ASIC can be further reduced, and the over-withstand voltage at the time of assembly and maintenance of the power supply device can be reduced. Can be suppressed.

  In this configuration, even if the assembled battery is charged and the battery voltage rises, if all the harness voltages are used when the total cell voltage is less than or equal to the ASIC breakdown voltage, the ASIC will withstand the breakdown voltage. It will never be over. The illustrated charging rate of 30% is merely an example, and is not necessarily set to this value, and can be selected as appropriate.

  Thus, each ASIC is included in the unit assembled battery in a state where the plurality of battery cells included in the series battery group are charged to a charging rate of less than 100%, more specifically, less than 50%. It can be designed to have a withstand voltage corresponding to the voltage across the battery cells. The charging rate may be a set charging rate at the time of assembling the assembled battery.

  When the ASIC withstand voltage is given, the number m of battery cells managed by each ASIC is designed to be less than the ASIC withstand voltage. That is, the number of battery cells is determined so that the voltage across the plurality of battery cells connected in series managed by one ASIC is less than the withstand voltage of the ASIC.

  FIG. 2 is a diagram illustrating a state when the power supply device 500 according to the comparative example is assembled. As shown in FIG. 2, after the first harness connector 31 and the first board connector 41 are connected, the second harness connector 32 and the second board connector 42 are not connected, but the third harness connector 33 and the third board connector 42 are connected. The case where the board connector 43 is connected may occur.

  In a state where the first harness connector 31 and the first board connector 41 are completely connected, the ground terminal voltage of the second ASIC (2) is determined by the lowest voltage of the first assembled battery 21. Therefore, the power supply terminal voltage of the third ASIC (3) is also determined.

  Thereafter, the third harness connector 33 and the third board connector 43 are connected. At this time, the terminals of the third harness connector 33 and the third board connector 43 do not necessarily contact each other ideally at the same time.

  When the ground line of the sixth ASIC (6) comes into contact with the terminal first (first case), at that moment, the third ASIC (3), the fourth ASIC (4), the fifth ASIC (5), and the sixth ASIC (6) The both-ends voltage (V2 + V3) of the series battery group formed by the second assembled battery 22 and the third assembled battery 23 is applied to both ends of the formed series circuit.

  In addition, when the intermediate power line comes into contact with the terminal first (second case), at that moment, both ends of the series circuit formed by the third ASIC (3), the fourth ASIC (4), and the fifth ASIC (5) A voltage across both ends of the series battery group (V2 + (1/2 · V3)) formed by the upper half of the second assembled battery 22 and the third assembled battery 23 is applied.

  Further, when the power supply line of the fifth ASIC (5) comes into contact with the terminal first (third case), at the moment, the second ASIC (3) and the fourth ASIC (4) are connected to both ends of the series circuit formed by the second ASIC (5). A voltage V2 across the assembled battery 22 is applied.

  As described above, the ASIC impedance varies. Therefore, in the first case, the voltage of (V2 + V3) / 4 is not necessarily applied to each of the third ASIC (3), the fourth ASIC (4), the fifth ASIC (5), and the sixth ASIC (6). In the second case, a voltage of (V2 + (1/2 · V3)) / 3 is not necessarily applied to each of the third ASIC (3), the fourth ASIC (4), and the fifth ASIC (5). In the third case, the voltage V2 / 2 is not necessarily applied to each of the third ASIC (3) and the fourth ASIC (4).

  As a result of the measures described above, the ASIC withstand voltage of each of the third ASIC (3), the fourth ASIC (4), the fifth ASIC (5), and the fourth ASIC (6) is the voltage V2 across the second assembled battery 22 (= the third assembled battery). Even if the voltage is designed to be higher than the voltage V3 between both ends of 23, in the first case and the second case, there is a possibility that a voltage exceeding the withstand voltage is applied to either ASIC.

  This over-voltage occurs when the intermediate potential of a series circuit formed by two or more ASICs is indefinite and the potential at both ends of the series circuit is determined. Therefore, this overvoltage will not occur if the connectors are connected in order from the high potential side or the low potential side.

  It is thought that this rule can be thoroughly enforced by only the workers in the assembly factory, but it is extremely difficult to make it thoroughly to maintenance workers and users including automobile dealers. Accordingly, no matter what order the ASICs (1) to (12) are connected to the board connectors 41 to 46 in any order, a mechanism that does not cause a breakdown voltage over is required.

  FIG. 3 is a diagram showing a configuration of the power supply device 500 according to Embodiment 1 of the present invention. As shown in FIG. 1, in the power supply device 500 according to the comparative example, a communication path between adjacent ASICs is formed by non-insulated interfaces 51 to 61. The non-insulated interfaces 51 to 61 are electric wirings via level shift circuits. Therefore, a current flows directly between adjacent ASICs via a communication path.

  As shown in FIG. 3, in the power supply device 500 according to the first embodiment, the communication path between adjacent ASICs sharing the board connector is the same as that of the power supply device 500 according to the comparative example. 57, 59, 61. A communication path between adjacent ASICs that do not share a board connector is formed by mixing non-insulating interfaces 52, 56, and 60 and insulating interfaces 54a and 58a. The ASICs connected by the insulation interfaces 54a and 58a are not connected by a power line common to both ASICs. Specifically, the fourth ASIC (4) and the fifth ASIC (5) that do not share the board connector are connected by an insulating interface 54a, and the ground terminal of the fourth ASIC (4) and the power supply terminal of the fifth ASIC (5) are connected to the management unit 100. Is not connected. The same applies to the eighth ASIC (8) and the ninth ASIC (9).

  The insulation interfaces 54a and 58b may be configured to include a small transformer. By adopting a pulse modulation method for the communication signal, the transformer can be electrically insulated and level-shifted between the primary side coil and the secondary side coil. The insulation interfaces 54a and 58 may include a photocoupler. By transmitting and receiving communication signals between the ASICs as optical signals, the ASICs can be easily electrically insulated without adopting a complicated modulation method.

  Of the ASICs that do not share the board connector, places that are isolated and non-insulated are alternately arranged. As described above, the overvoltage resistance of the ASIC due to an error in the connector connection order occurs when the potential between both ends of the series circuit is determined while the intermediate potential of the series circuit formed by two or more ASICs is indefinite. This state occurs when at least one of the harness connector and the board connector is skipped and connected.

  Therefore, in the connection between the ASICs straddling the substrate, the occurrence of the above state can be suppressed if at least one of them is insulated. Therefore, it is possible to suppress the ASIC withstand voltage exceeding due to an error in the connector connection order.

  FIG. 4 is a diagram showing a configuration of a power supply device 500 according to Embodiment 2 of the present invention. Also in the power supply device 500 according to the second embodiment, the communication path between adjacent ASICs sharing the board connector is the same as that of the power supply device 500 according to the first embodiment, and the non-insulated interfaces 51, 53, 55, 57, 59, 61. Unlike the power supply apparatus 500 according to the first embodiment, the communication paths between adjacent ASICs that do not share the board connector are all formed by the insulating interfaces 52a, 54a, 56a, 58a, and 60a.

  As described above, the power supply device 500 according to Embodiments 1 and 2 of the present invention is designed such that the withstand voltage of one ASIC exceeds the voltage across the assembled battery connected to one harness connector. As a result, it is possible to suppress the ASIC withstand voltage over which may occur when one harness connector is connected to one board connector. This is because, in principle, a voltage higher than the voltage across the assembled battery connected to one harness connector is not applied to one ASIC.

  Further, by insulating at least one connection portion between the ASICs that do not share the board connector, it is possible to prevent the ASIC from over-breaking pressure regardless of the order in which the harness connector and the board connector are connected.

  The isolated interface uses a more expensive element than the non-isolated interface, which increases the cost. Therefore, an increase in cost can be suppressed as the use of the insulation interface is reduced. The first embodiment is an example in which the overvoltage resistance of the ASIC is suppressed with a minimum insulation interface. The second embodiment is an example in which the breakdown voltage of the ASIC is suppressed by a substrate having the same configuration. Even in the latter case, ASICs on the same substrate are formed with non-insulated interfaces. In the latter case, the types of substrates can be reduced, which is advantageous for mass production.

  The present invention has been described based on the embodiments. Those skilled in the art will understand that these embodiments are exemplifications, and that various modifications can be made to the combinations of the respective constituent elements and processing processes, and such modifications are also within the scope of the present invention. By the way.

  500 power supply unit, 200 battery unit, 21-26 battery pack, 31-36 harness connector, 100 management unit, 41-46 board connector, 1-12, ASIC, 51-61 non-insulated interface, 52a, 54a, 56a, 58a 60a Isolated interface.

Claims (6)

A series battery group in which a plurality of battery cells are connected in series;
A plurality of cell management ICs (Integrated Circuits) for managing a plurality of battery cells included in the series battery group for each m (m is an integer of 2 or more);
A battery-side connector provided for each m × n (n is a natural number) of the plurality of battery cells, each including a terminal of the m × n battery cells;
An IC-side connector that is provided for every n of the plurality of cell management ICs and includes terminals of each of the n cell management ICs,
The power supply voltage and ground voltage of the cell management IC are supplied from both ends of the m battery cells being managed,
The plurality of cell management ICs are cascade-connected, non-isolated communication is performed between cell management ICs sharing the IC-side connector, and isolated communication is performed between cell management ICs not sharing the IC-side connector. apparatus. A series battery group in which a plurality of battery cells are connected in series;
A plurality of cell management ICs (Integrated Circuits) for managing a plurality of battery cells included in the series battery group for each m (m is an integer of 2 or more);
A battery-side connector provided for each m × n (n is a natural number) of the plurality of battery cells, each including a terminal of the m × n battery cells;
An IC-side connector that is provided for every n of the plurality of cell management ICs and includes terminals of each of the n cell management ICs,
The power supply voltage and ground voltage of the cell management IC are supplied from both ends of the m battery cells being managed,
The plurality of cell management ICs are cascade-connected, non-isolated communication is performed between cell management ICs sharing the IC-side connector, and non-insulated communication is performed between the cell management ICs not sharing the IC-side connector. The power supply device characterized by being mixed.   2. The cell management IC according to claim 1, wherein each cell management IC has a withstand voltage corresponding to a voltage across the m × n battery cells in a state where the plurality of battery cells are charged to a predetermined charging rate. 2. The power supply device according to 2. Each cell management IC has a withstand voltage corresponding to the voltage across the m × n battery cells in a state where the plurality of battery cells are charged to a predetermined charging rate,
The power supply apparatus according to claim 2, wherein a place where insulation communication is performed and a place where non-insulation communication is performed are alternately arranged between cell management ICs which do not share the IC-side connector. A management device that manages a series battery group in which a plurality of battery cells are connected in series,
A plurality of cell management ICs (Integrated Circuits) for managing a plurality of battery cells included in the series battery group for each m (m is an integer of 2 or more);
A connector to be connected to a battery-side connector including each terminal of m × n battery cells, provided for each m × n (n is a natural number) of the plurality of battery cells, wherein the plurality of cells An IC-side connector that is provided for every n management ICs and includes terminals of each of the n cell management ICs,
The power supply voltage and ground voltage of the cell management IC are supplied from both ends of the m battery cells being managed,
The plurality of cell management ICs are cascade-connected, non-isolated communication is performed between cell management ICs sharing the IC side connector, and isolated communication is performed between cell management ICs not sharing the IC side connector. apparatus. A management device that manages a series battery group in which a plurality of battery cells are connected in series,
A plurality of cell management ICs (Integrated Circuits) for managing a plurality of battery cells included in the series battery group for each m (m is an integer of 2 or more);
A connector to be connected to a battery-side connector including each terminal of m × n battery cells, provided for each m × n (n is a natural number) of the plurality of battery cells, wherein the plurality of cells An IC-side connector that is provided for every n management ICs and includes terminals of each of the n cell management ICs,
The power supply voltage and ground voltage of the cell management IC are supplied from both ends of the m battery cells being managed,
The plurality of cell management ICs are cascade-connected, non-isolated communication is performed between cell management ICs sharing the IC-side connector, and non-insulated communication is performed between the cell management ICs not sharing the IC-side connector. A management device characterized in that mixed parts are mixed.

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