JPWO2013038496A1 - Power system - Google Patents

Abstract

The power supply system (100) includes an uninterruptible power supply (5) for supplying power to a load, a switch (6) for connecting a bypass power supply (1) to the load, and a switch ( And 6) a switching circuit (7) for turning on. When the uninterruptible power supply (5) stops, the switching circuit (6) switches when the phase of the output voltage of the bypass power supply (1) is equal to the phase of the output voltage when the uninterruptible power supply (5) is stopped. Turn on (6).

Description

  The present invention relates to a power supply system, and more particularly to a power supply switching circuit used for an uninterruptible power supply (UPS).

  An uninterruptible power supply (UPS) is configured to continuously supply power to a load. UPS may stop due to UPS failure or maintenance. In order to prepare for such a case, a bypass power supply is provided in parallel with the UPS.

  Generally, a UPS has an inverter. If the inverter fails, the bypass power supply supplies power to the load. When the voltage of the bypass power supply is not synchronized with the output voltage of the UPS, there arises a problem that a large magnetizing inrush current flows to the load transformer.

  When the bypass power supply supplies power to the load, the UPS output switch is turned off. However, a certain amount of time is required for the output switch to be completely turned off. For this reason, there is a possibility that the magnetizing inrush current flows not only in the load transformer but also in the insulating transformer inside the UPS.

  Japanese Patent Laid-Open No. 8-256431 (Patent Document 1) discloses a static inrush current suppressing device for suppressing a transformer excitation inrush current. This device comprises a thyristor connected to the primary side of the transformer, an instrument transformer connected to the primary side of the thyristor, a peak voltage detection circuit connected to the secondary side of the instrument transformer, and a peak voltage detection And a thyristor gate output circuit that turns on the thyristor at a timing when the circuit detects the peak voltage. The transformer is excited by the peak voltage. Thereby, a transformer excitation inrush current can be suppressed.

JP-A-8-256431

  In order to supply power to the load without interruption even when the UPS is stopped, it is required to shorten the time for switching the power source as much as possible. Furthermore, it is required that the voltage of the bypass power supply is synchronized with the output voltage of the UPS.

  An object of the present invention is to provide a power supply system that can shorten the switching time of the power supply and suppress the magnetizing inrush current.

  A power supply system according to one aspect of the present invention includes an uninterruptible power supply that supplies power to a load, a switch that connects a bypass power supply to the load, and a switching circuit that turns on the switch when the uninterruptible power supply stops. . When the uninterruptible power supply stops, the switching circuit turns on the switch when the phase of the output voltage of the bypass power supply is equal to the phase of the output voltage when the uninterruptible power supply stops.

  ADVANTAGE OF THE INVENTION According to this invention, the time for switching a power supply between an uninterruptible power supply and a bypass power supply can be shortened. Furthermore, according to the present invention, the magnetizing inrush current can be suppressed.

It is a block diagram of the power supply system which concerns on one Embodiment of this invention. It is a functional block diagram of the switching circuit shown in FIG. It is a wave form diagram for demonstrating operation | movement of the power supply system which concerns on one Embodiment of this invention. It is a wave form diagram for demonstrating another operation | movement of the power supply system which concerns on one Embodiment of this invention. It is the figure which showed the structure of the comparative example of the power supply system which concerns on embodiment of this invention. FIG. 6 is a waveform diagram for explaining the operation of the power supply system shown in FIG. 5.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the drawings, the same or corresponding parts are denoted by the same reference numerals and description thereof will not be repeated.

  FIG. 1 is a configuration diagram of a power supply system according to an embodiment of the present invention. Referring to FIG. 1, power supply system 100 supplies power supplied from bypass power supply 1 or input power supply 2 to load 3. The bypass power supply 1 and the input power supply 2 are AC power supplies. In FIG. 1, the bypass power source 1 and the input power source 2 are shown as a three-phase AC power source. However, these power supplies may be single-phase power supplies. The types of bypass power supply 1 and input power supply 2 are not particularly limited.

  The power supply system 100 includes an uninterruptible power supply (UPS) 5, a thyristor switch 6, and a switching circuit 7. The UPS 5 includes a converter 11, a battery 12, an inverter 13, an insulation transformer 14, an output switch 15, a capacitor 16, and a synchronization circuit 17. The load transformer 4 is provided in parallel with the load 3.

  Converter 11 converts AC power from input power supply 2 into DC power. DC power from the converter 11 is supplied to the battery 12 and the inverter 13. When the converter 11 is operating, the battery 12 stores DC power from the converter 11. The battery 12 supplies DC power to the inverter 13 when the converter 11 is stopped. The capacitor 16 smoothes the DC power input to the inverter 13.

  Inverter 13 converts DC power into AC power (for example, three-phase AC). The output switch 15 switches whether to output the AC power from the inverter 13 to the load 3. For example, the output switch 15 is realized by a mechanical switch (for example, a contactor). When the output switch 15 is in the ON state, AC power from the inverter 13 is supplied to the load 3 and the load transformer 4 via the insulating transformer 14. In this case, the thyristor switch 6 is in an off state.

  The synchronization circuit 17 synchronizes the phase of the voltage Vinv with the phase of the voltage Vbyp. The voltage Vinv is a voltage output from the inverter 13 via the insulating transformer 14. The voltage Vbyp is the output voltage of the bypass power supply 1. For example, the synchronization circuit 17 is realized by a PLL (Phase Lock Loop) circuit. When the output switch 15 is in the ON state, the voltage Vo input to the load 3 and the load transformer 4 is equal to Vinv.

  The switching circuit 7 monitors the voltage Vinv. For example, when the supply of the voltage Vinv is stopped due to the failure of the inverter 13, the switching circuit 7 turns on the thyristor switch 6. Further, the output switch 15 is turned off. For example, the switching circuit 7 turns off the output switch 15. Another circuit may turn off the output switch 15.

  When the thyristor switch 6 is turned on, the bypass power supply 1 is connected to the load 3 and the load transformer 4. Therefore, power from the bypass power supply 1 is supplied to the load 3 and the load transformer 4. In this case, the voltage Vo is equal to Vbyp.

  According to one embodiment of the present invention, the switching circuit 7 stores the phase of the voltage Vinv when the UPS 5 stops supplying power to the load 3. Furthermore, the switching circuit 7 monitors the voltage Vbyp. The switching circuit 7 turns on the thyristor switch 6 when the phase of the voltage Vbyp matches the stored phase of the voltage inv.

  According to this embodiment, the length of the period during which the supply of power to the load 3 is stopped can be made within one AC cycle (for example, 1/50 second or 1/60 second). That is, according to this embodiment, the period during which power supply to the load 3 is stopped can be shortened.

  Furthermore, according to this embodiment, the phase of the voltage Vo can be maintained when the voltage Vo switches from the voltage Vinv to the voltage Vbyp. Therefore, the phase of the voltage Vo changes continuously before and after the voltage Vo switches from the voltage Vinv to the voltage Vbyp. Thereby, the magnetizing inrush current flowing through the load 3 and the load transformer 4 can be suppressed.

  FIG. 2 is a functional block diagram of the switching circuit shown in FIG. Referring to FIG. 2, switching circuit 7 includes phase detection units 21 and 23, storage unit 22, and switch control unit 24.

  The phase detector 21 detects the phase of the voltage Vinv of the UPS 5. For example, the phase detector 21 detects the phase of the voltage Vinv by measuring the value of the voltage Vinv. Specifically, by acquiring the amplitude and period of the voltage Vinv, the phase of the voltage Vinv can be determined based on the voltage value of the voltage Vinv. The amplitude and period of the voltage Vinv may be given in advance to the phase detector 21, or may be acquired by the phase detector 21 during the operation of the UPS 5.

  The storage unit 22 stores the phase of the voltage Vinv when the UPS 5 is stopped. For example, when the phase of the voltage Vinv does not change, the phase detection unit 21 stores the value of the phase in the storage unit 22. Instead, the phase detection unit 21 may update the value stored in the storage unit 22 with the detected value of the phase of the voltage Vinv. When the phase of the voltage Vinv does not change, the value stored in the storage unit 22 does not change. Therefore, the storage unit 22 can store the phase of the voltage Vinv when the UPS 5 is stopped.

  The phase detector 23 detects the phase of the voltage Vbyp of the bypass power supply 1. The phase detection unit 23 detects the phase of the voltage Vbyp, for example, using the same method as the detection method by the phase detection unit 21.

  The switch control unit 24 compares the phase of the voltage Vinv stored in the storage unit 22 with the phase of the voltage Vbyp. When the phase of the voltage Vbyp matches the phase of the voltage Vinv, the switch control unit 24 turns on the thyristor switch 6.

  When the UPS 5 is restored, the thyristor switch 6 is turned off. A control method for turning off the thyristor switch 6 is not particularly limited. In one form, the switch control unit 24 turns off the thyristor switch 6 when the phase of Vinv detected by the phase detection unit 21 changes with time and the phase matches the phase of the voltage Vbyp. The switch control unit 24 may further turn on the output switch 15. By such control, the phase of the voltage Vo supplied to the load 3 and the load transformer 4 can be made continuous.

  The switch control unit 24 can determine whether the UPS 5 is operating or stopped by periodically acquiring the value stored in the storage unit 22. As described above, the phase detection unit 21 updates the value stored in the storage unit 22 using the detected value of the phase of the voltage Vinv. Since the value stored in the storage unit 22 does not change, the switch control unit 24 can determine that the UPS 5 is stopped.

  On the other hand, when the value stored in the storage unit 22 changes, the switch control unit 24 can determine that the UPS 5 is operating. In this case, the switch control unit 24 does not turn on the thyristor switch 6. Control for turning off the thyristor switch 6 can also be realized according to the above method. In one form, the switch control unit 24 turns off the thyristor switch 6 when the phase of the voltage Vinv matches the phase of the voltage Vbyp.

  FIG. 3 is a waveform diagram for explaining the operation of the power supply system according to the embodiment of the present invention. Referring to FIGS. 1 and 3, inverter 13 stops at time t1. The phase of voltage Vinv and the phase of voltage Vo at time t1 are both a. On the other hand, the phase of the voltage Vbyp at time t1 is c. Phase c is different from phase a.

  At time t2, the phase of the voltage Vbyp becomes equal to a. Therefore, the switching circuit 7 turns on the thyristor switch 6. Power supply to the load 3 and the load transformer 4 is resumed from time t2. The period from time t1 to time t2 is a period within one cycle T. After a certain amount of time (for example, 50 ms) has elapsed from time t1, the output switch 15 is completely turned off (time t3). However, according to the present embodiment, the supply of power to the load is restored before time t3.

  FIG. 4 is a waveform diagram for explaining another operation of the power supply system according to the embodiment of the present invention. Referring to FIG. 4, times t1 and t3 correspond to times t1 and t3 shown in FIG. 3, respectively. In the form shown in FIG. 4, the voltage Vbyp and the voltage Vinv are synchronized. That is, the phase of the voltage Vbyp and the phase of the voltage Vinv are equal to each other.

  According to FIG. 4, the thyristor switch 6 can be turned on at substantially the same timing as when the inverter 13 is stopped. Therefore, the period during which the supply of power to the load 3 (and the load transformer 4) is stopped can be further shortened.

  FIG. 5 is a diagram showing a configuration of a comparative example of the power supply system according to the present embodiment. Referring to FIGS. 1 and 5, power supply system 101 is different from power supply system 100 in that it includes a switching circuit 7 </ b> A instead of switching circuit 7. Since the configuration of other parts of power supply system 101 is the same as the configuration of the corresponding part of power supply system 100, the following description will not be repeated.

  When the UPS 5 is stopped, the switching circuit 7A turns on the thyristor switch 6. Specifically, the switching circuit 7A turns off the thyristor switch 6 after a predetermined time has elapsed after the output switch 15 is completely turned off.

  When the frequency of the bypass power supply 1 fluctuates, the voltage Vinv cannot be immediately synchronized with the voltage Vbyp. When the voltage Vinv cannot be synchronized with the voltage Vbyp, the inverter 113 operates at a fixed free-running frequency.

  FIG. 6 is a waveform diagram for explaining the operation of the power supply system shown in FIG. Referring to FIGS. 5 and 6, the phase of voltage Vinv and the phase of voltage Vbyp are shifted from each other. When the UPS 5 is stopped in this state, it is necessary not only to switch the power source from the input power source 2 to the bypass power source 1 but also to suppress the magnetizing inrush current to the insulating transformer 114. For this reason, according to the configuration shown in FIG. 5, the thyristor switch 6 is turned on after the output switch 15 is turned off.

  The inverter 13 stops at time t11. As described above, a certain amount of time is required until the output switch 15 is completely turned off after the inverter 13 is stopped. At time t12, the output switch 15 is completely turned off.

  The thyristor switch 6 is turned on after a fixed delay time has elapsed after the output switch 15 is completely turned off (time t13). Between time t11 and time t13, the supply of power to the load 3 is interrupted (Vo = 0). For this reason, the operation of the load 3 may stop.

  The phase of the voltage Vo at time t11 is equal to the phase a of the voltage Vinv. On the other hand, the phase of voltage Vo at time t13 is equal to phase b of voltage Vbyp. Phase b is different from phase a. Since the phase changes discontinuously, there arises a problem that a large magnetizing inrush current flows to the load transformer 4.

  In contrast, as shown in FIGS. 3 and 4, according to the embodiment of the present invention, the period during which the supply of power to the load is stopped is a period within one AC cycle. Therefore, the possibility that the load stops is reduced.

  Furthermore, according to the present embodiment, it is possible to resume the supply of power to the load 3 while maintaining the phase state when the supply of power to the load 3 is stopped. Thereby, the magnetizing inrush current to the load 3 and the load transformer 4 can be suppressed.

  The present invention can be applied to a configuration in which a bypass power supply supplies power to a load when the UPS is stopped. Therefore, the reason why the UPS is stopped is not limited to a UPS failure, and may include, for example, UPS maintenance.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is shown not by the above description of the embodiments but by the scope of claims, and is intended to include all modifications within the meaning and scope equivalent to the scope of claims.

1 bypass power supply, 2 input power supply, 3 load, 4 load transformer, 5 uninterruptible power supply, 6 thyristor switch, 7, 7A switching circuit, 11 converter, 12 battery, 13 inverter, 14 isolation transformer, 15 output switch, 16 capacitor , 17
Synchronous circuit, 21, 23 Phase detection unit, 22 storage unit, 24 switch control unit, 100, 101 power supply system.

Claims (3)

An uninterruptible power supply (5) for supplying power to the load;
A first switch (6) for connecting a bypass power supply (1) to the load;
A switching circuit (7) for turning on the first switch (6) when the uninterruptible power supply (5) is stopped;
When the uninterruptible power supply (5) stops, the switching circuit (7) causes the phase of the output voltage of the bypass power supply (1) to be the phase of the output voltage when the uninterruptible power supply (5) is stopped. A power supply system that turns on the first switch (6) when equal. The uninterruptible power supply (5)
The power supply system according to claim 1, comprising a synchronization circuit (17) for synchronizing the output voltage of the uninterruptible power supply (5) with the output voltage of the bypass power supply (1). The uninterruptible power supply (5)
A second switch (15) for disconnecting the uninterruptible power supply (5) from the load when the uninterruptible power supply (5) is stopped;
After the uninterruptible power supply (5) is restored, when the phase of the output voltage of the uninterruptible power supply (5) is synchronized with the phase of the voltage of the bypass power supply (1), the switching circuit (7) The power supply system according to claim 2, wherein the first switch (6) is turned off and the second switch (15) is turned on.

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