JPS6484626A - Semiconductor integrated circuit device using film carrier - Google Patents

Semiconductor integrated circuit device using film carrier

Info

Publication number
JPS6484626A
JPS6484626A JP62240857A JP24085787A JPS6484626A JP S6484626 A JPS6484626 A JP S6484626A JP 62240857 A JP62240857 A JP 62240857A JP 24085787 A JP24085787 A JP 24085787A JP S6484626 A JPS6484626 A JP S6484626A
Authority
JP
Japan
Prior art keywords
high speed
film carrier
integrated circuit
grounding potential
semiconductor integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62240857A
Other languages
Japanese (ja)
Inventor
Toshio Sudo
Kazuyoshi Saito
Tomoaki Takubo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP62240857A priority Critical patent/JPS6484626A/en
Publication of JPS6484626A publication Critical patent/JPS6484626A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto

Landscapes

  • Wire Bonding (AREA)

Abstract

PURPOSE:To stabilize the high speed actuation of a semiconductor integrated circuit by a method wherein both sides of high speed signal wirings are held by wiring patterns in grounding potential to connect the wiring patterns in the grounding potential commonly to the central part of a film carrier. CONSTITUTION:Out of the film carrier wiring patterns in a film carrier, high speed signal lines 4-1 held by the other wiring patterns 4-2 impressed with grounding potential to be controlled at a specified impedance. Likewise, high speed signal lines 3-1 held by outer leads 3-2 impressed with grounding potential are led out. All the patterns impressed with grounding potential on both sides of high speed signal lines are connected by a common patterns 5 provided on the central part of a film carrier. Thus, the reflection and crosstalk noise of high speed signals on the wiring in film carrier are restrained from occurring. Through these procedures, the high speed actuation of semiconductor integrated circuit can be stabilized.
JP62240857A 1987-09-28 1987-09-28 Semiconductor integrated circuit device using film carrier Pending JPS6484626A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62240857A JPS6484626A (en) 1987-09-28 1987-09-28 Semiconductor integrated circuit device using film carrier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62240857A JPS6484626A (en) 1987-09-28 1987-09-28 Semiconductor integrated circuit device using film carrier

Publications (1)

Publication Number Publication Date
JPS6484626A true JPS6484626A (en) 1989-03-29

Family

ID=17065741

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62240857A Pending JPS6484626A (en) 1987-09-28 1987-09-28 Semiconductor integrated circuit device using film carrier

Country Status (1)

Country Link
JP (1) JPS6484626A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4991001A (en) * 1988-03-31 1991-02-05 Kabushiki Kaisha Toshiba IC packing device with impedance adjusting insulative layer
DE4117761A1 (en) * 1990-06-01 1991-12-05 Toshiba Kawasaki Kk Semiconductor chip with film carrier - has lead wires between chip terminals and external electrodes applied to surface of film
DE10142483A1 (en) * 2001-08-31 2003-04-03 Infineon Technologies Ag Electronic component with flat conductors and a method for its production
DE10235788B4 (en) * 2001-08-07 2006-11-30 Yazaki Corp. Electrical connection system for a motor vehicle
JP2021103800A (en) * 2019-08-27 2021-07-15 ルネサスエレクトロニクス株式会社 Semiconductor device

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4991001A (en) * 1988-03-31 1991-02-05 Kabushiki Kaisha Toshiba IC packing device with impedance adjusting insulative layer
DE4117761A1 (en) * 1990-06-01 1991-12-05 Toshiba Kawasaki Kk Semiconductor chip with film carrier - has lead wires between chip terminals and external electrodes applied to surface of film
DE10235788B4 (en) * 2001-08-07 2006-11-30 Yazaki Corp. Electrical connection system for a motor vehicle
DE10142483A1 (en) * 2001-08-31 2003-04-03 Infineon Technologies Ag Electronic component with flat conductors and a method for its production
US6825549B2 (en) 2001-08-31 2004-11-30 Infineon Technologies Ag Electronic component with external flat conductors and a method for producing the electronic component
DE10142483B4 (en) * 2001-08-31 2006-12-14 Infineon Technologies Ag Electronic component with external flat conductors and a method for its production
JP2021103800A (en) * 2019-08-27 2021-07-15 ルネサスエレクトロニクス株式会社 Semiconductor device

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