JPS6481546A - Control circuit for loop standby system - Google Patents

Control circuit for loop standby system

Info

Publication number
JPS6481546A
JPS6481546A JP62237406A JP23740687A JPS6481546A JP S6481546 A JPS6481546 A JP S6481546A JP 62237406 A JP62237406 A JP 62237406A JP 23740687 A JP23740687 A JP 23740687A JP S6481546 A JPS6481546 A JP S6481546A
Authority
JP
Japan
Prior art keywords
loop
level
control circuit
oscillation
standby system
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62237406A
Other languages
Japanese (ja)
Inventor
Fumio Hamada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62237406A priority Critical patent/JPS6481546A/en
Publication of JPS6481546A publication Critical patent/JPS6481546A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To prevent the oscillation by detecting a level of a communication line so as to open a switch instantly even if the loop of the loop standby system is closed due to any cause. CONSTITUTION:Oscillation takes place at the moment when the loop is closed due to some cause and the signal level of each communication line rises rapidly. The level increased is detected by a level detector 20 in this way and when it is discriminated that the level is higher than the preset level by a comparator 21, an alarm signal is sent to a switch control circuit 1 via a latch circuit 22. Then the switch control circuit 1 controls SWs 1, 2 by the input of alarm signal. When the SWs 1, 2 are opened in this way, since the closing of loop is released, the oscillation of loop is stopped.
JP62237406A 1987-09-24 1987-09-24 Control circuit for loop standby system Pending JPS6481546A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62237406A JPS6481546A (en) 1987-09-24 1987-09-24 Control circuit for loop standby system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62237406A JPS6481546A (en) 1987-09-24 1987-09-24 Control circuit for loop standby system

Publications (1)

Publication Number Publication Date
JPS6481546A true JPS6481546A (en) 1989-03-27

Family

ID=17014915

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62237406A Pending JPS6481546A (en) 1987-09-24 1987-09-24 Control circuit for loop standby system

Country Status (1)

Country Link
JP (1) JPS6481546A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60185454A (en) * 1984-03-02 1985-09-20 Matsushita Electric Works Ltd Simultaneous talking type interphone
JPS62196926A (en) * 1986-02-25 1987-08-31 Nec Corp Break relieving system for microwave communication channel

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60185454A (en) * 1984-03-02 1985-09-20 Matsushita Electric Works Ltd Simultaneous talking type interphone
JPS62196926A (en) * 1986-02-25 1987-08-31 Nec Corp Break relieving system for microwave communication channel

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