JPS6478539A - Optical receiving circuit - Google Patents

Optical receiving circuit

Info

Publication number
JPS6478539A
JPS6478539A JP23562787A JP23562787A JPS6478539A JP S6478539 A JPS6478539 A JP S6478539A JP 23562787 A JP23562787 A JP 23562787A JP 23562787 A JP23562787 A JP 23562787A JP S6478539 A JPS6478539 A JP S6478539A
Authority
JP
Japan
Prior art keywords
digital data
speed digital
low speed
high speed
low
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23562787A
Other languages
Japanese (ja)
Inventor
Haruo Yamashita
Tomoyuki Otsuka
Ryuichi Kondo
Hidetoshi Naito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP23562787A priority Critical patent/JPS6478539A/en
Publication of JPS6478539A publication Critical patent/JPS6478539A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To improve reception sensitivity for both high speed and low speed digital data by providing a high speed digital data receiving preamplifier and a low speed digital data receiving preamplifier in parallel connection for the output from a light receiving element. CONSTITUTION:The high speed data receiving preamplifier 61 set for a wide frequency band whose feedback resistor Rf1 is in a comparatively small value, takes out both high speed digital data and low speed digital data. Also, the low speed data receiving preamplifier 62 set for a low frequency band whose feedback resistor Rf2 is in a comparatively large value, takes out low speed digital data. In such a case, by making the resistor Rf2 large in value, thermal noise can be reduced, and the reception sensitivity for low speed digital data can be enhanced, hence low speed digital data can be correctly taken out. Furthermore, since the amplitude of high speed digital data does not need to be sacrificed, hence high speed digital data also can be taken out correctly.
JP23562787A 1987-09-19 1987-09-19 Optical receiving circuit Pending JPS6478539A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23562787A JPS6478539A (en) 1987-09-19 1987-09-19 Optical receiving circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23562787A JPS6478539A (en) 1987-09-19 1987-09-19 Optical receiving circuit

Publications (1)

Publication Number Publication Date
JPS6478539A true JPS6478539A (en) 1989-03-24

Family

ID=16988813

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23562787A Pending JPS6478539A (en) 1987-09-19 1987-09-19 Optical receiving circuit

Country Status (1)

Country Link
JP (1) JPS6478539A (en)

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