JPS6477943A - Substrate for mounting electronic component - Google Patents
Substrate for mounting electronic componentInfo
- Publication number
- JPS6477943A JPS6477943A JP23572987A JP23572987A JPS6477943A JP S6477943 A JPS6477943 A JP S6477943A JP 23572987 A JP23572987 A JP 23572987A JP 23572987 A JP23572987 A JP 23572987A JP S6477943 A JPS6477943 A JP S6477943A
- Authority
- JP
- Japan
- Prior art keywords
- pair
- sides
- electronic component
- mutually
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
Abstract
PURPOSE:To conduct mechanical recognition sufficiently positively by forming a triangular alignment pattern, two pairs of corresponding both sides of which are mutually parallel while the directions of movement of the positions of these sides by etching, plating, etc., are respectively opposite. CONSTITUTION:A substrate 10 for loading an electronic component has an electronic component loading section 12 shaped onto an insulating substrate 11 and a plurality of conductor patterns 13. A pair of alignment patterns 20 are formed between a pair of the conductor patterns 13 so as to be mutually opposed. At least two pairs of corresponding both sides 21 mutually run parallel in a pair of mutually opposite triangular alignment patterns 20, and the directions of movement of the positions of corresponding both sides 21 by etching, plating, etc., are opposed. Two pairs or more of a pair of these triangular alignment patterns 20 are shaped.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23572987A JP2534515B2 (en) | 1987-09-18 | 1987-09-18 | Electronic component mounting board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23572987A JP2534515B2 (en) | 1987-09-18 | 1987-09-18 | Electronic component mounting board |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6477943A true JPS6477943A (en) | 1989-03-23 |
JP2534515B2 JP2534515B2 (en) | 1996-09-18 |
Family
ID=16990366
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP23572987A Expired - Lifetime JP2534515B2 (en) | 1987-09-18 | 1987-09-18 | Electronic component mounting board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2534515B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007128990A (en) * | 2005-11-02 | 2007-05-24 | Matsushita Electric Ind Co Ltd | Semiconductor device and its manufacturing method |
-
1987
- 1987-09-18 JP JP23572987A patent/JP2534515B2/en not_active Expired - Lifetime
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007128990A (en) * | 2005-11-02 | 2007-05-24 | Matsushita Electric Ind Co Ltd | Semiconductor device and its manufacturing method |
Also Published As
Publication number | Publication date |
---|---|
JP2534515B2 (en) | 1996-09-18 |
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Legal Events
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R250 | Receipt of annual fees |
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EXPY | Cancellation because of completion of term | ||
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