JPS6476356A - Dma transfer system - Google Patents

Dma transfer system

Info

Publication number
JPS6476356A
JPS6476356A JP23553987A JP23553987A JPS6476356A JP S6476356 A JPS6476356 A JP S6476356A JP 23553987 A JP23553987 A JP 23553987A JP 23553987 A JP23553987 A JP 23553987A JP S6476356 A JPS6476356 A JP S6476356A
Authority
JP
Japan
Prior art keywords
transfer
dma transfer
byte count
address
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23553987A
Other languages
Japanese (ja)
Inventor
Michihiro Shinchi
Mitsuhiro Koba
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP23553987A priority Critical patent/JPS6476356A/en
Publication of JPS6476356A publication Critical patent/JPS6476356A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)

Abstract

PURPOSE:To improve the DMA transfer capacity with the DMA transfer fre quency cut down to the half within a device and to improve the processing efficiency of a processor, by transforming the DMA transfer into words within an internal bus. CONSTITUTION:An address byte count deciding part 16 deciding the byte count of the memory address of the transmission data, an address byte count comparing part 26 comparing the byte count of the reception data with that of the memory address are provided. The byte transfer is carried out only for the fraction data of the final address part after the word transfer where the byte count of the transfer data is allocated to the memory address. Thus the transfer is transformed into words within an internal bus so that the DMA transfer capacity is improved with the DMA transfer frequency cut down to the half within a device. Then the processing efficiency of a processor 1 is improved.
JP23553987A 1987-09-18 1987-09-18 Dma transfer system Pending JPS6476356A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23553987A JPS6476356A (en) 1987-09-18 1987-09-18 Dma transfer system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23553987A JPS6476356A (en) 1987-09-18 1987-09-18 Dma transfer system

Publications (1)

Publication Number Publication Date
JPS6476356A true JPS6476356A (en) 1989-03-22

Family

ID=16987478

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23553987A Pending JPS6476356A (en) 1987-09-18 1987-09-18 Dma transfer system

Country Status (1)

Country Link
JP (1) JPS6476356A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0567035A (en) * 1991-09-10 1993-03-19 Hitachi Ltd Data alignment system for dma transfer
WO1998054650A1 (en) * 1997-05-30 1998-12-03 Sanyo Electric Co., Ltd. Communication dma device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59212938A (en) * 1983-05-18 1984-12-01 Nec Corp Dma controller
JPS62154048A (en) * 1985-12-26 1987-07-09 Casio Comput Co Ltd Dma transfer circuit for printer

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59212938A (en) * 1983-05-18 1984-12-01 Nec Corp Dma controller
JPS62154048A (en) * 1985-12-26 1987-07-09 Casio Comput Co Ltd Dma transfer circuit for printer

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0567035A (en) * 1991-09-10 1993-03-19 Hitachi Ltd Data alignment system for dma transfer
WO1998054650A1 (en) * 1997-05-30 1998-12-03 Sanyo Electric Co., Ltd. Communication dma device
CN1109980C (en) * 1997-05-30 2003-05-28 三洋电机株式会社 Communication DMA device
US6584512B1 (en) 1997-05-30 2003-06-24 Sanyo Electric Co., Ltd. Communication DMA device for freeing the data bus from the CPU and outputting divided data

Similar Documents

Publication Publication Date Title
GB2027227B (en) Economy performance data avionic system
EP0321156A3 (en) Data transfer controller
JPS5326539A (en) Data exchenge system
JPS6476356A (en) Dma transfer system
JPS5319728A (en) Data treansfer processing system
JPS5318931A (en) Information processor
JPS5363833A (en) Cyclic buffer receiving system
JPS5314504A (en) Inductive radio transmission unit
JPS54161854A (en) Input/output control system for information processor
JPS5339022A (en) Information process unit
JPS533140A (en) Data transfer system
JPS53148247A (en) Data transmission-reception system
JPS5549057A (en) Multi-polling system
JPS5591018A (en) Communication control system
JPS6438860A (en) Inter-microprocessor interface system
JPS5685176A (en) Picture data compressing device
JPS5488743A (en) Transmission system of packet exchanging data
JPS5250655A (en) Master station device for data highway
JPS6462759A (en) Parallel processing system
JPS6421560A (en) Pre-communication processor subsystem
JPS5365023A (en) Cash system
JPS5572273A (en) Multi-cpu system
JPS531430A (en) Internal interrupt processing system at intelligent terminal
JPS5779541A (en) Interprocessor communication system
JPS56110126A (en) Data transfer system