JPS6476320A - Registration/retrieval control system for memory table - Google Patents

Registration/retrieval control system for memory table

Info

Publication number
JPS6476320A
JPS6476320A JP62235502A JP23550287A JPS6476320A JP S6476320 A JPS6476320 A JP S6476320A JP 62235502 A JP62235502 A JP 62235502A JP 23550287 A JP23550287 A JP 23550287A JP S6476320 A JPS6476320 A JP S6476320A
Authority
JP
Japan
Prior art keywords
registration
address
overflow
information
division table
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62235502A
Other languages
Japanese (ja)
Inventor
Daisuke Miyake
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP62235502A priority Critical patent/JPS6476320A/en
Publication of JPS6476320A publication Critical patent/JPS6476320A/en
Pending legal-status Critical Current

Links

Landscapes

  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)

Abstract

PURPOSE:To increase the access speed for registration and retrieval and to shorten the processing time of the title control system in an overflow state, by using a part of an instruction parameter for production and registration of the address of a specific division table of an overflow table and at the same time retrieving the produced address. CONSTITUTION:When a main table 10 has overflow at registration, a division table address of an overflow table 12 produced with use of a part of an instruction parameter is designed. Then the information is registered into an idle entry of the designated table address. If an idle entry is available, the next idle entry of the division table is searched for registration of information after release of the conditions where the information is registered into the designated division table. While a division table address produced with use of a partial instruction parameter is retrieved also for retrieval of the table 12. In case no address is retrieved out of the designated division table, the next division table is retrieved. Thus it is possible to increase the access speed for registration and retrieval of information and to shorten the processing time when the overflow occurs.
JP62235502A 1987-09-18 1987-09-18 Registration/retrieval control system for memory table Pending JPS6476320A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62235502A JPS6476320A (en) 1987-09-18 1987-09-18 Registration/retrieval control system for memory table

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62235502A JPS6476320A (en) 1987-09-18 1987-09-18 Registration/retrieval control system for memory table

Publications (1)

Publication Number Publication Date
JPS6476320A true JPS6476320A (en) 1989-03-22

Family

ID=16986971

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62235502A Pending JPS6476320A (en) 1987-09-18 1987-09-18 Registration/retrieval control system for memory table

Country Status (1)

Country Link
JP (1) JPS6476320A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007119539A1 (en) * 2006-03-31 2007-10-25 Kyushu Institute Of Technology Address generator
JP2020535510A (en) * 2017-09-26 2020-12-03 インターナショナル・ビジネス・マシーンズ・コーポレーションＩｎｔｅｒｎａｔｉｏｎａｌ Ｂｕｓｉｎｅｓｓ Ｍａｃｈｉｎｅｓ Ｃｏｒｐｏｒａｔｉｏｎ Open address method exploration barrier

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007119539A1 (en) * 2006-03-31 2007-10-25 Kyushu Institute Of Technology Address generator
US8285922B2 (en) 2006-03-31 2012-10-09 Kyushu Institute Of Technology Address generator using LUT cascade logic network
JP2020535510A (en) * 2017-09-26 2020-12-03 インターナショナル・ビジネス・マシーンズ・コーポレーションＩｎｔｅｒｎａｔｉｏｎａｌ Ｂｕｓｉｎｅｓｓ Ｍａｃｈｉｎｅｓ Ｃｏｒｐｏｒａｔｉｏｎ Open address method exploration barrier

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