JPS647352B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in a display correction device for an electronic timepiece that corrects a digital display device by rotating the crown.

BACKGROUND OF THE INVENTION With advances in electronics technology, so-called digital watches, which use a crystal oscillator as an oscillation source and display time using an electro-optical display device such as a liquid crystal cell, are rapidly becoming popular.

The conventional method for adjusting the time of the above-mentioned digital clock is to provide two correction buttons, and use one button to correct the selected correction digit according to the number of times the other button is pressed. This method is often used. However, in the case of only infrequently used functions such as time adjustment, conventional methods with poor operability were sufficient, but with the increase in IC integration, functions such as stopwatches, alarms, and timers have become easier. As it became possible to add functions to the functions, a correction method with good operability and fast correction speed was required due to the need to frequently set numerical values for these functions. Instead of the button method, a reuse method has been adopted that uses a reuse, which had traditionally been used as an operating member for pointer display watches, and adjusts the digital display to a variable speed according to the rotational speed of the reuse. It's here.

An object of the present invention is to provide a correction device for an electronic watch which improves the above-mentioned reuse method and is extremely easy to operate. and,
In the electronic watch equipped with a reuse for correcting display information of the digital display device, a correction signal generating circuit generates a left rotation signal and a right rotation signal in response to left and right rotation of the reuse, The present invention is characterized in that two memory circuits are provided for inputting a signal and a clockwise rotation signal to a set terminal and a reset terminal, respectively, and the identification means of the digital display device is driven by the output signal of the memory circuit.

Embodiments of the present invention will be described below with reference to the accompanying drawings.

The external appearance of an electronic timepiece to which the present invention is applied is as shown in FIG. 1, for example, and includes a pointer display section 1 and a digital display section 2. A reuse 3 is provided as an external operation member for display correction common to both display sections.

Under normal use, the reuse 3 is in the first stable position shown by the solid line, and in the second stable position pulled out one step from there, the display correction of the digital display section 2 can be adjusted. In the stable position, the display of the pointer display section 1 can be corrected by rotating the respective sleeves 3. In either case, when the Reuse 3 is rotated to the right in the direction of the arrow R and when it is rotated to the left in the direction of the arrow L when viewed from the right side of FIG. 1, different information will be obtained as described later. For example, in the case of the digital display section 2, rotating clockwise corrects the first display section 2a, and rotating counterclockwise corrects the second display section 2b.

Further, by rotating the reuse 3 at the first stable position, the display function of the digital display section 2 is switched, and each function of hour and minute display, second display, calendar display, and alarm time display can be selected.

FIG. 2 is a block diagram of a switch controlled by the reuse 3 shown in FIG. 1. _The winding stem 4 integrated into the reuse 3 controls a changeover switch S ₁ and a correction signal input switch S ₂ . When it is in the stable position 1, the contact spring 5 is in a neutral position where it does not come into contact with either contacts e or f, as shown in the figure, and when the relay 3 is pulled out to the second stable position, the contact spring 5 comes into contact with contact e. However, when the reuse 3 is further pulled out to the third stable position, the contact spring 5 operates so as to come into contact with the contact f. Further, the correction signal input switch _S2 has three pieces formed at equal angular intervals on the same circumference centered on the rotation axis of the contact spring 6 having two arms 6a and 6b rotated by the winding stem 4. It is composed of fixed contacts a, b, and c.

Therefore, when the correction signal input switch _S2 rotates the Reuse 3 clockwise, the two arms 6a and 6b, which rotate in opposite directions by the speed increasing gear train mechanism (not shown), alternately connect the fixed contacts a, b, and c in that order. When they come into contact, and conversely rotate the crown 3 to the left, they move to make contact in the order of c, b, and a, and this operation is performed in all stable positions of the sleeve 3.

Furthermore, the two contact springs 5 and 6 are both V _DD
Since it is held at the level, a contact signal of V _DD level (logic "1") is supplied to the fixed contact that is in contact.

FIG. 4 is a block diagram of the electronic timepiece according to the present invention. First, the basic circuit part of the electronic timepiece will be briefly explained.
The frequency is divided by a frequency dividing circuit 31 and a second frequency dividing circuit 32, respectively.

Then, 1Hz output from the first frequency dividing circuit 31
The pulse signal φ ₁ is input to the second counter section S that constitutes the time system counter 33 for digital display. The second counter section S outputs an output pulse every 60 counts to cause the minute counter section M to count up. The minute counter section M further increments the hour counter section H every 60 counts.

A pulse is outputted from the time system counter 33 every 24 hours and inputted to the calendar system counter 36, and the day counter section D and month counter section M are sequentially counted up.

The display information generated from the information generation circuit such as the time counter 33 and calendar counter 36 or the data in the alarm memory 37 is selected by the display control circuit 38 and digitally displayed via the display drive circuit 39. The information is displayed on a liquid crystal display device 40 constituting part 2 (FIG. 1). Note that the selection of the alarm function and function mode will be described later.

On the other hand, a 20 second cycle hand movement pulse signal φ ₂ and a 64 Hz fast forward pulse φ ₃ are output from the second frequency dividing circuit 32.
After passing through the pointer correction device 10, the waveform conversion circuit 41 converts the pulse waveform into a step motor driving pulse waveform, which drives the step motor 43 via the motor driving circuit 42. Thereby, the time is displayed on the hand display section 1 (FIG. 1) by a well-known mechanism.

Next, an electronic circuit portion as a digital display correction means will be explained.

In the correction signal input switch _S2 mentioned above, when the reuse 3 is rotated clockwise, the contact spring 6 as a movable contact rotates in the direction shown by the arrow R in FIG. 3, and the fixed contact changes from b to c to a. As shown in FIG. 6A, a pulse signal which becomes high level "1" in the order of b, c, and a is obtained. Furthermore, when the reuse 3 is rotated to the left, the contact spring 6 rotates in the direction shown by the arrow L in FIG. 3 and comes into contact with the fixed contact in the order of c→b→a, as shown in FIG. Pulse signals that become high level "1" in the order of c, b, and a are obtained.

The pulse signals obtained at the fixed contacts a, b, and c of this switch _S2 are input to the correction signal forming circuit 44,
The first corrected signal _P1 and the second corrected signal P1 are distinguished by their input order.
A modified signal P ₂ is formed.

The correction signal forming circuit 44 includes three logic differentiating circuits 45 to 47 and three set signals, as shown in FIG.
Reset type flip-flop circuit (hereinafter abbreviated as "FF") 48-50, 6 ANDs
Circuits 51 to 56 and two OR circuits 57 and 58
It is composed of:

The logic differentiating circuits 45 to 47 are composed of one-shot multi-type circuits, etc., and convert the pulse signals inputted from the fixed contacts a, b, and c of the switch _S2 into fixed short pulse signals as shown in FIG. Shape the waveform into pulse width signals A, B, and C.

F・F48 is set by pulse signal A and output
_Q1 is set to "1", ₁ is set to "0", and the output is reset by pulse signal C, and output _Q1 is set to "0" and output _Q1 is set to "1". F・F49 is set by pulse signal B to make output Q ₂ “1” and output Q ₂ to “0”, and reset by pulse signal A to make output Q ₂ “0” and output Q ₂ to “1”.
Make it. Similarly, F.F50 is set by pulse signal C to make output Q3 " ₁ ", output _Q3 "0",
It is reset by pulse signal B and output _Q3 is set to “0”.
Set _Q3 to “1”.

Therefore, the output Q ₁ of each F・F 48 to 50,
Q ₁ , Q ₂ , ₂ , Q ₃ , ₃ become as shown in Figure 6A when the reuse is rotating clockwise, and as shown in Figure 6 when rotating counterclockwise. That is, the waveforms differ depending on the direction of rotation of the reuse.

Then, the output g ₁ of the AND circuits 51, 53, 55,
g ₂ , g ₃ and the outputs h ₁ , h ₂ , h ₃ of the AND circuits 52, 54, 56 are as follows.

g ₁ = Q ₁・B g ₂ = Q ₂・C g ₃ = Q ₃・A h ₁ = ₁・B h ₂ = ₂・C h ₃ = ₃・A Therefore, output from the OR circuit 57 1st
The modified signal P ₁ and the second modified signal P ₂ output from the OR circuit 58 are as follows.

P ₁ = g ₁ + g ₂ + g ₃ = Q ₁・B+Q ₂・C+Q ₃・A P ₂ =h ₁ +h ₂ +h ₃ = ₁・B+ ₂・C+ ₃・A Then, turn the reuse clockwise (turn the pointer When the motor is rotated in the direction of forward movement), only the first correction signal _P1 is output as shown in Fig. 6A.
When the reuse is rotated counterclockwise (in a direction that causes the pointer to retard), the second
Only the modified signal _P2 is output.

The first modified signal P ₁ and the second modified signal P ₂ are
Each counter constituting the time system counter 33, calendar system counter 36, and alarm memory 37 is 1 correction signal P ₁ is the hour counter section H,
The second correction signal P2 is input to the month counter section M and the hour memory section H, and the second correction signal _P2 is input to each correction input terminal of the minute counter section M, day counter section D and minute memory section M.

Thereby, by rotating the reuse 3 clockwise, the information displayed on the first display section 2a can be changed to the time display, calendar display, or alarm memory time displayed on the digital display section 2. The information on the second display section 2b can be corrected by correcting it and rotating it counterclockwise.

Selection of the functional mode is performed by a shift register 70 for functional mode selection. This shift register 70 has bits WT, TC, CA, and AL for time mode selection, time correction mode selection, calendar mode selection, and alarm mode selection.
One of the bits becomes "1" and the other bits become "0".

This shift register 70 is a changeover switch.
AND gate 91 that is opened under the condition that contact spring 5 of _S1 is not in contact with either contact e or f, that is, when output point d of NOR gate 90 is "1"
The correction signal provided via OR gate 92 to
Using P ₁ and P ₂ as clock signals, WT→TC→CA→
Move in order of AL. Each bit signal of the shift register 70 opens the corresponding AND gates 71, 72, 73, and 74, and at the same time is supplied to the display control circuit 38 as a mode select signal M.S, and outputs the WT bit signal to the digital display device 2. Displays the hours and minutes using the TC bit signal, displays the seconds using the CA bit signal, displays the month and day using the CA bit signal, and displays the alarm memory time using the AL bit signal. The above switching display operation is the first
This can be done by rotating the reuse 3 to the right or to the left in the first stable position as explained in the figures.

Next, a correction circuit for a digital display device will be explained. 95 is a correction information identification circuit, and F.
It is composed of F96, 97 and two OR gates 98, 99, and the first correction signal is connected to the set terminal of F/F96 and the reset terminal of F/F97.
_P1 is also connected to the reset terminal of F・F96 and F・F9
The second correction signal _P2 is mutually input to the set terminals of F and F97, and the reset terminals of both F and F97 are connected to the output terminal d of the NOR gate 90 via OR gates 98 and 99. . And F.
The first identification signal output from the output terminal _Q1 of F96 opens and closes the AND gates 62, 64, and 66, and also controls the _D1 terminal of the display control circuit 38.
By displaying only the first display section 2a of the digital display device 2, it is identified and displayed that the information on the first display section can be modified.

Also, the second identification signal output from the output terminal _Q2 of the F.F97 opens and closes the AND gates 61, 63, and 65, and also controls the _D2 terminal of the display control circuit 38, so that only the second display section 2b is displayed. This identifies and displays that the information on the second display section can be modified. The operation of the correction circuit in the above configuration will be explained in the time mode selection state which is usually used most often.

In this state, the shift register 70 is in the WT state.
The bit terminal is set to "1", and the display control circuit 38 selects the information of the time system counter 33 according to the time mode select signal, and the information of the hour display section H is displayed on the first display section 2a of the digital display device 2. Also second
Information on a minute display section M is displayed on the display section 2b.

Also, since the output terminal d of the NOR gate 90 is "1", F/F 96, 97 of the correction information identification circuit 95
are both in a reset state. When the reuse 3 is pulled out one step and set in the second stable position in order to correct the displayed time from this state, the contact spring 5 of the changeover switch _S1 comes into contact with the contact e.

As a result, contact e becomes “1” and AND gate 7
2, 73, 74 and the display drive circuit 39
The entire display of the digital display device 2 is made to blink by controlling the blinking terminal F of the digital display device 2 to clearly indicate that it is in a state where correction is possible. Also, the output terminal d of the NOR gate 90 is “0”
When the AND gate 91 is closed, the AND gate 71 is closed via the inverter 100, and the reset of the F/Fs 96 and 97 is released via the OR gates 98 and 99.

In this state, the output terminals of F/F96 and 97
Both Q ₁ and Q ₂ are “0”, so AND
The gates 61 to 66 are all closed, and the identification terminals D ₁ and D ₂ of the display control circuit 38 are not controlled.

When the correction signal input switch _S2 is turned clockwise from this state, the first correction signal _P1 is output from the correction signal forming circuit 44 as described above, but the first one pulse is the correction signal input that is all closed. Since it is blocked by the group of gates 60, it does not become a correction signal, but only sets F and F96 of the correction information identification circuit 95. As a result, the output terminal of F・F96
When Q ₁ is inverted to “1”, the D ₁ terminal of the display control circuit 38 is controlled and the digital display device 2
By displaying only the hour on the first display section 2a at the time, it is possible to identify and display that the clockwise rotation of the watch 3 is in the hour display correction mode, and furthermore, the AND gates 62, 64, and 66 are opened. AND gates 63 to 66 are not opened because the CA and AL bit terminals of shift register 70 are set to "0".
Only AND gate 62 is opened.

Therefore, when the reuse 3 is further rotated clockwise, the first correction signal P ₁ from the second pulse passes through the AND gate 62 and corrects the information in the hour counter section H of the time system counter 33.

When the correction of the time information is completed by the above operation, next rotate the reuse 3 to the left. The first pulse of the second correction signal P ₂ due to this left rotation is also blocked by the closed AND gate 61 and therefore does not become a correction signal.
Reset F96 and invert F/F97 to the set state.

As a result, the output terminal Q ₁ of F・F96 is “0”,
Since the output terminal Q ₂ of the F.F97 becomes “1”, D ₂ of the display control circuit 38 is controlled and the second display section 2
By displaying only the minutes b, it is possible to identify and display that the counterclockwise rotation of Reuse 3 is in the minute display correction mode, and in addition, only the AND gate 61 is opened.
When the reuse 3 is further rotated to the left, the second correction signal _P2 from the second pulse passes through the AND gate 61 and corrects the information in the minute counter section M.

As described above, the configuration of the present invention is such that the first one of the correction signals P ₁ and P ₂ due to the left and right rotation of the reuse 3 is
The pulse is not used as a correction signal, and the correction information identification circuit 95 is activated to only identify correctable information, so even if you accidentally turn the crown clockwise when you want to correct only the minute information, the identification will not be displayed. This allows you to notice the incorrect correction of the hour information before it is done, and then rotate the reuse counterclockwise again to correct the minute information correctly.

Incidentally, when adjusting from the above time display mode WT, the second counter section S of the time system counter 33 is not reset at the time of adjustment, so it can be used as a world clock function to change the hour or minute according to the time difference.

Next, I will explain about the time correction mode TC.
When the Reuse 3 is returned to the first stable position and the Reuse 3 is rotated, the correction signal P ₁ or P ₂ is
When the output terminal d of the NOR gate 90 is inverted to "1", it passes through the AND gate 91, which is opened, and advances the shift register 70 by one step.
Set only the bit terminal to “1”. As a result, the display control circuit 38
A time-related counter 33 is displayed on the second display section 2b.
Displays the information of the second counter section S. and
Open AND gate 71 and then OR gate 101
AND gate 72 is opened via. When the reuse 3 is pulled out one step from this state, the contact e of the changeover switch S ₁ becomes "1", opening the AND gate 72 and simultaneously setting the output terminal d of the NOR gate 90 to "0".
and close the AND gate 91, F・F96,
97 reset. Furthermore, a reset signal R _P is generated from the d terminal via the inverter 100 and the AND gate 71, and the second counter section S of the time system counter 33 and part of the first frequency divider circuit 31 and the second frequency divider circuit 32 are reset. By controlling the _D3 terminal of the display control circuit 38, the display of the digital display device 2 is switched from seconds display to the information of the hour counter part H and minute counter part M of the time system counter 33, that is, to the hour and minute display state.

From this state, adjust the hour and minute display by rotating the reuse left and right in the time display mode.
The operation is the same as in the WT, but since the second counter section S and the first frequency dividing circuit 31 are reset during the correction operation, after the correction is completed, the reuse 3 is set to the first frequency at the same time as the time signal from the TV etc. By pushing it into a stable position, accurate time setting can be performed. Similarly, to correct the calendar mode CA and set the time in the alarm mode AL, select the bit in the shift register 70 by rotating the watch 3 in the first stable position, and
Display the month information or hour information on the second display section 2b, and the day information or minute information on the second display section 2b.From this state, pull out the Reuse 3 to the second stable position and turn it clockwise to display the display on the first display section 2a. By turning left, the display on the second display section 2b can be identified and corrected. At this time, the relationship between each gate for time adjustment and each gate for calendar adjustment and alarm time setting is AND gate 72, 73, 7.
4 corresponds, and AND gates 61, 63, 65,
It goes without saying that the AND gates 62, 64, and 66 perform corresponding operations.

To briefly explain the alarm function, when the data in the minute counter part M and hour counter part H of the time system counter 33 match the data in the minute memory part M and hour memory part H of the alarm memory 37, a match detection circuit is activated. If the output of the flip-flop circuit 75 becomes "1" and the output Q of the toggle type flip-flop circuit 76 becomes "1", the output of the AND gate 77 becomes "1", and the buzzer drive circuit 79 turns on the buzzer 80. drive and generate an alarm sound.

Then, when the alarm mode is selected and the contact spring ₅ of the changeover switch S1 is brought into contact with the e terminal with the AL bit terminal set to "1", the contact signal is transmitted through the differentiating circuit 82 and the AND gate 83 to the rising pulse. is a toggle type flip-flop circuit 76
and inverts its output Q from "1" to "0" or from "0" to "1". When the output Q is "1", the alarm is on, and by supplying that signal to the display control circuit 38,
It is displayed on the liquid crystal display device 40.

Next, the correcting operation of the pointer display section 1 will be explained using the configuration of the pointer correcting device shown in FIG.

The pointer correction device 10 receives as input signals a hand movement pulse signal φ ₂ , a fast forward pulse φ ₃ , correction signals P ₁ , the f terminal of the P ₂ changeover switch S ₁ , a WT bit signal in time display mode, a TC bit signal in time correction mode, It inputs the signals of the outputs Q ₁ and Q ₂ of the F/Fs 96 and 97 constituting the correction information identification circuit 95 and supplies the waveform conversion circuit 41 with hand movement signals according to various conditions described later, and the fast forward pulse φ ₃ is the clock input,
A time difference correction counter 11 having count output terminals O ₁ and O ₂ with count numbers 180 and 181, two signal switching circuits 12, 13, two F/F 14, 15, AND
Gate 16, 17, 18, 19, OR gate 2
0, 21, and an inverter 22.

In the normal state where the reuse 3 is in the first stable position, the two F/Fs 14 and 15 are both in the reset state, so the output Q is "0" and the F/F 14's output Q is "0". The output Q closes the AND gate 16 and resets the time difference correction counter 11 via the inverter 22.

Also, since the input signals f, WT, and TC are all "0", the AND gates 17, 18, and 19 are closed, and the signal switching circuit 12 switches to the second division by the "0" signal supplied to its switching terminal E. By selectively outputting the hand movement pulse signal φ ₂ inputted from the circuit 32 to the G ₁ terminal and supplying it to the waveform conversion circuit 41 via the OR gate 21, a normal hand movement operation with a period of 20 seconds is performed.

Next, when the reuse 3 is rotated in the first stable position and the reuse 3 is pulled out to the third stable position with the time display mode WT selected, the contact spring 5 of the changeover switch _S1 comes into contact with the contact f.

Therefore, since the input signals f and WT both become "1", the output of the AND gate 17 also becomes "1",
When the AND gates 18 and 19 are opened, the signal switching circuit 12 selectively outputs the hand movement pulse signal φ ₂ to the G ₂ terminal in response to the "1" signal supplied to its switching terminal E. In this state, when the reuse 3 is rotated clockwise, the first pulse of the first correction pulse _P1 causes the correction information identification circuit 95 to detect the F. F96 is set, and its output _Q1 displays the time information on the first display section 2a of the digital display section 2, and opens the AND gate 19 to allow the first correction pulse _P1 to pass. Therefore, when the reuse 3 is further rotated clockwise, the next first correction pulse _P1 passes through the AND gate 19, and F.F.
Set 14. Then, when the output Q of this F・F14 is inverted to "1", AND gate 1
6 opens, the reset of the time difference correction counter 11 is canceled via the inverter 22.

As a result, 64
By outputting a fast forward pulse φ ₃ of Hz through the AND gate 16 and the OR gate 21, the pulse motor 43 is fast forwarded and the time difference correction counter 11 starts counting.

When the count value of the counter 11 reaches 180, a signal is generated from the count output terminal _O1 , and the output Q is inverted to "0" by resetting the F.F14 through the signal switching circuit 13, and the AND gate 16
At the same time as closing, the counter 11 is reset.

After the above fast forward operation is completed, the corrective pulse _P1 is applied by rotating the reuse 3 clockwise again to F/F1.
It is repeated every time 4 is reset. The number of fast-forward pulses supplied to the pulse motor 43 by this one fast-forward operation is 180 in this embodiment.
This is the number of pulses for correcting the pointer display device 1, which has a 20 second hand movement cycle, by one hour.

Moreover, when the hand movement pulse signal φ ₂ is output from the second frequency dividing circuit 32 during the above-mentioned fast forward operation, this pulse φ ₂
passes through the _G2 terminal of the signal switching circuit 12 and becomes F.F.
Set 15. As a result, the signal switching circuit 13 whose switching terminal E is controlled by the output of the F.F. To select the signal from output terminal O ₂ ,
After supplying a fast forward pulse of 181 pulses to the pulse motor 43, F and F14 and F15 are reset, and 1
Ends the fast-forward operation.

That is, the above operation simultaneously performs normal hand movement using the hand movement pulse signal φ ₂ and correction of the time difference by one hour, and the time difference can be corrected without disturbing the time. In this embodiment, the reason why only one pulse of the hand movement pulse signal φ ₂ can be stored by F.F15 is the 64Hz fast forward pulse φ _{3 .}
The time required to make one hour's correction is approximately 3 seconds, and the hand movement pulse signal φ ₂ with a period of 20 seconds is:
This is because only one pulse is generated during this fast forward operation.

Next, when the reuse 3 is rotated counterclockwise, the first pulse of the second correction signal P ₂ output from the correction signal forming circuit 44 causes the F
F96 and F97 are each inverted, and the output Q of F and F97 becomes "1". As a result, the minute information is identified and displayed on the second display section 2b of the digital display section 2, and the AND gate 18 is opened to generate the second correction pulse.
Allows passage of P ₂ .

Therefore, if Reuse 3 is further rotated to the left, AND gate ₁ will be activated from the next second correction pulse P2.
8 and the OR gate 21, the pulse motor 43 is corrected step by step, and the time difference is corrected in minutes.

The above series of time difference correction operations are performed on the digital display section 2.
While looking at the standard time displayed on the screen, a certain amount of time difference correction can be made to the standard time, so the time difference can be corrected accurately and easily.

Next, when the crown 3 is rotated in the first stable position and pulled out to the first position with the time correction mode TC selected, the TC bit signal of the shift register 70 becomes "1". The selector switch is placed on the AND gate 71 that is opened.
By applying the operation signal S ₁ , a reset signal R _P is generated, which resets the stage subsequent to the fast-forward pulse φ ₃ generating portion in the second frequency dividing circuit 32 .

In this state, the correction operation of the pointer display section 1 by left and right rotation of the watch 3 is exactly the same as the time difference correction operation described above.

After the time adjustment is completed, normal clock operation is resumed by pushing the watch 3 into the first stable position in synchronization with a time signal from a television, etc., as in the case of the digital display section 2 described above.

In this embodiment, the first pulse of the correction signals P ₁ and P ₂ is used to display the identification, and the correction operation is performed from the second correction pulse. If the increasing gear train ratio before rotating S ₂ is large, a slight rotation of the rear engine will generate multiple correction pulses, so the identification display will indicate that the engine is rotating in the wrong direction. By the time you notice it, the erroneous correction has already been made by the second and subsequent correction pulses.In this case, install a counter that is linked to the reuse operation or a timer T shown by the dotted line in Figure 3. Therefore, it would be better if the correction signal input gate is opened after a certain period of time has elapsed from the start of the identification display or after a certain number of pulses have been counted, and the correction operation using the correction pulse is performed.

As described above, according to the present invention, each display information on the digital display section can be corrected at high speed because different information can be corrected at variable speeds by rotating the reuse left and right, and only the identification display operation can be performed by the initial pulse of the reuse operation. After confirming the identification display, the correction operation is performed, making it possible to prevent erroneous correction.

This has the effect of making the digital multifunctional watch extremely easy to use and significantly improving its product appeal.

[Brief explanation of drawings]

Fig. 1 is a front view showing the external appearance of an electronic timepiece to which the present invention is applied, Fig. 2 is an explanatory diagram of each switch controlled by the reuse, and Fig. 3 is a circuit configuration of the electronic timepiece of the present invention. The block diagrams shown in FIGS. 4 and 5 are block diagrams showing the configurations of the correction signal forming circuit and pointer correction device shown in FIG. 3, respectively.
Figures A and B are waveform diagrams of each part. 1...Pointer display section, 2...Digital display section, 3
... Reuse, 10 ... Pointer correction device, 33 ...
Time system counter, 36... Calendar system counter, 37... Alarm memory, 44... Correction signal forming circuit, 60... Gate group for correction signal input, 7
0...Shift register, 80...Buzzer, 95...
...Modification information identification circuit, S ₁ ...Selector switch, S ₂ ...
...Correction signal input switch.

Claims (1)

[Claims] 1. An information generation circuit that generates display information such as time information, a digital display device that displays output information of the information generation circuit, a correction signal input circuit that supplies a correction signal to the information generation circuit, and the information generation circuit. In an electronic watch comprising a display control circuit for identifying and displaying specified correction information on the digital display device, and a reuse for correcting the display information of the digital display device, the reuse is compatible with counterclockwise rotation. a correction signal forming circuit that generates a first correction signal in response to the clockwise rotation of the crown and a second correction signal in response to the clockwise rotation of the crown;
Also, a first storage circuit inputs the second correction signal to the reset terminal, and a second storage circuit inputs the second correction signal to the set terminal, and the first correction signal to the reset terminal.
a correction information identification circuit having a storage circuit; the output signal of each of the two storage circuits is supplied to the display control circuit to cause the digital display device to identify and display the correction information; By supplying the output signals of the two storage circuits, the first correction signal, and the second correction signal to the circuit, a correction signal is changed and outputted from the correction signal forming circuit after the rotation direction of the reuse is changed. Among them, the first pulse is the second pulse of the correction information identification circuit.
By inverting the memory circuit, the identification display is changed and the selection gate of the correction input circuit is switched, and the correction signal from the second pulse passes through the switched selection gate and the correction information displayed in the identification is changed. A correction device for an electronic watch, characterized in that it corrects the following.