JP2573204B2 - Electronic clock with calendar - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a calendar-equipped electronic timepiece having an automatic month-end correction function for a date plate.

[Conventional technology]

Conventionally, in the usual pointer-type calendar clock, the date is corrected by the crown at the end of the month of the small month, but in order to eliminate this annoyance, a calendar information storage circuit is provided, At the end of the month, a so-called automatic end-of-month correction system has been proposed which automatically corrects the display of the date plate according to the information in the calendar information storage circuit.

The key technologies in the automatic month-end correction system are a calendar information creation technology for storing information such as the date, a date plate correction technology for correcting the date plate according to the created calendar information, and a stored technology. This is a monitoring technique for monitoring calendar information, and the present applicant has already proposed various systems.

For example, Japanese Patent Publication No. 58-22713 discloses a method of fast-forwarding the motor for driving the time display hands and correcting the date plate.
Japanese Patent Publication No. Sho 60-13153 for the method of providing a date plate driving motor separately from the date and pointer driving motors, and Japanese Patent Application Publication No.
Japanese Patent Application Laid-Open No. 54-79661 proposes a method of storing and monitoring the date by providing a lunar plate.

Further, Japanese Patent Application Laid-Open Nos. 55-166677 and 56-8586 propose a technical idea of monitoring stored calendar information with a button operation so that the second hand is displayed in an unusual display state. It is proposed that the date be indicated by a guideline.

[Problems to be solved by the invention]

However, since each of the automatic month-end correction systems is a method of fast-forward correcting the date according to the calendar information in which the year and month are set, if the calendar information is not correctly set, an incorrect rear plate correction is performed. The action is performed, resulting in distrust of the wearer.

Also, by setting the calendar information exactly once,
Even when the correct automatic month-end correction operation is being performed, there is a danger that a malfunction occurs because the calendar information is lost by replacing the battery.

An object of the present invention is to provide an electronic timepiece with a calendar function that solves the above-mentioned drawbacks and does not give a distrust to a wearer by prohibiting an automatic month-end correction operation when calendar information is not set correctly. That is.

[Means for solving the problem]

The configuration of the present invention for solving the above problems is as follows.

Guideline for displaying time, date display member for displaying date, calendar information storage means for storing calendar information such as year and month, and month end correction for correcting the end of small months according to the information in the calendar information storage means In the electronic timepiece provided with the means, a month end correction prohibition circuit for setting the month end correction means to a non-operating state is provided, and the month end correction prohibition circuit is provided with a power-on signal generated when a battery is turned on or an external operation member. Is set in a prohibition state by the operation signal, and the prohibition state is released by an information setting signal to the calendar information storage means.

〔Example〕

 Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a front view showing the appearance of an electronic timepiece with a calendar according to the present invention, wherein 1 is an electronic timepiece, 2 is an hour hand, 3 is a minute hand, 4 is a second hand, and the hour hand 2 and minute hand 3 are described later. The second hand 4 is driven by a second motor, which will be described later, and also displays year and month information corresponding to each display of the function display 5. It is.

Reference numeral 6 denotes a calendar window, 7 denotes a date plate, and 8 denotes a crown, each of which has a drawer position of 0 stage, 1 stage, and 2 stages as in a normal calendar-equipped clock. The hour hand 2 and the minute hand 3 are corrected early by rotating in two stages. 9 is a push button. In addition, the function display section 5 includes:
A month display section 5a having month information of 1 to 12 at positions of 5 seconds,
A year display section 5b provided with four year marks Y1, Y2, Y3, and Y4 indicated by oblique lines is provided, and a second display section is provided at a position of 0 second.
The OF mark is provided.

Next, the operation of the electronic timepiece 1 having the above configuration will be described with reference to each display mode of the function display section 5 shown in FIG.

First, the initial setting operation of the electronic timepiece 1 with the battery exchanged will be described. The electronic timepiece 1 has the crown 8 in the 0-step position, the second hand 4 in the second display mode, and as shown in FIG. The hands are moved in second steps. In order to initialize the second hand 4 from this state, as shown in FIG. 2 (b), if the push button 9 is kept pressed for 5 seconds when the second hand 4 comes to the 0 second position (the position of the OF mark), the second hand 4 After moving the hand in steps of 1 second to the position of 5 seconds as indicated by the solid arrow, the hand is rapidly moved as indicated by the dotted arrow and stopped at the 0 second position, that is, the OF mark position. As a result, the position of the second hand 4 is electrically stored, and the function display unit 5 enters the year display mode shown in FIG. The year can be set in this state. That is, when the push button 9 is pressed in this state, as shown in the year display section 5b of FIG.
(7 seconds position), Y2 (22 seconds position), Y3 (38 seconds position), Y4
The year setting is made by moving the five positions (53 second position) each time the button is pressed. For each of the above positions, the OF is automatically corrected at the end of the month.
F and Y1 correspond to leap years, and Y2, Y3 and Y4 correspond to the first, second, and third years from the leap year.

After the operation of the push button 9 in the initial setting of the second hand 4 or the year setting is completed, if the apparatus is left for 3 seconds or more, the monitor mode returns to the monitor mode described later. After the initial setting of the second hand 4 is completed, the push button 9 is operated. Move the second hand 4 to Y1 for leap years and Y2, Y3, and Y4 for the first, second, and third years from the leap year, and leave it for 3 seconds in that state. Depending on the year setting or month end automatic correction
You can select OFF.

 Next, the month and day setting operation will be described.

When the crown 8 of the electronic timepiece 1 shown in FIG. 1 is pulled out to the first stage, the date plate 7 can be quickly corrected by turning the crown as described above, as in the case of the conventional calendar timepiece. At the same time, the second hand 4 enters the month display mode shown in FIG.
When the push button 9 is pressed in this state, 1 to
The month setting is performed by moving the 12 digit positions each time the button is pressed.
Then, after setting the month and day, the crown 8 is returned to the 0th stage to complete the setting operation. The second hand 4 maintains the month display mode, but the day setting in the setting operation does not exist. In the case of a day, a non-existence day detection circuit, which will be described later, operates to correct the display of the date plate on the first day of the next month. Also, when the year is not set in the year display mode,
If OF is selected, or if the initial setting is not performed after replacing the battery as described later, the second hand 4 does not switch to the month display mode and remains in the second display mode even when the crown is pulled out to the second stage. The month setting by the push button 9 is not performed.

 Next, the time adjustment operation will be described.

The hour hand 2 and the minute hand 3 can be mechanically corrected by pulling out and rotating the crown 8 of the electronic timepiece 1 shown in FIG. At the same time, the second hand 4 is forcibly set to the second display mode shown in FIG. 2A, and the operation of the second hand 4 stops. Then, after correcting the hands, the second hand 4 starts by returning the crown 8 to the 0th stage.

 Next, the year and month monitoring operation will be described.

By operating the push button 9 in the monitor mode in which the crown 8 of the electronic timepiece 1 shown in FIG. 1 is at the 0-step position, the function selection of the second hand 4 on the function display section 5 and the year,
You can monitor the moon. That is, in FIG.
The short-time operation of the push button 9 indicated by the symbol (when the operation is performed for 5 seconds or more, the initial setting mode is set as described above)
As shown in the figure, the second display mode, the year display mode, and the month display mode can be cyclically selected, and the second display mode and the month display mode are fixed displays, but the year display mode is monitored. Only five seconds after the selection, the timer shifts to the next month display mode as indicated by the dotted line. That is, the second hand 4 can be selected from a second display and a month display by the push button 9,
The year can be monitored for only seconds.

Also, when OF is selected in the year setting in the year display mode and when the initial setting is not performed, the monitor mode is not set even at the 0th position of the crown 8 and the year display mode by the push button 9 and the month are set. It becomes a dead mode in which the display mode is not selected, and is fixed to the second display state.

Next, the structure of the electronic timepiece 1 will be described with reference to FIG. FIG. 4 is a plan view of a main part showing the relationship between the calendar mechanism and the switch, and 20 is a winding stem operated by the crown 8;
21 is the Tsuzumi wheel mounted on the Makinshin 20, and 23 is the narrow diameter part of the Makinshin 20
A switch lever that engages with the pull-out of the winding stem 20 by engaging with the winding stem 20a. Reference numerals 24 and 25 denote electrodes formed on the circuit board. The first and second electrodes are closed by the switch lever 23 and the electrode 24 when the crown 8 is pulled out to the first stage.
Construct crown switch SR1 and switch lever 23
And the electrode 25 constitute a second crown switch SR2 which is closed when the crown 8 is pulled out to the second stage. 7
Is the date plate, on the inner periphery of which is formed a date feed tooth 7a,
Further, a projection 7b for detecting a specific date, which will be described later, is provided on the outer peripheral portion.

27 and 28 are switch levers controlled by the protrusion 7b, 29 and 30 are contact pins, and the switch lever 27
And the contact pin 29 constitute a first date plate switch SH1,
The switch lever 28 and the contact pin 30 constitute a second date plate switch SH2. Reference numeral 31 denotes a switch lever operated by the push button 9. The switch lever 31 and the contact pin 32 constitute a push button switch SPB. Reference numeral 33 denotes a date wheel, reference numeral 34 denotes a Sunday control lever, reference numeral 35 denotes an hour wheel, and reference numerals 2, 3, and 4 denote hour, minute and second hands shown in FIG.

Next, the operation of each switch having the above configuration will be described.

First, in the state where the crown 8 is at the 0-stage position, the switch lever 23 is not in contact with any of the electrodes 24 and 25, so that the first crown switch SR1 and the second crown switch SR2 are both OFF. When the crown 8 is pulled out to the first step, the switch lever 23 engaged with the small diameter portion 20a of the winding stem 20 rotates about the rotation shaft 23a, so that the contact portion 23b comes into contact with the electrode 24, and the first Crown switch SR1 turns ON. At the same time, the quick-setting claw 21a provided on the pinion wheel 21 meshes with the date feed tooth 7a of the date plate 7, so that the date plate 7 can be fast-forward corrected by rotating the winding stem 20.

Next, pull out crown 8 to the 2nd stage and switch lever 23
Is further rotated, and the contact portion 23b makes a switching contact from the electrode 24 to the electrode 25. As a result, the first crown switch
SR1 is turned off, and the second crown switch SR2 is turned on. In this state, although not shown, the time is adjusted by rotating the winding stem 20 as described above.

Next, the operation of the date plate switches SH1 and SH2 will be described.
The switch levers 27, 28 are urged by spring portions 27a, 28a so that the sliding portions 27b, 28b are pressed against the outer peripheral portion of the date plate 7 to slide. In the state shown in FIG. 4, the switch lever 28 constituting the second date plate switch SH2 has the contact portion 2b because the sliding portion 28b slides on the outer periphery of the date plate 7.
8c does not contact the contact pin 30 and the second date switch SH2 is OFF
It has become. Further, the switch lever 27 constituting the first date plate switch SH1 has the contact portion 27c contacting the contact pin 29 by the sliding portion 27b riding on the projection 7b of the date plate 7, and the first date plate switch SH1 is turned ON. Has become.

That is, the date plate switches SH1 and SH2 are controlled by the projections 7b of the date plate 7, and the relationship between the projections 7b and the switch levers 27 and 28 is as shown in the time chart of FIG. ing. FIG. 5 (a) shows the date of the date plate 7 displayed on the calendar window 6, and FIG. 5 (b) shows the operation of the first date plate switch SH1, and FIG. Shows the operation of the second date plate switch SH2. In other words, the position and the shape of the projection 7b on the date plate 7 are set to the first position while the 29th and 30th days are displayed on the calendar window 6.
Turn on the date plate switch SH1 and set the calendar window 6 to 30 days and 3 days.
The second day plate switch SH2 is turned ON while one day is displayed.

Further, the operation of the push button switch SPB is turned on when the switch lever 31 is operated by the push button 9, whereby the contact portion 31a contacts the contact pin 32.

Next, the circuit configuration of the electronic timepiece 1 will be described with reference to the block diagram of FIG.

Reference numeral 50 denotes a reference oscillation circuit, reference numeral 51 denotes a pre-stage frequency divider, and reference numeral 52 denotes a post-stage frequency divider. The pre-stage frequency divider 51 divides the frequency of the oscillation signal of the reference oscillation circuit 50 to 128 Hz as shown in FIG. Fast-forward signal P
Outputs c _1, 20-second period indicated in the subsequent stage frequency divider 52 Figure 12 a second signal P ₁ and Figure 12 of 1Hz shown in (b) by dividing early the transmission signal Pc ₁ (c) and outputs the 20-second signal P _20. 53 is a drive signal generator, the 20-second signal P ₂₀ and early transmission signal
Pc ₁ is input, and the hour / minute hand drive signal Pmk having a cycle of 20 seconds and a pulse width of 128 Hz shown in FIG. 54 When a minute hand fast transmission signal generating circuit, and inputs the minute hand driving signal Pmk when said fast transmission signal Pc _1, and outputs the minute hand fast transmission signal Pc ₂ when shown in Fig. 12 (e).

60 hand position counter for electrically storing the position of the second hand 4, the second counter which receives the second signal P ₁ is 61, 6
2 is a month counter driven by the operation signal of the second date plate switch SH2, 63 is a carry signal of the month counter 62,
The year setting signal Sys and the year correction pulse Py from the control signal generating circuit 75 to be described later are input, and the year setting signal
s In the case of quinary mode (0-4), Is a year counter operating in quaternary mode (1-4). Numeral 64 denotes a month decoder which inputs a month information signal Dm of the month counter 62 and outputs a month position information signal Dmp in 5-second units corresponding to the month display section 5a of the function display section 5. A year decoder 65 receives the year information signal Dy of the year counter 63 and outputs a year position information signal Dyp corresponding to each of the year marks Y1, Y2, Y3, Y4 of the year display section 5b. 66 is a zero memory for outputting a zero information signal Do corresponding to the zero second position (OF mark position) of the function display section 5, 67 is a data switching circuit, and the data switching circuit 67 is a second information signal Ds and year position. The information signal Dyp, the moon position information signal Dmp, and the zero information signal Do are input, and one of the information is output as a selection information signal Dc in accordance with the conditions of selection terminals B1, B2, B3, and B4 described later. I do.

Reference numeral 68 denotes a coincidence detection circuit, which outputs a coincidence signal Sc when the selection information signal Dc selectively output from the data switching circuit 67 and the needle position information signal Dnp output from the needle position counter 60 coincide with each other and transmits the signal early. OF AND gate 69 controlling signal Pc ₁
F. The needle position counter 60 and the data switching circuit 6
7. A hand position switching circuit 70 is constituted by the coincidence detecting circuit 68 and the AND gate 69. The hand position switching circuit 70 causes the second hand 4 to correspond to each display of the function display 5 as described in FIG. The switching hand movement is performed.

Briefly the operation of the hand position switching circuit 70, the fast transmission signal Pc ₁ is the hand position counter 60 via the AND gate 69
Hand position counter 60 for being supplied to the fast-forwarded by fast transmission signal Pc ₁ of 128 Hz, the second hand 4 in synchronism with this also fast forward. When the needle position information signal Dnp output from the needle position counter 60 matches the selection information signal Dc output from the data switching circuit 67, a match signal Sc is output from the match detection circuit 68 and supplied to the negative terminal of the AND gate 69. Then, the AND gate 69 is closed, and the hand position counter 60 and the second hand 4 are closed.
Stops. As a result, the hand position of the second hand 4 in the function display section 5 becomes the position specified by the selection information signal Dc. This state is maintained as long as the selection information signal Dc does not change, but when the selection information signal Dc changes, the coincidence signal Sc output from the coincidence detection circuit disappears, so that the AND gate 69 is turned on, and the needle position counter is turned on. 60 and second hand 4
The second hand 4 is moved to a position corresponding to the changed selection information signal Dc by the be fast forward again quickly by transmission signal Pc _1. The needle position switching circuit 70 and the fast forward fast by transmission signal Pc _1, the coincidence signal Sc by can go switched according to the specified selection information signal Dc the position of the second hand 4 by repeating the stop.

Accordingly, the hand position switching circuit 70 causes the data switching circuit 67 to display the respective functions by switching the selection information signal Dc, and displays the change in information in each function with the second hand 4.

Reference numeral 75 denotes a control signal generation circuit, which is a zero-stage control unit 7 for generating a control signal when the crown 8 is at the zero-stage position.
6, a one-stage control unit 7 that generates a control signal when in the one-stage position
7, a two-stage control unit that generates the signal when in the two-stage position
With eight.

Then, the input terminals E _{1 to} E ₆ and the output terminals F _{0 to} F ₈
Has, the terminal E ₁ the push button switch SPB, terminal E
The ₂ first crown switch SR1, the terminal E ₃ 1-second signal P ₁ is inputted to terminal E ₄ is connected a second crown switch SR2, year further described below to the terminal E ₅ and E ₆ The non-setting signal Syn and the power-on pulse Pso are input.

Signals are output to the output terminals F _{0 to} F ₄ from the 0-stage control unit 76 in accordance with the conditions of the respective input signals, and a mode selection pulse Pcd generated by operating the push button switch SPB is output to the terminal F _1. F the ₂ occurs when the continued pressing the push button switch 5 seconds initial pulse P ₅ s, year setting signal Sys the terminal F _3, year modification pulse Py to the terminal F _4, terminal F
_{To 0} , a return pulse Pr is output when returning from the year setting mode to the monitor mode.

Further to the terminal F ₅ to F ₇ for output and signal from the 1-stage control unit 77 is output, the moon the terminal F ₅ setting signal Sms, terminal F ₆
Month modification pulse Pm to, the terminal F ₇ from drawn-out position of the first stage or second stage of the winding crown, modified end pulse Pnd is output which is generated when I pushed you to 0 step position.

Time correction setting signal Sts from the two-level control unit 78 is output to the further terminal F _8.

The specific configuration of the control signal generation circuit 75 will be described with reference to FIG.

In FIG. 8, reference numeral 100 denotes a pulse circuit, which outputs an operation signal of the push button switch SPB as a pulse signal Ppb. The 0-level control unit 76 first timer 101 for performing an initial operation of the second signal P ₁ is supplied from the terminal E ₄ respectively as a clock, a second timer 102 for mode return
And RS flip-flop 103 (hereinafter referred to as RS-FF) for storing year setting mode, pulsating circuits 104 and 105, NAND gate 107, and AN
It comprises D gates 106 and 108, a NOR gate 109 for determining the position of crown 8, and an inverter 110.

Also, the one-stage control circuit 77 determines whether the first crown switch SR ₁
The N signal and data input, the data type for storing the month setting mode 1 sec signal P ₁ as clock, flip-flop 111 (hereinafter D-FF) and pulsing circuit 112, the AND gate 11
3, 114, and an OR gate 115. The two-stage control circuit 78 further includes a D-FF 116 for storing a time correction mode using the ON signal of the second crown switch SR2 as a data input, and a pulsing circuit 117. .

Next, the operation of the control signal generation circuit 75 having the above configuration will be described. First located in the crown 8 0 stage position as an initial condition, the first crown switch SR1, both first crown switch SR2 is OFF, 2RS-FF 103 by a power-on pulse Pso which is supplied to the terminal E _6, D-FF 111, D-FF116
Is There is reset, and terminal E ₅ two years no setting signal Syn is not supplied (Syn Level), the output of the NOR gate 109 is However, since the push button switch SPB is in the OFF state, the output of the NAND gate 107 is , And the first timer 101 is reset. RS-FF
As the 103 is reset, the output terminal Q Therefore, the AND gate 108 is OFF and the output of the inverter 110 is It has become.

Also, the output of the AND gate 108 Therefore, when the reset is released, the second timer 102 performs a counting operation using the one-second signal P ₁ as a clock, and
The timer signal T ₂ is output at a cycle of seconds, and a reset signal is supplied to the RS-FF 103 via the pulsing circuit 105.
Since the RS-FF 103 is in the reset state, no change in operation occurs. Therefore, in this state, no signal is output to any of the terminals F _{0 to} F ₄ connected to the 0-stage control unit 76.

D-FF111 is reset and output Q becomes Since AND gate 114 is turned OFF because it is a neither signal is output to the terminal F ₅ to F ₇ connected to the first-stage control unit 77, further D-FF 116 is reset by the output Q But Since a signal to terminal F ₈ connected to the two-stage control unit 78 is not output.

When the push button switch SPB is turned on by operating the push button 9 in this state, the pulse signal Ppb is output from the pulsating circuit 100 and supplied to the AND gates 106, 108 and 114, as described above. AND gate 106 is turned off by the year non-setting signal Syn, and RS-F
Each of F103 and D-FF111 No signal is output because the AND gates 108 and 114 are turned off by the output. On the other hand, the NAND gate 107 is a push button switch S
Output is turned on by PB ON signal. The push before the first timer 101 for inverting but starts to count one second signal P ₁ as the clock by the reset is released, the timer time of 5 seconds to output a timer signal T ₁ has elapsed the When the button switch SPB is turned off, NA
The output of the ND gate 107 again And the first timer 101 is returned to the reset state.

Above initialization to do is to be output a timer signal T ₁ from the output terminal Q of the first timer 101 by holding the pushbutton switch SPB to 5 seconds ON state I Shidaka. The timer signal T ₁ is pulsed by the pulse generating circuit 104 to set the RS-FF 103 and to set the terminal F ₂
This is output as an initial pulse P ₅ s. Further R
By setting S-FF103, the output terminal Q Next, and outputs the terminal F ₃ two years setting signal Sys AN
Turn on the D gate 108, and further output the inverter 110 Invert. As a result, the inverter 110 The AND gate 106 and the NAND gate 107 are turned off by the output.

Together with the pulse signal Ppb When ON pushbutton switch SPB is output as the year modification pulse Py from the terminal F ₄ passes through the AND gate 108 In this state the second timer 102
Reset momentarily. As a result, if the year correction pulse Py is not supplied for 3 seconds after the second timer 102 is reset by the year correction pulse Py, the timer signal T ₂ is generated from the output terminal Q, and the timer signal T ₂ is output from the terminal F ₀ via the pulsing circuit 105. The reset signal RS-FF103 is output as the return pulse Pr and the year setting signal Sys To return to the monitor mode from the year setting mode. That is, the second timer 102 is a return timer for calling the year setting mode, performing the year correction using the year correction pulse Py, and then returning to the monitor mode by leaving the apparatus for three seconds.

Incidentally, the year no setting signal Syn which is supplied to the the year setting year setting by operation is carried out terminal E ₅ as described later And the AND gates 106 and 113 are turned ON. After returning from the year setting mode to the monitor mode, the pulse signal Ppb generated by operating the push button switch SPB is output to the AND gate 106.
, And is output from the terminal F _{1 as} a mode selection pulse Pcd.

As described above, at the 0-stage position of the crown 8, only the 0-stage control unit 76 operates, and the monitor mode and the year setting mode are selected.

Next, a state where the crown 8 is pulled out to the first stage will be described.

When the first crown switch SR1 is turned on, the output of the NOR gate 109 becomes By turning off the AND gate 106 and the NAND gate 107, the 0-stage control unit 76 becomes inactive.

On the other hand, the ON signal of the first crown switch SR1 is The D-FF 111 is supplied to the data terminal D of the D-FF 111 via the AND gate 113 which is in the ON state by the level non-setting signal Syn, whereby the D-FF 111 is supplied to the next one-second signal P ₁ supplied to the clock terminal φ. Output terminal Q at the falling timing of Outputs a month setting signal Sms from the terminal F ₅ with turns ON the AND gate 114 is inverted.

Pulse signal Ppb by the operation of the push button switch SPB is In this state passes through the AND gate 114 is output from the terminal F ₆ as the moon modification pulse Pm. As described above, only the first-stage control unit 77 operates at the first-stage position of the crown 8, and the month setting mode is selected.

When the crown 8 is pushed into the 0th position after the month correcting operation is completed, the D-FF111 turns on the first crown switch SR1.
The next 1-second signal the signal has disappeared, the output terminal Q at the rising timing of the P ₁ To return to the normal mode and output terminal From After pulsing the inverted signal to
Through R gate 115 outputs a corrected end pulse Pnd from the terminal F _7.

Next, a state in which the crown 8 is pulled out to the second stage will be described.

When the second crown switch SR2 is turned on, the output of the NOR gate 109 becomes As described above, the 0-stage control unit 76 becomes inactive.

On the other hand, the ON signal of the second crown switch SR2 is D-FF116
D-FF 116 switches the output terminal Q at the falling timing of the next one-second signal P ₀ supplied to the clock terminal φ. Time correction setting signal from the terminal F ₈ by inverting the S
Output ts.

As described above, at the second position of crown 8, 2
Only the stage control unit 78 operates, and the time adjustment mode is set.

Then, when the crown 8 is pushed to the 0th position after the time adjustment operation is completed, the D-FF 116 sets the second crown switch SR2.
The output terminal Q at the falling timing of the next one-second signal P ₁ that ON signal is lost To return to the normal mode and output terminal From After pulsing the inverted signal to
Through R gate 115 outputs a corrected end pulse Pnd from the terminal F _7.

The above is the configuration and operation of the control signal generation circuit 75, and the description of FIG. 6 will be repeated.

79 is a switching control circuit has a terminal H ₁ to H ₃ for output terminals G ₁ ~G ₅ for input, the mode selection pulse Pcd, time adjustment settings to the terminal G ₂ is the terminal G ₁ signal Sts, year setting signal via the aND gate 80 to the terminal G ₃ Sys, month setting signal Sms to a terminal G _4, the terminal G ₅ is one second signal P ₁ is inputted. Further, from the terminal H ₁ for output, second selection signal Ssd, year selection signal from the terminal H ₂ Syd, month selection signal Smd from the terminal H ₃
Is output, and the selection terminal B ₂ of the data switching circuit 67,
It is supplied to B ₃ and B ₄ .

Next, a specific configuration of the switching control circuit 79 will be described with reference to FIG.

In FIG. 9, reference numerals 120 and 121 are toggle type flip-flops (hereinafter, T-FFs), which together with an AND gate 122 constitute a well-known ternary counter 123.

Reference numerals 125 and 126 denote OR gates for supplying a compulsory designation signal to the ternary counter 123. The operation of the ternary counter 123 will be described below.

Now, considering that each setting signal from the control signal generation circuit 75 is not supplied to the terminals G _{2 to} G ₄ (normal mode), the set terminal S ₁ of the T-FF 120 and the reset terminals R ₁ and T
-Set terminal S ₂ and reset terminal R _{2 of} FF121 are all It forced designation because you are now a state not performed, the In this state through the OR gate 127 from the terminal G ₁ T-
The counting operation is performed by the mode selection pulse Pcd supplied to the terminal φ of the FF 120, and the outputs of the output terminals Q ₁ and Q ₂ of the T-FFs 120 and 121 are output. And the terminals Q ₁ and Q ₂ The output of the AND gate 122 And T-FFs 120 and 121 via OR gates 125 and 126
To form a ternary counter.

Then forced designation operation time adjustment to the terminal G ₂ signal Sts
Is supplied, the T-FFs 120 and 121 are always reset and the terminals Q ₁ and Q ₂ are reset. To also the terminal G ₄ two years setting signal Sys is supplied T-FF12
Set 0, reset T-FF121 and connect terminals Q ₁ and Q ₂ The further the terminal G ₃ month setting signal Sms is supplied T-
FF120 is reset, T-FF121 is set and terminals Q ₁ and Q ₂
To , Respectively.

Reference numeral 124 denotes a decoder for converting the output of the ternary counter 123 into each selection signal. Output terminals Q ₁ and Q _{2 of the} T-FFs 120 and 121 are connected to _two input terminals I ₁ and I ₂ , respectively. ,
Terminals Q ₁ and Q ₂ Of time, and outputs a second selection signal Ssd from the output terminal O _1, terminal Q
_1, Q ₂ is , The year selection signal Syd is output from the output terminal O ₂ and the terminal Q
_1, Q ₂ is Of time, and outputs a month selection signal Smd from the output terminal O _3.

128 is a timer for shifting to the month view mode from the year display mode shown in FIG. 3, when the terminal O ₂ two years selection signal Syd of the decoder 124 is output inverter 129
The reset is released via
8 performs a counting operation of the second signal P ₁ supplied from the terminal G ₅ as a clock, an output terminal Q when the five seconds have elapsed
An output signal generated from the T-FF 120 through an OR gate 127
To make the ternary counter 123 step forward.

The above is the configuration and operation of the switching control circuit 79, and the description returns to FIG.

Reference numeral 81 denotes an RS-FF, which is set at the initial pulse P ₅ s from the control signal generation circuit 75 to output to the output terminal Q. Turning OFF the AND gate 80 along with the output of the second zero-reset signal Sko supplied to the terminal B ₁ of the data switching circuit 67.

Reference numeral 82 denotes a pulsing circuit, which pulsates a signal of the second date plate switch SH2, which is connected via the inverter 83, from ON to OFF, and outputs a carry pulse Pku.

84 and 85 are AND gates for preventing carry, and 86 and 87 are OR gates.

Reference numeral 90 denotes a specific day determination circuit which determines that the display content of the date plate 7 is 29th to 31st and outputs month end correction data. This circuit also determines a nonexistent date in the calendar function. In addition, it also serves as a non-existence day detection circuit that outputs the corrected data, and has an input terminal L ₁
~L ₄ and an output terminal group M, the year information signal Dy and month information signal terminal L ₁ with Dm to enter, L is the ₂ first day plate switch SH1, the second date plate switches SH2 signal, modified end pulse Pnd the terminal L _3, the terminal L ₄ inputs each zero detection signal Sok output from the end correction circuit to be described later,
The output terminal group M outputs a date plate correction signal Dhd as the month end correction data and the non-existence date correction data. The specific configuration of the specific date determination circuit 90 will be described with reference to FIG.

In FIG. 10, reference numeral 140 denotes a month end decoder, which is a year information signal Dy from the year counter 63 and month information from the month counter 62.
Enter the dm, end outputs data DE ₂₈ ~DE ₃₀ based on a combination of the year and month. 141 is a date decoder,
The signals of the first date plate switch SR1 and the second date plate switch SR2 are input, and the date data D ₂₉ , D ₃₀ , and D ₃₁ are output based on the combination described in FIG.

142 is a modified days decoder and AND gates 143, 144,
145 and is constituted by an OR gate 146 and 147, the end of the data DE ₂₈ ~DE ₃₀ and date decoder 141 from the end of the decoder 140
Date data D ₂₉ to D ₃₁ dates data D ₂ for the number of days the data D _1, 2 days corrected for daily fix to each output of the AND gate 143, 144 and 145 by decoding the input of each gate from, outputs each modification dates of data days data D ₃ for 3 days corrected. That is, if explained day correction data D _1, the end of the data DE ₂₈ input to the OR gate 146 to D
By decoding the E ₃₀ and date data D ₃₁ by the AND gate 143, the end date is 28 days, 29 days, if the month of 30 days, since the date it does not exist 31 (non-presence day), only 1 day This means that fast-forwarding is corrected and the next day is shifted to the first day.

Similarly 2 days corrected data D ₂ is the end date is 28 days, for 29 days a month, 30 is shifted to the day of the next month to fast forward modified by two days because non presence date, further 3 days corrected data D _3, the last day of the month is a case of the month of 28 days, 29 days are meant to be migrated to a day of the following month and the fast-forward modification of the three days since the non-presence date.

Reference numeral 150 denotes a preset pulse generation circuit, which includes a daily detection circuit 151, an AND gate 152, and an OR gate 156.

The daily detection circuit 151 receives the first date plate switch SH1 and the second date plate switch SH2, and detects the moment when each switch is switched (when the date is sent and the date is changed) to detect the date. When supplied to the aND gate 152 to pulse Pcd outputted by the terminal L ₄ is zero detection signal Sok not supplied aND gate 152
Becomes OFF because it becomes OFF. That is, as described later, since the zero detection signal Sok is always supplied while the fast forward correction of the date plate 7 is not performed, the daily detection pulse Pcd can normally pass through the AND gate 152, It is configured to be blocked by the AND gate 152 only during the fast forward correction of the date plate 7.

The modified is supplied to the detection pulse Pcd and the terminal L ₃ replacement date has passed through the AND gate 152 end pulse Pnd and the OR gate 15
After passing through 6, the pulse becomes the preset pulse Pps. Further, the preset pulse Pps is supplied to the AND gate 15 having the day data D ₁ , D ₂ , and D ₃ from the modified day decoder 142 as one input.
3, 154, and 155. After passing through the AND gate that is in the ON state according to the designation of the number of days data, it is output from the output terminal group M as a date plate correction signal Dhd.

That is, the preset pulse generation circuit 150 is used when the date plate 7 is switched in conjunction with the clock wheel train during normal operation, or when the calendar or time is adjusted by pulling out the crown 8.
When the correction is completed and crown 8 is pushed in, a preset pulse Pps is generated.
While the number of days corrected data is not output to the
Day, 30, 30 or 31)
The output from the output terminal group M by being blocked by the gate 153 to 155 does not occur, also, the AND gate 153 if modified days data is D _1, the AND gate 154 in the case of D _2, D ₃ In this case, the signal passes through the AND gate 155 and is output from the output terminal group M as the date correction signal Dhd. And the specific day determination circuit 90
The preset pulse Pps generated by the operation of the date plate switch while the calendar mechanism performs the fast forward correction according to the date plate correction signal Dhd output from the AND gate 152
To prevent it.

The above is the description of the configuration and operation of the specific date determination circuit 90, and the description returns to FIG.

Reference numeral 91 denotes a month end correction circuit for fast-forward correcting the date plate 7 based on the date plate correction signal Dhd output from the specific date determination circuit 90, for fast-forwarding the hour hand 2 and the minute hand 3 for 24 hours. 24H counter 92, a day counter 93 for counting the number of correction days, an AND gate 94, and an inverter 95.

In the above configuration, the 24H counter 92 is a 4320-based up counter and a day counter corresponding to the number of pulses for driving the hour hand 2 and the minute hand 3 for 24 hours, which are driven in a cycle of 20 seconds.
Numeral 93 denotes a ternary down counter which has a maximum correction number of 3 days, is preset by a date plate correction signal Dhd (maximum 3) from the specific date determination circuit 90, and carries from the 24H counter 92. Count down by signal.

A description will be given of a case where the month end correction circuit 91 corrects three days for the month end correction operation.

First, 24H counter 92 and day counter 93 are used as initial conditions.
Are reset, the terminal O of the day counter 93 Since the zero detection signal Sok is output, the AND gate 94 is turned off via the inverter 95 and the hour / minute hand fast-forward signal Pc ₂
Has been blocked. In this state, the date correction signal Dhd corresponding to three days is preset in the terminal S of the day counter 93 from the specific day determination circuit 90, so that the data 3 is set in the day counter 93, Zero detection signal
Sok Flip to As a result, the AND gate 9 is connected via the inverter 95.
4 is turned on and the hour / minute hand fast-forward signal passed through the AND gate 94
Pc ₂ fast-forwards the hour hand 2 and minute hand 3 at a high speed of 128 Hz and starts counting by a 24H counter 92.

After finishing the 4320 count, the 24H counter 92 outputs a carry signal from the terminal Q, decrements the day counter 93 by one, and starts counting again. When the subtraction of the preset data 3 of the day counter 93 is completed by repeating the above operation, the terminal O is again connected to the terminal O. Is output, the AND gate 94 is activated.
Prevents hour and minute hands early transmission signal Pc ₂ becomes OFF, the end modification operation is completed.

By the above operation, 4320 × 3 = 1296 from the month end correction circuit 91
When the hour / minute hand fast-forward signal Pc ₂ is output, the hour hand 2 and the minute hand 3 are fast-forwarded for three days, and the date plate 7 linked to this train wheel is output.
Is corrected for three days.

The above is the configuration and operation of the month end correction circuit 91.
Return to the description of the figure.

200 is a power-on circuit, OR with outputs a power-on pulse Pso during battery replacement of the electronic timepiece 1, is supplied to the month counter 62, terminal E ₆ the reset terminal and a control signal generating circuit 75 year counter 63 The signal is supplied to the terminal G ₂ of the switching control circuit 79 via the gate 210. Reference numeral 201 denotes a month-end correction prohibition circuit, which includes an RS-FF 202, an AND gate 203, and an inverter 20.
4 The RS-FF 202 receives the power-on pulse Pso from the power-on circuit 200 as a set input and the initial pulse P ₅ from the control signal generation circuit 75.
s is a reset input, and the 24H counter of the month end correction circuit 91 is output by the month end correction inhibition signal Sgk output from the output terminal Q.
The supply of the hour / minute hand fast-forward signal Pc _{2 to} the end-of-month correction circuit 91 is prevented by holding the 92 and the day counter 93 in the reset state and turning off the AND gate 203 via the inverter 204.

The end-of-month correction circuit 201 inhibits the operation of the end-of-month correction circuit 91 when the battery is replaced, and restarts the operation of the end-of-month correction circuit 91 by a signal (for example, an initial pulse P ₅ s) for setting the automatic calendar. Like that.
That is, if the automatic calendar is not set when the battery of the electronic timepiece 1 is replaced, the operation of the month end correction circuit 91 is prohibited to prevent the calendar from going out of order due to the malfunction of the month end correction circuit 91. It is used as a correction calendar.

205 and 206 are pulse motor drive circuits, 207 is a first pulse motor, and 208 is a second pulse motor. The motor drive circuit 205 transmits the hour / minute hand drive signal Pmk and hour / minute hand early transmitted through the OR gate 209. The signal Pc ₂ is input, converted into a motor drive signal, and then supplied to the first pulse motor 207 to drive the hour hand 2 and the minute hand 3 and to drive the date plate 7 via a wheel train. Further, the motor drive circuit 206 inputs the fast-forward signal Pc ₁ passing through the AND gate 69, converts the signal into a motor drive signal, and supplies it to the second pulse motor 208 to drive the second hand 4.

Next, the circuit operation of the electronic timepiece 1 having the above configuration will be described.

First, consider a case where a new battery is inserted and started from a state in which all information is lost due to the expiration of the battery life of the electronic timepiece 1.

In a state where a new battery is inserted and a voltage is applied to the circuit, the state of all digital circuit systems is undefined and undefined.

From this state, the well-known power-on circuit 200 and oscillation circuit 50
Starts the operation, the power-on pulse Pso is output from the power-on circuit 200, the month counter 62 and the year counter 63 are reset, and at the same time the RS-FF202 is set. No.Pc ₂
And the end of month correction is prohibited. The power-on pulse Pso is the output of the control signal generating circuit 75 by RS-FF 103 and D-FF111,116 shown in FIG. 8 is reset by being supplied to the terminal E ₆ of the control signal generation circuit 75 Terminals F _{0 to} F ₈ are all in a no-signal state.

T-FF1 as further shown in FIG. 9 by the power-on pulse Pso is supplied to the terminal G ₂ of the switching control circuit 79
9,213 is reset, second selection signal Ssd is outputted from the terminal H _1. As a result the terminal B ₂ two seconds selection signal Ssd data switching circuit 67 is supplied to become a selected state of the second information signal Ds, the hand position of the second information signal Ds and the hand position counter 60 at the coincidence detection circuit 68 information signal Dnp early transmission signal Pc ₁ which has passed through the aND gate 69 by the coincidence detection is carried out is supplied to the motor drive circuit 206, to fast forward to the position corresponding to the second hand 4 to the count contents of the second counter 61.

In the above operation, the second information signal Ds and the hand position information signal Dnp
Coincides with each other, the match signal Sc turns off the AND gate 69, so that the second hand 4 stops temporarily.
Early transmission signal Pc ₁ from the previous stage divider circuit 51 by 50 is operated, a second signal P ₁ and the 20-second signal P from the subsequent stage frequency divider 52
_20, the drive signal minute hand driving signal Pmk time from generation circuit 53 is outputted, the second counter 61 for inputting a second signal P ₁ is the one counted content by counting the next 1-second signal P ₁ Count up.

As a result, the coincidence between the second information signal Ds and the hand position information signal Dnp is lost, so that the coincidence signal Sc from the coincidence detection circuit 68 is Inverted, early transmission signal Pc ₁ the AND gate 69 is turned ON again it passes. However, the 1-pulse fast-forward signal Pc ₁ passes and moves the second hand 4 one step, and at the same time, the hand position counter
As soon as the count content of 60 is incremented by one, the second information signal Ds and the hand position information signal Dnp again match, and the match signal Sc turns off the AND gate 69.

The second counter 61 second view by stepping the second hand 4 in accordance with the counting contents of the second counter 61 by repeating the above operation each time it is incremented by one second signal P ₁ in one second step (b) The second display shown in is performed.

The hour / minute hand drive signal Pmk from the drive signal generation circuit 53
Is supplied to the motor drive circuit 205 through the OR gate 209,
By driving the hour hand 2 and the minute hand 3 at a cycle of 20 seconds, the time display in the two-hand mode shown in FIG. 1 is performed. When a new battery is inserted as described above, the hour hand 2, minute hand 3, and second hand 4
Displays the time in hours, minutes, and seconds, but since the time has not been adjusted, the time content is in a crazy state.

Next, the initial setting and the year information setting operation of the second hand 4 at the 0th position of the crown 8 will be described.

As described with reference to FIG. 2 (b), if the push button 9 is kept pressed for 5 seconds when the second hand 4 comes to the 0 second position, the 0 shown in FIG.
After 5 seconds, the initial pulse P ₅ s is output from the terminal F ₂ of the control signal generating circuit 75 by the timer operation of the step control unit 76, and the preset terminals PR of the hand position counter 60 and the second counter 61 are output.
To both counters Presetting the further AND gate 80 and at the same time specify a terminal B ₁ of the data switching circuit 67 by outputting a second hand return-to-zero signal Sko to the output terminal Q is set to RS-FF 81 OF
F. As a result, while the second hand 4 has moved to the 5-second position during the operation of the push button 9 as described in FIG. 2 (b), the hand position counter 60 and the second counter 61 Are preset, the two hands match, and the second hand 4 is initialized. At the same time, the data switching circuit 67 supplied with the second hand return zero signal Sko to the terminal B ₁ enters the selected state of the zero memory 66 (initial setting mode), and in the coincidence detection circuit 68, the zero information signal Do and the hand position information signal Dn
second hand 4 by comparison with a p is performed is the fast-forward by the fast transmission signal Pc ₁ passing through the AND gate 69, the second hand 4 0
At the second position (the position of the OF mark), the hand position information signal Dnp of the hand position counter 60 matches the zero information signal Do ( The match signal from the match detection circuit 68
Sc occurs and the second hand 4 is set by turning off the AND gate 69.
Stop at the OF mark position. The match signal Sc is supplied to the terminal R of the RS-FF81 to reset the RS-FF81.
Second hand return zero signal Sko output to terminal Q Then, the AND gate 80 is returned to ON, and the initial setting mode of the data switching circuit 67 is released. And said switching control circuit 79 outputs a year selection signal Syd from the terminal H ₂ by being forced designated by year setting signal Sys passing an AND gate 80 becomes ON, the data switching circuit 67 FIG. 2 ( By switching to the year display mode shown in (c), the year position information signal Dyp is selected.

Modify settings for year information by year corrected pulse outputted from the terminal F ₄ of the control signal generating circuit 75 and to operate the push button switch SPB In this state is supplied to the year counter 63 through the OR gate 87 Is performed as described above.

The year counter is set by setting the above year information.
Output to 63 zero detection terminal O Year unset signal Syn To allow the output of the mode selection pulse Pcd from terminals F ₁ by push button 7 by ON the AND gate 106 and 113 which inverts shown in the Figure 8 in.

The initial setting operation and the year setting operation at the 0th position of the crown 8 have been described above. The year display mode is, as described with reference to FIG. When the mode is returned to the monitor mode and the return pulse Pr is output to forcibly designate the switching control circuit 79, the second display mode is set. In this monitor mode, the mode selection pulse Pcd output by operating the push button switch SPB is applied to the terminal G ₁ of the switching control circuit 79.
The ternary counter 12 shown in FIG.
The monitor operation shown in FIG. 3 is performed as 3 sequentially advances.

Further, the initial pulse P ₅ s resets the RS-FF 202 and returns the AND gate 204 to ON, whereby the end-of-month correction prohibition circuit 201 is canceled by judging that the automatic calendar has been set.

Next, the month setting operation will be described. One-stage control circuit 77 of control signal generation circuit 75 for pulling crown 8 to one-stage position
There month setting signal Sms from the terminal F ₅ is generated by operating the data switching circuit 67 and the second figure the function display portion 5 becomes a selected state of the moon position information signal Dmp by forcing specify the switching control circuit 79 The month display mode shown in (d) is set.
The month setting signal Sms inhibits the carry of the month counter 62 and the year counter 63 by turning off the AND gates 84 and 85.

When the push button 7 is operated in this state, the month correction pulse Pm output from the terminal F ₆ of the control signal generation circuit 75 is ORed.
As described above, the correction setting of the month counter 62 is performed through the gate 86, and this setting operation can be monitored by the second hand 4 as shown in FIG.

Then the moon rotates the crown 8 settings after work finished make date setting of the date plate 7, the setting after the end crown 8 of date output from the terminal F ₇ of pushing a control signal generating circuit 75 to the 0 step position Corrected end pulse Pnd is the specific day judgment circuit
It is supplied to the terminal L ₃ of 90.

As a result, the specific day determination circuit 90 operates as a non-existence day detection circuit, and when the date set in the date setting operation is 29 days, 30 days, and 31 days as described in FIG. Detecting whether or not a non-existing day is based on the year information signal Dy and the month information signal Dm set in the month setting operation. Board correction signal
Dhd is supplied to the month end correction circuit 91. And month end correction circuit 9
By driving the first pulse motor 207 by the hour / minute hand fast-forward signal Pc ₂ output from 1, the display on the date plate 7 is shifted to the first day of the next month.

 Next, the time adjustment operation will be described.

It said control signal generating circuit 75 and the draw crown 8 in two stages positioned only two-level control unit 78 outputs the time correction setting signal Sts from the terminal F ₈ an operational state. The supply of the time correction setting signal Sts resets the post-stage frequency dividing circuit 52 and the driving signal generating circuit 53 and switches the switching control circuit.
79 from the terminal H ₁ by forced designation terminal G ₁ And outputs the second selection signal Ssd to select the data switching circuit 67 to the second display mode. As described above, by rotating the crown 8 in this state, the hour hand 2 and the minute hand 3 can be corrected to the current time. Then, when crown 8 is pushed into the zero-step position after the end of the time adjustment operation, time adjustment setting signal Sts from control signal generation circuit 75 is output. , The reset of the post-stage frequency dividing circuit 52 and the driving signal generating circuit 53 is released, and the operation is restarted. The 1-second signal P ₁ is output after about 1 second, and the hour / minute hand driving signal Pmk is output after 20 seconds. . The corrective action of the non-presence date by 0 stage when resuming similarly to the control signal generating circuit 75 fixes end pulse Pnd from the terminal F ₇ of from the month setting mode upon return to the position of the crown 8 is outputted push However, this is to correct a non-existence date caused by shifting the date plate 7 in conjunction with a mechanical pointer correction operation.

Thus, a series of correction setting operations is completed, and the electronic timepiece 1 starts operating.

That is, the time is displayed by the hour hand 2 and the minute hand 3 by the hour / minute hand drive signal Pmk output from the drive signal generation circuit 53, and the date plate 7 is fed one tooth every 24 hours via the date wheel 33 to display the date. I do. At the end of each month, the projection 7b of the date plate 7 and the first date plate switch SH
1. The date signal shown in FIG. 5 is generated by engagement of the second date plate switch SH2, and is supplied to the specific date determination circuit 90. As a result, the specific day determination circuit 90 determines the last day of each month as described in FIG. 10 and supplies the date correction signal Dhd corresponding to the number of days of the month end correction to the month end correction circuit 91 to correct the month end. The circuit 91 outputs the hour / minute hand fast-forward signal Pc ₂ corresponding to the number of days of the date plate correction signal Dhd, and outputs the first pulse motor 2
By driving 07, the display of the date plate 7 is shifted to the first day of the next month, and the end-of-month correcting operation is ended.

When the display on the date plate 7 changes from 31st to 1st by the above operation, that is, when the signal from the second date plate switch SH2 changes from ON to OFF, the pulse generating circuit 82 carries the carry pulse Pku.
Then, the month counter 62 is counted up and the month information signal Dm is advanced by one month. Further, when the month information signal Dm changes from December to January due to the above-mentioned carry operation, a carry pulse is output from the month counter 62, and the year counter 63 is counted up to advance the year information signal Dy by one year. By doing so, each calendar information can be maintained and the end of each month can be corrected.

The function display section 5 is set to the second display mode shown in FIG. 2A by designating the time adjustment mode. When the push button 9 is operated in this state, the year display mode is displayed as shown in FIG. Monitor and month display mode can be set.

The above is the normal operation when the automatic calendar is set. Next, the non-setting operation when the automatic calendar is not set will be described.

That is, when a new battery is inserted, a power-on pulse Pso is output from the power-on circuit 200, so that the month end correction prohibition circuit 201 is set, and the year counter 63
Is reset, the supply of the hour / minute hand fast-forward signal Pc _{2 to} the month-end correction circuit 91 is blocked and the yearless setting signal S supplied to the terminal E ₅ of the correction signal generation circuit 75 as described above.
yn is Therefore, the 0-stage control unit 76 and the 1-stage control unit 77 shown in FIG. 8 are in a non-operating state when the AND gates 106 and 113 are turned off, and are in the insensitive mode. If the initial setting operation (shown in FIG. 2B) by operating the push button 9 for 5 seconds is not performed from this state, the control signal generation circuit 75 remains in the insensitive mode. Performs no function. or The month non-set signal Syn turns off the AND gates 84 and 85 via the inverter 211 and the OR gate 210, and the month counter
The operation of the carry signal Pku of 62 and the year counter 63 is prohibited.

Furthermore, since the end-of-month correction prohibition circuit 201 is not released from the blocking state, the hour / minute hand fast-forward signal to the end-of-month correction circuit 91 is output.
Pc ₂ is not supplied, and the automatic calendar function is prohibited.

However, even when the above automatic calendar function is disabled,
The date can be corrected by pulling the crown 8 by one click and the hour and minute hands can be corrected by pulling the crown 2 by two steps, and the function display section 5 displays the second as shown in FIG. Mode,
Although the time display by the hour hand 2, minute hand 3 and second hand 4 and calendar display by the date plate 7 are performed, the automatic correction of the date plate at the end of the month is not performed. There is a need.

FIG. 7 is a block diagram showing a specific example of the year counter 63 shown in FIG. Reference numerals 300, 301, and 302 denote three T-FFs having set and reset functions, and constitute a counter 308 that operates in quaternary and quinary by being continuously fed back. 303 has three inputs connected to the terminals Q of the T-FFs 300 and 302 and the terminal of the T-FF 301, respectively. AND that outputs reset signal P ₅ r upon detection of
The gate. The AND gates 304 and 305 and the inverter 306 constitute a step number switching circuit 310 for switching the counter 308 between quaternary and quinary according to the year setting signal Sys supplied from the terminal S.

311 has three inputs connected to the terminals of the T-FFs 300, 301 and 302, respectively. A that detects that the signal has become zero and outputs the yearless setting signal Syn
ND gate.

Next, the operation of the year counter 63 having the above configuration will be described.

First, the quaternary and quinary counter operations by the counter 308 and the step number switching circuit 310 will be described.

The counter 308 is operated by a clock supplied from a terminal φ. The basic configuration of the octal counter is that the AND gate 303 operates during this counter operation. The counter 308 is reset by the reset signal P ₅ r that is detected and output. To reset to Is switched by the step switching circuit 310 to switch between a quaternary counter and a quinary counter.

That is, the year setting signal Sys In the case of (normal operation), the AND gate 305 is turned ON, so that the reset signal R ₅ r sets T-FF300, and the T-FF301, 302
Resets counter 308 And the count operation by the clock is Quaternary counter.

Also, the year setting signal Sys When the (year setting mode) reset signal P ₅ r for AND gate 304 is ON, the counter 308 by resetting all the T-FF300,301,302 By resetting all of the T-FFs 300, 301 and 302, the counting content of the counter 308 becomes And to the terminal O via the AND gate 311 No synchronizing signal Syn is output.

The year setting signal Sys to the terminal S is In this case, the step number switching circuit 310
The FF and the AND gate 305 are ON, and the T-FF
The year information signal output from each terminal Q of 300, 301 and 302 is It has become.

In this state, The control signal generation circuit 75 is in the insensitive mode by the year non-setting signal Syn, and the AND gates 84 and 85 are OFF, so that the automatic calendar function is disabled.

Next, from this state, when the initial setting operation by the continuous operation of the push button 9 is performed, the terminal S of the year counter 63 becomes Year setting signal Sys is supplied, and the step number switching circuit 310
When the gate 304 is turned on, the counter 308 becomes a quinary counter. The year correction pulse Py is supplied as a clock to the terminal φ by the operation of the push button 9 so that the counter 30
The year information signal Dy, which is the output of 8, is And the year decoder 65 displays each year mark shown in FIG. That is, the correspondence between the year information signal Dy and each year mark is Is OF, Is Y1, Is Y2, Is Y3, Corresponds to Y4 respectively.

Set the counter 308 in the year setting mode Is set to (OF setting), the yearless setting signal Syn As described above, the automatic calendar function is prohibited as described above. However If a setting other than the above is performed (the current year is set), the timer operates after the year setting ends, and the year setting signal Sys The step number switching circuit 310 returns to
5 turns ON and switches the counter 308 to quaternary.

Then, a carry signal from the month counter 62 generated by the operation of the date plate 7 is supplied to the terminal φ, so that the year information signal Dy becomes And each year mark Y1, Y2, Y3, shown in FIG.
Only Y4 is displayed, and OF is not displayed.

FIG. 11 shows another embodiment of the month end correction inhibiting circuit 201 shown in FIG. 6, which is constituted by one AND gate 400, and transmits a year non-setting signal Sys from the year counter 63 to a control signal. The hour / minute hand fast-forward signal Pc ₂ is blocked.

〔The invention's effect〕

As described above, in the present invention, a month-end correction prohibiting circuit for setting the month-end correcting means to a non-operating state is provided, and the month-end correction prohibiting circuit is provided with a power-on signal generated when a battery is turned on or an operation of an external operation member. The prohibition state is set by the signal and the prohibition state is released by the information setting signal to the calendar information storage means. For those who do not know that the electronic watch has an automatic month-end correction function or who do not know how to set calendar information, the hour, minute, second, and day It can be used as a normal calendar clock that displays and manually corrects the date plate at the end of the month. It is possible to solve the problem that leads to a non-signal of the total.

[Brief description of the drawings]

1 shows an embodiment of the present invention. FIG. 1 is a front view of an electronic timepiece, and FIGS. 2 (a), (b), (c), and (d).
Is a front view showing each display state of the function display unit, FIG. 3 is a mode selection diagram showing each selection mode of the function display unit,
FIG. 4 is a plan view showing the mechanical configuration of the electronic timepiece, FIG. 5 is a time chart showing the operation of the date plate switch, FIG. 6 is a block diagram of the electronic timepiece, FIG. 8 is a block diagram of a control signal generating circuit, FIG. 9 is a block diagram of a switching control circuit, FIG. 10 is a block diagram of a specific day judging circuit, and FIG. 11 is a block diagram showing another embodiment of a month end correction inhibiting circuit. FIG. 12 is a waveform diagram of FIG. 1 ... electronic timepiece, 5 ... function display part, 7 ... date plate, 75 ...
… Control signal generation circuit, 70… needle position switching circuit, 79… switching control circuit, 90… specific day judgment circuit, 91… month end correction circuit, 201… month end correction prohibition circuit.

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Hiroyuki Kihara 6-11-12 Honcho, Tanashi-city Citizen Time Total within Tanashi Works Co., Ltd. (72) Inventor Masahiro Sase 6-1-112 Honmachi, Tanashi-shi Citizen Time Total Inside the Tanashi Factory (72) Inventor Hisashi Kawahara 6-11-12, Honcho, Tanashi-shi Citizen Watch Total Examiner in the Tanashi Factory, Inc. Jin Sakurai (56) References JP-A-54-28667 (JP, A) JP-A-54-125076 (JP, A) JP-A-60-100082 (JP, A) JP-A-62-147392 (JP, A)

Claims (3)

(57) [Claims] 1. A pointer for displaying time, a date display member for displaying date, calendar information storage means for storing calendar information such as year and month, and a month end of a small month in accordance with the information in the calendar information storage means. In an electronic timepiece having month-end correction means for performing correction, month-end correction prohibition means for setting the month-end correction means to a non-operating state is provided, and the month-end correction prohibition means stores information in the calendar information storage means. An electronic timepiece with a calendar, characterized in that the end-of-month correction prohibition state is released by a signal of a setting detecting means for detecting that setting has been performed. 2. The end-of-month correction inhibiting means according to claim 1, wherein the end-of-month correction is inhibited by a power-on signal for detecting power-on, an initialization signal for initializing a circuit, or an operation signal of an external operation member. An electronic timepiece with a calendar set in a state. 3. A monitor display means for monitoring calendar information such as a year and a month set in the calendar information storage means according to claim 1, and prohibits the operation of the monitor display means from correcting the end of the month. An electronic timepiece with a calendar, wherein the electronic timepiece is stopped by a prohibition state signal of the means.