JPS6470832A - Byte cuing/decuing apparatus and method for processing variable length data word/instruction by one clock cycle - Google Patents
Byte cuing/decuing apparatus and method for processing variable length data word/instruction by one clock cycleInfo
- Publication number
- JPS6470832A JPS6470832A JP17620688A JP17620688A JPS6470832A JP S6470832 A JPS6470832 A JP S6470832A JP 17620688 A JP17620688 A JP 17620688A JP 17620688 A JP17620688 A JP 17620688A JP S6470832 A JPS6470832 A JP S6470832A
- Authority
- JP
- Japan
- Prior art keywords
- variable length
- byte
- rotators
- length data
- clock cycle
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
- G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
- G06F5/16—Multiplexed systems, i.e. using two or more similar devices which are alternately accessed for enqueue and dequeue operations, e.g. ping-pong buffers
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Advance Control (AREA)
- Communication Control (AREA)
- Executing Machine-Instructions (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US7296087A | 1987-07-15 | 1987-07-15 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6470832A true JPS6470832A (en) | 1989-03-16 |
Family
ID=22110831
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17620688A Pending JPS6470832A (en) | 1987-07-15 | 1988-07-13 | Byte cuing/decuing apparatus and method for processing variable length data word/instruction by one clock cycle |
Country Status (2)
Country | Link |
---|---|
EP (1) | EP0299264A3 (ja) |
JP (1) | JPS6470832A (ja) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE69031220T2 (de) * | 1990-12-20 | 1998-02-12 | Ibm | Hochgeschwindigkeitsmultiport-FIFO-Pufferschaltung |
JP2974476B2 (ja) * | 1991-12-09 | 1999-11-10 | 三田工業株式会社 | メモリ制御装置 |
US5412611A (en) * | 1992-03-17 | 1995-05-02 | Fujitsu, Limited | FIFO memory device capable of writing contiguous data into rows |
US6513105B1 (en) * | 1999-05-07 | 2003-01-28 | Koninklijke Philips Electronics N.V. | FIFO system with variable-width interface to host processor |
CN1159646C (zh) * | 1999-07-28 | 2004-07-28 | 印芬龙科技股份有限公司 | 用于对缓冲存储器进行写入和读出的方法和装置 |
-
1988
- 1988-06-27 EP EP19880110215 patent/EP0299264A3/en not_active Withdrawn
- 1988-07-13 JP JP17620688A patent/JPS6470832A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
EP0299264A2 (en) | 1989-01-18 |
EP0299264A3 (en) | 1991-03-20 |
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