JPS646499Y2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a battery check circuit for checking the voltage of a power supply battery in a camera or the like.

In a camera or the like, the current consumed by a circuit system such as arithmetic control generally differs depending on the operation mode. Therefore, it is necessary to check the battery assuming the maximum current consumption. Therefore, a battery check switch is generally provided, and by pressing down the switch, the battery check circuit is connected, and a current equivalent to the maximum current required during exposure control is passed through the battery check circuit, so that the battery voltage reaches the specified voltage. If the voltage is higher than that, the display element is turned on, and if the voltage is lower than the specified voltage, the display element is turned off. However, in this case, the photographer must operate the battery check switch to confirm the battery check. Furthermore, if you accidentally press down on the battery check switch while shooting, a large amount of current will flow, which may cause the circuit voltage to drop and cause the camera to malfunction.

For this reason, a method has been proposed in which a battery check is performed during an exposure check without providing a battery check switch.

In this case, the current consumption differs between exposure checking and shutter release.Generally, during release, a larger current flows than when checking because the control magnets for the aperture, shutter, etc. are energized. Therefore, when checking the exposure, that is, when checking the battery, it is necessary to set the check voltage to a high value in consideration of the voltage drop at the time of release.

If the battery check is performed using the current consumed during the exposure check as described above, there are the following drawbacks.

1 The current consumption during check is the IC that makes up the circuit.
However, ICs generally have large variations in current consumption, and the minimum and maximum values differ by about twice as much.
That is, if a certain voltage is used as the reference voltage for battery check, the internal resistance of the battery will differ by about twice as much. On the other hand, setting the battery check reference level to a certain internal resistance of a battery requires management of the current consumption of each individual IC, which is not practical.

2. The current consumed by the circuit system varies depending on the operating mode, so the voltage applied to the circuit varies depending on the internal resistance of the battery.

For example, the voltage applied to the circuit changes when the display element is turned on and off when blinking in various warning displays, or when displaying the exposure time or aperture value in a time-sharing manner. It is not appropriate to perform a battery check under these conditions.

3. When displaying the battery status, the display blinks when the battery is in warning and turns off when the battery capacity is low, the battery status detection voltage changes depending on the current flowing through the display element. In other words, when the battery capacity is sufficiently large, the load current is the sum of the circuit consumption current Ic and the display current Id, Ic + Id, and when the battery capacity warning is on, the load current becomes Ic + Id, and the voltage decreases. When the light is off, the load current is only Ic, the voltage rises, and the voltage shifts to the lighted state, making it difficult to visually recognize the blinking. In addition, when the battery capacity decreases, the light goes off and the load current becomes only Ic, and when the load current changes from Id + Ic to only Ic, the voltage increases, and the battery status display, which lights up, flashes, and goes out, changes. It's not clear. This means that depending on external conditions such as natural light, even if the battery condition is the same, the lamp may appear to be on or off even if the battery is in the same state.

An object of the present invention is to provide a battery check circuit which solves the above-mentioned problems.

In order to achieve the above object, the battery check circuit according to the present invention performs a battery check in a very short time in a time-division manner, and during this time the display system is turned off to make the battery check condition independent of the display current. A current is passed through the dummy resistor to check the battery status, that is, the circuit voltage, and at the next timing, the dummy resistor is turned off and the display system is turned on, and the exposure time display, aperture display, etc. are displayed according to the checked circuit voltage. It is configured to turn on, blink, and turn off to indicate the battery status. First, this configuration will be briefly explained mainly in relation to the embodiment shown in FIG.

The battery check circuit according to the present invention has a first
As shown in the figure, the battery check circuit of a camera with a built-in battery controls the shutter sequence and displays information on the display based on the results of calculations of the measurement data from the photometer BTL and the data input from the information input section INP. Related.

The battery check cycle pulse generating circuit _G1 shown in FIG. 2 generates a battery check cycle pulse having a short period (4 ms in FIG. 4) for measuring and storing the voltage of the battery from the clock signals N7 to N12 of the camera. (BCNT, Figure 4, Figure 5
Figure 6).

It has dummy loads RL ₁ and RL ₂ , and this dummy load
RL ₁ and RL ₂ are connected to the battery within a short period (4 ms) during which the voltage of the battery is measured and stored by dummy load connection means (gate and inverter).

The comparison circuit COMP compares the battery voltage of the camera with a reference voltage and outputs a signal CHE indicating whether the voltage is equal to or higher than a specified voltage.

The storage means F ₁ and F ₂ store the signal CHE generated by the comparison circuit COMP to the dummy loads RL ₁ and RL ₂ .
is stored during the period in which the battery check pulse is connected and held until the next battery check pulse is generated.

The display unit DSP shown in FIG. 1 cuts off the current for the short period (4 ms), and then the storage means F ₁ , F ₂ until the next short period (4 ms) occurs.
Displays the contents of.

The battery check circuit according to the present invention will be explained in more detail below with reference to the drawings and the like.

FIG. 1 is a block diagram showing an embodiment of an exposure calculation circuit to which a battery check circuit according to the present invention is applied.

The information input section INP contains mode information MS indicating whether the shooting mode is shutter priority T _P or aperture priority A _P is manual M, set shutter time T or set aperture A, film sensitivity S, information on the attached lens such as open F value F, Possible narrowing amount from opening C,
This is an input section into which input signals such as lens type signal New and strobe charging completion signal STB are input.The signals sent from INP in a time-division manner are converted into binary codes by a code conversion section CNV, and then converted into an information storage section. Sent to IM.

The information storage unit IM stores each input in the latch memory using the control signal from the calculation control unit CNT, and stores the stored information.
It is sent to the calculation unit OPE by the control signal of CNT.

Mode decoder MDC from IM to T _P mode, A _P
BULB, SYNC, NC from mode, M mode, strobe mode STB, and setting time T
Decode LOCK and in case of NC LOCK
If (NC LOCK) = 1, the release signal from the control input CINP is prohibited, and STB・(NC LOCK) = 1
Then, shutter time T = 1/90sec with SYNC
is equivalent to

The photometry unit BTL converts the logarithmically compressed photometry values into AD converters and converts the photometry data using the control signal from the CNT.
Send to OPE. AD conversion is also controlled by the control signal of SCNT and the AE lock signal of control input unit CINP.

The calculation unit OPE calculates the data from IM and BTL and the calculation results inside the calculation unit based on the control signal from the CNT, and displays the display unit DSP and the coincidence detection unit.
Send data to COM. Also, the flag of the calculation process is
It is sent to the CNT and used as the data for the CNT control signal.

The counter and match detection unit COM is the calculation unit OPE.
A match signal between the calculated aperture data from OPE and the count value of the aperture control pulse Pn inputted through the aperture control correction unit APJ, and a match signal between the calculated time data from OPE and the time counter are sent to the shutter sequence control unit SCNT.

The control input section CINP sends the release, shutter charge (film advance), self-timer, and trigger signals to the SCNT, and the AE lock signal to the BTL to hold the photometric value BTLV, and also sends the DSP and CNT.
It is also used for display and arithmetic control (when STB = 1). The release, check, and AE lock (fixing the photometric value) signals are controlled by the power supply hold section.
This becomes the PH input and the power-on signal for the circuit system. The aperture control pulse Pn is a pulse generated in response to the movement of the aperture control lever, and serves as an input to APJ.

The power hold section PH receives the above signals from CINP and the charging completion signal from the external strobe.
The power is turned on by the STB, and the power is maintained or turned off by the signal from the SCNT.

The aperture control correction unit APJ sends the aperture control pulse Pn from CINP to the coincidence detection unit COM in accordance with the coded aperture adjustment input.

The shutter sequence control section SCNT is a control input section.
The control input from CINP and the signal from the power supply check unit BCH activate the release magnet RsMg to start aperture, enter a series of shutter sequences such as mirror up, and the match signal from COM activates the aperture control magnet and shutter. Control the control magnet. Also, SCNT is COM, OPE,
It sends signals to the CNT, BTL, and DSP to inform them of the sequence status and control each part.

The power supply check section BCH checks the circuit voltage,
Serves as a control signal for DSP and SCNT.

The display DSP displays time and time using display data from OPE.
Displays aperture and exposure warnings and modes using mode data from MDC. Also, the mode display blinks with the AE lock signal to indicate AE lock.
The display blinks, turns off, etc. based on the signal from the BCH to notify the battery status.

The calculation control unit CNT receives the mode and
Aperture and time calculations are controlled by calculation flags from OPE. Also, the calculated value is fixed by the signal from SCNT.

Although the lens type signal New was mentioned earlier in the INP information input section, two types of lenses are planned to be used in this embodiment. The lens indicated by the signal New is a lens designed so that the aperture can be automatically controlled using aperture control data, and the amount of movement of the lens aperture pin drive lever and the amount of aperture from the actual aperture are in a predetermined relationship. It is a lens unified to Since the aperture of lenses other than this lens cannot be automatically adjusted based on aperture control data, automatic switching to another arithmetic control method is performed.

Now, in a camera having the arithmetic circuit shown in the above block diagram, either T _P , A _P , or M _P selected by the mode select section of the INP section is output, and the _TV or A set by operating the setting dial is output. Suppose that _V or both are output.

Calculated aperture control data C A lens whose aperture cannot be accurately controlled using _VSE , or in other words, a lens that does not have a fixed relationship between the amount of movement of the lens aperture pin drive lever and the amount of aperture from the actual aperture opening, is attached. When the signal _is 1, the lens aperture preset value C _VMS is calculated as the set aperture regardless of the TV or A _V setting value, and the strobe mode is detected by the aperture data SB _VS from the strobe when using the strobe. In the signal STB,
The aperture is controlled independently of T _P and _AP . In addition, in strobe mode, the shutter time must be longer than the synchronization time (for example, 1/90sec), and the exposure memory AEL must be set to T _P or A _P.
(Automatic ExposureLock means that the exposure is fixed by fixing the metering value.) Shutter time is set to 1/90sec when not being operated.
When in AEL, the time is calculated according to the aperture signal from the strobe, and when in manual M, the aperture is set in C _VMS so that exposure compensation can be performed in strobe mode, and the time is set in T _V Set with .

In such a configuration, the power supply check section BCH
sends a preliminary warning signal _B2 that warns of a decrease in battery capacity and a non-operation warning signal _B1 that warns the camera of normal operation due to further decrease in battery capacity to the display unit DSP shutter sequence control unit SCNT, This is to give a warning to the photographer, and the power supply is checked in a time-divided manner.

Figure 2 shows an example of the circuit of the power supply check section BCH.
In the figure, COMP is a comparator and the reference voltage
Input the voltage Vdet obtained by dividing Vref and the circuit voltage.
When Vdet>Vref, its output CHE becomes HIGH. F ₁ and F ₂ are "DATA" type flip-flops which output the D input CHE at the rising edge of clock CK ₁ or CK ₂ . In is an initialization signal when the power is turned on, and is an initial reset signal for F ₁ and F ₂ . _N3 to _N12 are clock signals from the counter and create time-division signals.
_{Nd 5} , Nd ₆ , and _{Nd 7} are time-division signals for _the display system _{, which will} be _described later _.
Nd ₇ =N ₆ .N ₅ .N ₄ , which is a signal obtained by decoding the clock from the counter. The release latch is a signal that becomes HIGH when the photographer presses down the release switch to enter the shutter sequence control state, and at this time B _CNT is kept LOW. RL ₁ ,
RL ₂ is a dummy load resistance for battery check.

In this configuration, the logic is B _CNT = ₇・₈・₉・₁₀・₁₁・₁₂・Release latch (1), and if the frequency of each clock signal is set as shown in Figure 3, B _CNT is as shown in Figure 4. It becomes a 4ms wide pulse signal with a period of 250ms, and the B _CNT is displayed on the display.
When B _CNT = 1, the display is inhibited, the display current is turned off, and the dummy load resistor RL ₁ is turned on.

The clock CK ₁ of F ₁ is CK ₁ = B _CNT・Nd ₅・N ₃ = B _CNT・N ₆・₅・N ₄・N ₃ …(2), and the timing is shown in the time chart in Figure 5, and RL The circuit voltage when ₁ is conducting is
Check with COMP, and at the rising edge of CK ₁ , output F ₁ and replace the data of low battery warning signal in ₁ . ₁ controls the display section DSP and the shutter sequence control section SCNT. The logic that makes RL ₂ conductive is B _CNT・(Nd ₆ ○・Nd ₇ ) =B _CNT・N ₆・N ₅ (3) The clock CK ₂ of F ₂ is given by the following equation (4).

CK ₂ =B _CNT・Nd ₇・N ₃ =B _CNT・N ₆・N ₅・N ₄・N ₃ (4), and the timing is shown in the time chart of FIG. In other words, check the circuit voltage with COMP when RL ₁ and RL ₂ are conducting, and at the timing when CK ₂ rises, CHE = 1, that is, Vdet > Vref.
Then, the output signal B ₂ of F ₂ becomes 1, indicating that the battery capacity is sufficiently large, and if CHE=0, then B ₂ =0, which becomes a warning signal. B _CNT = 0, dummy resistance
RL ₁ and RL ₂ are turned off, and the clocks to F ₁ and F ₂ are turned off.
CK ₁ and CK ₂ remain LOW and maintain the circuit voltage state detected when B _CNT =1. Display section
The DSP becomes active when B _CNT = 0, lights up the display system when B ₂ = 1, blinks when B ₂ = 0, ₁ = 0, and turns off the display when it is ₁ . ₁ again
becomes a release control signal for the shutter sequence control unit SCNT. If ₁ = 1, the release is prohibited and the shutter sequence is disabled.

FIG. 6 shows the detection state of the circuit voltage.

In the figure, In is the initialization signal when the power is turned on, and a reset signal is given to F ₁ and F ₂ to set ₁ =
1, B ₂ =0, and the counter is reset so that B _CNT =1, and the battery check of sample cycle T ₀ begins. T ₀ shows an example when the battery capacity is large, and during the period t ₁ , the circuit voltage is checked with the load RL ₁ conducting, and Vdet>Vref
Therefore, the output CHE of the comparator COMP is CHE=1
and the output signal ₁ of F ₁ is ₁ when the clock CK of F ₁ is ₁ .
=0. Loads RL ₁ and RL ₂ become conductive during period t ₂ . As the load becomes heavier, the circuit voltage decreases, but Vdet
>Vref, so COMP output CHE=1,
At clock CK ₂ to F ₂ , the output signal B ₂ of F ₂ is B ₂ = 1
becomes. In the period t ₃ , B _CNT = 0 and RL ₁ , RL ₂
is turned off, the battery check cycle is completed, the display DSP becomes active, and ₁ = 0,
The display is turned on in response to the battery detection signal of B ₂ =0.

Sample cycle T _n is an example in which the battery capacity becomes low and becomes a preliminary warning area. During period t ₀ , B _CNT = 0, the display is active, and T _n-1
The display lights up or flashes depending on the battery detection signal in the sample cycle. FIG. 6 shows an example in which the lamp is lit. During the period _t1 , B _CNT =1, the display is turned off, a battery check cycle is entered, and the dummy load _RL1 is made conductive. The circuit voltage state CHE=1 at this time is set by clock CK ₁ .
Output signal ₁ sent to the output of F ₁ becomes 0. During the period t ₂ , the dummy load RL ₂ becomes conductive and the circuit voltage decreases, so that Vdet<Vref and CHE=0. Clock CK ₂ sends CHE = 0 to the output of F ₂ and B ₂ = 0
becomes. In period t ₃ , B _CNT = 0 and dummy load
RL ₁ and RL ₂ are turned off, the battery check cycle is completed, and the display section DSP becomes active, and the display blinks in response to the battery detection signals of ₁ = 0 and B ₂ = 0. Sample cycle Tn is an example in which the battery capacity has decreased and entered the non-operation warning region. Similarly to the above, during the period t ₀ , the display blinks or turns off depending on the battery detection signal in the sample cycle T _0-1 . At t ₁ , B _CNT = 1 and the display is turned off, and RL ₁ is turned on to check the circuit voltage state. CK ₁ sends CHE=0 to the output of F ₁
B ₁ =1. At t ₂ RL ₂ is turned on and at CK ₂
Send CHE=0 to the output of F ₂ and B ₂ =0. at t ₃
B _CNT = 0, RL ₁ and RL ₂ turn off, and the display becomes active, but the battery detection signal ₁ = 1,
Since B ₂ =0, the display is turned off. Also, ₁ at this time is the shutter sequence control section.
Sent to SCNT to inhibit release signal.

In the above explanation, the _dummy load is
In addition to RL ₁ , RL ₂ was also made conductive to obtain the warning signal _B2 , but instead of making RL ₂ conductive, the voltage division ratio of the power supply voltage to obtain the comparison voltage Vdet to the comparator COMP is changed as shown in Figure 7. The same applies even if you change it. i.e.
B When _CNT = 1, the display is turned off and the dummy load RL ₁
During period t ₁ , Vdet = R ₂ / R ₁ + R ₂ V _B is applied as a comparison voltage to COMP to detect ₁ , and during period t ₂ , switching element Tr is made conductive.
Apply Vdet=R ₂ R ₃ /R ₁ +R ₂ R ₃ V _B as a comparison voltage to COMP, detect B ₂ , turn off RL ₁ in period t ₃ ,
Set the display to active and display according to ₁ and _B2 . The same effect can be obtained by switching the reference voltage Vref to COMP instead of changing the voltage division ratio. Alternatively, it is also possible to detect more power supply voltage states by sequentially switching Vdet or Vref while B _CNT =1.

As explained in detail above, according to the present invention, a battery check circuit with high accuracy can be constructed because the battery check is performed under constant load conditions regardless of the display conditions such as lighting or blinking.

Further, the display can be performed without using a separate display element for displaying the battery status. In addition, according to the present invention, by using only one comparator and changing the load condition in a time-sharing manner, or by changing the comparison voltage Vdet.
By changing the reference voltage Vref or by changing the reference voltage Vref, it is also possible to display three or more battery states.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of an exposure calculation circuit to which a battery check circuit according to the present invention is applied. FIG. 2 is a circuit diagram showing an embodiment of the power supply check section BCH in the circuit. FIG. 3 is an explanatory diagram showing the relationship between the counter output signal and the clock frequency. Figure 4 is the BCNT time chart. FIG. 5 is a time chart showing the relationship among RL ₁ , CK ₁ , RL ₂ and CK ₂ . FIG. 6 is a time chart showing the detection state of the circuit voltage. 7th
The figure is a circuit diagram showing another embodiment in which the power check section BCH is of a power hold type. INP: Information input section, CNV: Code conversion section,
IM: information storage unit, CNT: calculation control unit, OPE: calculation unit, MDC: mode decoder, BTL: photometry unit,
COM: Counter and coincidence detection section, CINP: Control input section, PH: Power hold section, APJ: Aperture control correction section, SCNT: Shutter sequence control section,
BCH: Power check section, DSP: Display section.

Claims (1)

[Scope of utility model registration request] In a battery check circuit for a camera with a built-in battery, which performs shutter sequence control and displays on a display unit based on the results of calculations of measurement data from a photometry unit and data input from an information input unit, the voltage of the battery is determined from the clock signal of the camera. a battery check cycle pulse generating circuit for forming a periodic pulse having a short period of time for measuring and storing the voltage of the battery; a dummy load; and a dummy load connecting means for connecting the dummy load to the battery within the short period of time for measuring and storing the voltage of the battery. and a comparison circuit that compares the battery voltage of the camera with a reference voltage and outputs a signal indicating whether the voltage is higher than a specified voltage, and the dummy load is connected to the signal generated by the comparison circuit. The device comprises a storage means for storing the information in a period until the next battery check pulse is generated, and a display section for cutting off the current for the short period and displaying the contents of the storage means from then on until the occurrence of the next short period. A battery check circuit characterized by: