JPS6462907A - Differential amplifier circuit - Google Patents

Abstract

PURPOSE:To constitute a circuit with less signal delay by using PMOS transistor(TR) and NMOS TR as equi-potential TRs so as to form CMOS and turning on each TR simultaneously to make equi-potential configuration. CONSTITUTION:The PMOSTR P3, NMOSTR N4 are used as equi-potential MOS TRs to form a CMOS and control signals VA, VA' of inverted phase are given simultaneously to gates of each MOS TR. Complementary data VIN1, VIN2 from memory cells 1, 2 are given sequentially in opposite phase to gates of the MOS TRs N2, N3 of a differential pair via a line 4. When a selection signal VC goes to a high level and a differential amplification state is attained, in the absence of process fluctuation, the common potential after equi-potential processing is an intermediate potential between the signals VIN1, VIN2 and gate- source voltages VGSP, VGSN of the MOS TRs P3, N4 are made equal and the current capability is made identical. Thus, outputs VOUT1, VOUT2 are outputted without delay in following to the inversion of the input signals VIN1, VIN2.