JPS6462898A - Program circuit - Google Patents
Program circuitInfo
- Publication number
- JPS6462898A JPS6462898A JP21942387A JP21942387A JPS6462898A JP S6462898 A JPS6462898 A JP S6462898A JP 21942387 A JP21942387 A JP 21942387A JP 21942387 A JP21942387 A JP 21942387A JP S6462898 A JPS6462898 A JP S6462898A
- Authority
- JP
- Japan
- Prior art keywords
- channel mos
- mos transistor
- fuse
- program circuit
- kept
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Read Only Memory (AREA)
Abstract
PURPOSE:To properly operate a program circuit even when a fuse is remained with high resistance, by respectively connecting the source terminal of a first N-channel MOS transistor and the source terminal of a second N-channel MOS transistor to a GND power source and obtaining the output terminal of an inverter circuit as an output. CONSTITUTION:The drain terminal of a P-channel MOS transistor Q4, in which a gate element is connected to the GND power source, is connected to a fuse F and the source terminal of a P-channel MOS transistor Q3. When the fuse is disconnected, an N-channel MOS transistor Q2 is turned off finally and an N-channel MOS transistor Q1 and the P-channel MOS transistors Q3 and Q4 are turned on, a nodal point N1 is kept at an 'L' level, nodal points N2 and N4 are kept at an 'H' level and a nodal point N3 to be a program circuit output is kept to the 'L' level respectively. Accordingly, by the disconnection information of the fuse F, the electric potential of the nodal point N3 is determined and operated as a program circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21942387A JPS6462898A (en) | 1987-09-01 | 1987-09-01 | Program circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21942387A JPS6462898A (en) | 1987-09-01 | 1987-09-01 | Program circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6462898A true JPS6462898A (en) | 1989-03-09 |
Family
ID=16735158
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP21942387A Pending JPS6462898A (en) | 1987-09-01 | 1987-09-01 | Program circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6462898A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0886381A1 (en) * | 1997-05-29 | 1998-12-23 | Nec Corporation | Output logic setting circuit in semiconductor integrated circuit. |
-
1987
- 1987-09-01 JP JP21942387A patent/JPS6462898A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0886381A1 (en) * | 1997-05-29 | 1998-12-23 | Nec Corporation | Output logic setting circuit in semiconductor integrated circuit. |
US6157240A (en) * | 1997-05-29 | 2000-12-05 | Nec Corporation | Output logic setting circuit in semiconductor integrated circuit |
KR100306992B1 (en) * | 1997-05-29 | 2001-10-19 | 가네꼬 히사시 | Output logic setting circuit in semiconductor integrated circuit |
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